{"id":812710,"url":"http://patchwork.ozlabs.org/api/1.2/patches/812710/?format=json","web_url":"http://patchwork.ozlabs.org/project/devicetree-bindings/patch/1505200909-23552-2-git-send-email-weiyi.lu@mediatek.com/","project":{"id":37,"url":"http://patchwork.ozlabs.org/api/1.2/projects/37/?format=json","name":"Devicetree Bindings","link_name":"devicetree-bindings","list_id":"devicetree.vger.kernel.org","list_email":"devicetree@vger.kernel.org","web_url":"","scm_url":"","webscm_url":"","list_archive_url":"","list_archive_url_format":"","commit_url_format":""},"msgid":"<1505200909-23552-2-git-send-email-weiyi.lu@mediatek.com>","list_archive_url":null,"date":"2017-09-12T07:21:41","name":"[v3,1/9] dt-bindings: ARM: Mediatek: Document bindings for MT2712","commit_ref":null,"pull_url":null,"state":"not-applicable","archived":true,"hash":"1b13a414989ec198171aa1013610c9508859808c","submitter":{"id":72166,"url":"http://patchwork.ozlabs.org/api/1.2/people/72166/?format=json","name":"Weiyi Lu","email":"weiyi.lu@mediatek.com"},"delegate":null,"mbox":"http://patchwork.ozlabs.org/project/devicetree-bindings/patch/1505200909-23552-2-git-send-email-weiyi.lu@mediatek.com/mbox/","series":[{"id":2622,"url":"http://patchwork.ozlabs.org/api/1.2/series/2622/?format=json","web_url":"http://patchwork.ozlabs.org/project/devicetree-bindings/list/?series=2622","date":"2017-09-12T07:21:45","name":"Mediatek MT2712 clock and scpsys support","version":3,"mbox":"http://patchwork.ozlabs.org/series/2622/mbox/"}],"comments":"http://patchwork.ozlabs.org/api/patches/812710/comments/","check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/812710/checks/","tags":{},"related":[],"headers":{"Return-Path":"","X-Original-To":"incoming-dt@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming-dt@bilbo.ozlabs.org","Authentication-Results":"ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=vger.kernel.org\n\t(client-ip=209.132.180.67; helo=vger.kernel.org;\n\tenvelope-from=devicetree-owner@vger.kernel.org; receiver=)","Received":["from vger.kernel.org (vger.kernel.org [209.132.180.67])\n\tby ozlabs.org (Postfix) with ESMTP id 3xrxBk4RPkz9s8J\n\tfor ;\n\tTue, 12 Sep 2017 17:24:46 +1000 (AEST)","(majordomo@vger.kernel.org) by vger.kernel.org via listexpand\n\tid S1751628AbdILHYe (ORCPT\n\t);\n\tTue, 12 Sep 2017 03:24:34 -0400","from mailgw01.mediatek.com ([210.61.82.183]:3691 \"EHLO\n\tmailgw01.mediatek.com\" rhost-flags-OK-FAIL-OK-FAIL) by\n\tvger.kernel.org with ESMTP id S1751195AbdILHWJ (ORCPT\n\t); Tue, 12 Sep 2017 03:22:09 -0400","from mtkexhb02.mediatek.inc [(172.21.101.103)] by\n\tmailgw01.mediatek.com (envelope-from )\n\t(mhqrelay.mediatek.com ESMTP with TLS)\n\twith ESMTP id 602219110; Tue, 12 Sep 2017 15:22:02 +0800","from mtkcas07.mediatek.inc (172.21.101.84) by\n\tmtkmbs01n2.mediatek.inc (172.21.101.79) with Microsoft SMTP Server\n\t(TLS) id 15.0.1210.3; Tue, 12 Sep 2017 15:22:00 +0800","from mtkslt210.mediatek.inc (10.21.14.14) by mtkcas07.mediatek.inc\n\t(172.21.101.73) with Microsoft SMTP Server id 15.0.1210.3 via\n\tFrontend Transport; Tue, 12 Sep 2017 15:22:01 +0800"],"X-UUID":"7e5ed8d1ed3d4c9797a217bf243278f3-20170912","From":"Weiyi Lu ","To":"Matthias Brugger ,\n\tStephen Boyd , Rob Herring ","CC":"James Liao ,\n\tFan Chen , ,\n\t, ,\n\t, ,\n\t, Weiyi Lu ","Subject":"[PATCH v3 1/9] dt-bindings: ARM: Mediatek: Document bindings for\n\tMT2712","Date":"Tue, 12 Sep 2017 15:21:41 +0800","Message-ID":"<1505200909-23552-2-git-send-email-weiyi.lu@mediatek.com>","X-Mailer":"git-send-email 1.9.1","In-Reply-To":"<1505200909-23552-1-git-send-email-weiyi.lu@mediatek.com>","References":"<1505200909-23552-1-git-send-email-weiyi.lu@mediatek.com>","MIME-Version":"1.0","Content-Type":"text/plain","X-MTK":"N","Sender":"devicetree-owner@vger.kernel.org","Precedence":"bulk","List-ID":"","X-Mailing-List":"devicetree@vger.kernel.org"},"content":"This patch adds the binding documentation for apmixedsys, bdpsys,\nimgsys, imgsys, infracfg, mcucfg, mfgcfg, mmsys, pericfg, topckgen,\nvdecsys and vencsys for Mediatek MT2712.\n\nAcked-by: Rob Herring \nSigned-off-by: Weiyi Lu \n---\n .../bindings/arm/mediatek/mediatek,apmixedsys.txt | 1 +\n .../bindings/arm/mediatek/mediatek,bdpsys.txt | 1 +\n .../bindings/arm/mediatek/mediatek,imgsys.txt | 1 +\n .../bindings/arm/mediatek/mediatek,infracfg.txt | 1 +\n .../bindings/arm/mediatek/mediatek,jpgdecsys.txt | 22 ++++++++++++++++++++++\n .../bindings/arm/mediatek/mediatek,mcucfg.txt | 22 ++++++++++++++++++++++\n .../bindings/arm/mediatek/mediatek,mfgcfg.txt | 22 ++++++++++++++++++++++\n .../bindings/arm/mediatek/mediatek,mmsys.txt | 1 +\n .../bindings/arm/mediatek/mediatek,pericfg.txt | 1 +\n .../bindings/arm/mediatek/mediatek,topckgen.txt | 1 +\n .../bindings/arm/mediatek/mediatek,vdecsys.txt | 1 +\n .../bindings/arm/mediatek/mediatek,vencsys.txt | 1 +\n 12 files changed, 75 insertions(+)\n create mode 100644 Documentation/devicetree/bindings/arm/mediatek/mediatek,jpgdecsys.txt\n create mode 100644 Documentation/devicetree/bindings/arm/mediatek/mediatek,mcucfg.txt\n create mode 100644 Documentation/devicetree/bindings/arm/mediatek/mediatek,mfgcfg.txt","diff":"diff --git a/Documentation/devicetree/bindings/arm/mediatek/mediatek,apmixedsys.txt b/Documentation/devicetree/bindings/arm/mediatek/mediatek,apmixedsys.txt\nindex cd977db..19fc116 100644\n--- a/Documentation/devicetree/bindings/arm/mediatek/mediatek,apmixedsys.txt\n+++ b/Documentation/devicetree/bindings/arm/mediatek/mediatek,apmixedsys.txt\n@@ -7,6 +7,7 @@ Required Properties:\n \n - compatible: Should be one of:\n \t- \"mediatek,mt2701-apmixedsys\"\n+\t- \"mediatek,mt2712-apmixedsys\", \"syscon\"\n \t- \"mediatek,mt6797-apmixedsys\"\n \t- \"mediatek,mt8135-apmixedsys\"\n \t- \"mediatek,mt8173-apmixedsys\"\ndiff --git a/Documentation/devicetree/bindings/arm/mediatek/mediatek,bdpsys.txt b/Documentation/devicetree/bindings/arm/mediatek/mediatek,bdpsys.txt\nindex 4137196..4010e37 100644\n--- a/Documentation/devicetree/bindings/arm/mediatek/mediatek,bdpsys.txt\n+++ b/Documentation/devicetree/bindings/arm/mediatek/mediatek,bdpsys.txt\n@@ -7,6 +7,7 @@ Required Properties:\n \n - compatible: Should be:\n \t- \"mediatek,mt2701-bdpsys\", \"syscon\"\n+\t- \"mediatek,mt2712-bdpsys\", \"syscon\"\n - #clock-cells: Must be 1\n \n The bdpsys controller uses the common clk binding from\ndiff --git a/Documentation/devicetree/bindings/arm/mediatek/mediatek,imgsys.txt b/Documentation/devicetree/bindings/arm/mediatek/mediatek,imgsys.txt\nindex 047b11a..868bd51 100644\n--- a/Documentation/devicetree/bindings/arm/mediatek/mediatek,imgsys.txt\n+++ b/Documentation/devicetree/bindings/arm/mediatek/mediatek,imgsys.txt\n@@ -7,6 +7,7 @@ Required Properties:\n \n - compatible: Should be one of:\n \t- \"mediatek,mt2701-imgsys\", \"syscon\"\n+\t- \"mediatek,mt2712-imgsys\", \"syscon\"\n \t- \"mediatek,mt6797-imgsys\", \"syscon\"\n \t- \"mediatek,mt8173-imgsys\", \"syscon\"\n - #clock-cells: Must be 1\ndiff --git a/Documentation/devicetree/bindings/arm/mediatek/mediatek,infracfg.txt b/Documentation/devicetree/bindings/arm/mediatek/mediatek,infracfg.txt\nindex 58d58e2..a3430cd 100644\n--- a/Documentation/devicetree/bindings/arm/mediatek/mediatek,infracfg.txt\n+++ b/Documentation/devicetree/bindings/arm/mediatek/mediatek,infracfg.txt\n@@ -8,6 +8,7 @@ Required Properties:\n \n - compatible: Should be one of:\n \t- \"mediatek,mt2701-infracfg\", \"syscon\"\n+\t- \"mediatek,mt2712-infracfg\", \"syscon\"\n \t- \"mediatek,mt6797-infracfg\", \"syscon\"\n \t- \"mediatek,mt8135-infracfg\", \"syscon\"\n \t- \"mediatek,mt8173-infracfg\", \"syscon\"\ndiff --git a/Documentation/devicetree/bindings/arm/mediatek/mediatek,jpgdecsys.txt b/Documentation/devicetree/bindings/arm/mediatek/mediatek,jpgdecsys.txt\nnew file mode 100644\nindex 0000000..2df799c\n--- /dev/null\n+++ b/Documentation/devicetree/bindings/arm/mediatek/mediatek,jpgdecsys.txt\n@@ -0,0 +1,22 @@\n+Mediatek jpgdecsys controller\n+============================\n+\n+The Mediatek jpgdecsys controller provides various clocks to the system.\n+\n+Required Properties:\n+\n+- compatible: Should be:\n+\t- \"mediatek,mt2712-jpgdecsys\", \"syscon\"\n+- #clock-cells: Must be 1\n+\n+The jpgdecsys controller uses the common clk binding from\n+Documentation/devicetree/bindings/clock/clock-bindings.txt\n+The available clocks are defined in dt-bindings/clock/mt*-clk.h.\n+\n+Example:\n+\n+jpgdecsys: syscon@19000000 {\n+\tcompatible = \"mediatek,mt2712-jpgdecsys\", \"syscon\";\n+\treg = <0 0x19000000 0 0x1000>;\n+\t#clock-cells = <1>;\n+};\ndiff --git a/Documentation/devicetree/bindings/arm/mediatek/mediatek,mcucfg.txt b/Documentation/devicetree/bindings/arm/mediatek/mediatek,mcucfg.txt\nnew file mode 100644\nindex 0000000..b8fb03f\n--- /dev/null\n+++ b/Documentation/devicetree/bindings/arm/mediatek/mediatek,mcucfg.txt\n@@ -0,0 +1,22 @@\n+Mediatek mcucfg controller\n+============================\n+\n+The Mediatek mcucfg controller provides various clocks to the system.\n+\n+Required Properties:\n+\n+- compatible: Should be one of:\n+\t- \"mediatek,mt2712-mcucfg\", \"syscon\"\n+- #clock-cells: Must be 1\n+\n+The mcucfg controller uses the common clk binding from\n+Documentation/devicetree/bindings/clock/clock-bindings.txt\n+The available clocks are defined in dt-bindings/clock/mt*-clk.h.\n+\n+Example:\n+\n+mcucfg: syscon@10220000 {\n+\tcompatible = \"mediatek,mt2712-mcucfg\", \"syscon\";\n+\treg = <0 0x10220000 0 0x1000>;\n+\t#clock-cells = <1>;\n+};\ndiff --git a/Documentation/devicetree/bindings/arm/mediatek/mediatek,mfgcfg.txt b/Documentation/devicetree/bindings/arm/mediatek/mediatek,mfgcfg.txt\nnew file mode 100644\nindex 0000000..859e67b\n--- /dev/null\n+++ b/Documentation/devicetree/bindings/arm/mediatek/mediatek,mfgcfg.txt\n@@ -0,0 +1,22 @@\n+Mediatek mfgcfg controller\n+============================\n+\n+The Mediatek mfgcfg controller provides various clocks to the system.\n+\n+Required Properties:\n+\n+- compatible: Should be one of:\n+\t- \"mediatek,mt2712-mfgcfg\", \"syscon\"\n+- #clock-cells: Must be 1\n+\n+The mfgcfg controller uses the common clk binding from\n+Documentation/devicetree/bindings/clock/clock-bindings.txt\n+The available clocks are defined in dt-bindings/clock/mt*-clk.h.\n+\n+Example:\n+\n+mfgcfg: syscon@13000000 {\n+\tcompatible = \"mediatek,mt2712-mfgcfg\", \"syscon\";\n+\treg = <0 0x13000000 0 0x1000>;\n+\t#clock-cells = <1>;\n+};\ndiff --git a/Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.txt b/Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.txt\nindex 70529e0..4eb8bbe 100644\n--- a/Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.txt\n+++ b/Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.txt\n@@ -7,6 +7,7 @@ Required Properties:\n \n - compatible: Should be one of:\n \t- \"mediatek,mt2701-mmsys\", \"syscon\"\n+\t- \"mediatek,mt2712-mmsys\", \"syscon\"\n \t- \"mediatek,mt6797-mmsys\", \"syscon\"\n \t- \"mediatek,mt8173-mmsys\", \"syscon\"\n - #clock-cells: Must be 1\ndiff --git a/Documentation/devicetree/bindings/arm/mediatek/mediatek,pericfg.txt b/Documentation/devicetree/bindings/arm/mediatek/mediatek,pericfg.txt\nindex e494366..d9f092e 100644\n--- a/Documentation/devicetree/bindings/arm/mediatek/mediatek,pericfg.txt\n+++ b/Documentation/devicetree/bindings/arm/mediatek/mediatek,pericfg.txt\n@@ -8,6 +8,7 @@ Required Properties:\n \n - compatible: Should be one of:\n \t- \"mediatek,mt2701-pericfg\", \"syscon\"\n+\t- \"mediatek,mt2712-pericfg\", \"syscon\"\n \t- \"mediatek,mt8135-pericfg\", \"syscon\"\n \t- \"mediatek,mt8173-pericfg\", \"syscon\"\n - #clock-cells: Must be 1\ndiff --git a/Documentation/devicetree/bindings/arm/mediatek/mediatek,topckgen.txt b/Documentation/devicetree/bindings/arm/mediatek/mediatek,topckgen.txt\nindex ec93ecb..2024fc9 100644\n--- a/Documentation/devicetree/bindings/arm/mediatek/mediatek,topckgen.txt\n+++ b/Documentation/devicetree/bindings/arm/mediatek/mediatek,topckgen.txt\n@@ -7,6 +7,7 @@ Required Properties:\n \n - compatible: Should be one of:\n \t- \"mediatek,mt2701-topckgen\"\n+\t- \"mediatek,mt2712-topckgen\", \"syscon\"\n \t- \"mediatek,mt6797-topckgen\"\n \t- \"mediatek,mt8135-topckgen\"\n \t- \"mediatek,mt8173-topckgen\"\ndiff --git a/Documentation/devicetree/bindings/arm/mediatek/mediatek,vdecsys.txt b/Documentation/devicetree/bindings/arm/mediatek/mediatek,vdecsys.txt\nindex d150104..ea40d05 100644\n--- a/Documentation/devicetree/bindings/arm/mediatek/mediatek,vdecsys.txt\n+++ b/Documentation/devicetree/bindings/arm/mediatek/mediatek,vdecsys.txt\n@@ -7,6 +7,7 @@ Required Properties:\n \n - compatible: Should be one of:\n \t- \"mediatek,mt2701-vdecsys\", \"syscon\"\n+\t- \"mediatek,mt2712-vdecsys\", \"syscon\"\n \t- \"mediatek,mt6797-vdecsys\", \"syscon\"\n \t- \"mediatek,mt8173-vdecsys\", \"syscon\"\n - #clock-cells: Must be 1\ndiff --git a/Documentation/devicetree/bindings/arm/mediatek/mediatek,vencsys.txt b/Documentation/devicetree/bindings/arm/mediatek/mediatek,vencsys.txt\nindex 8a93be6..8515453 100644\n--- a/Documentation/devicetree/bindings/arm/mediatek/mediatek,vencsys.txt\n+++ b/Documentation/devicetree/bindings/arm/mediatek/mediatek,vencsys.txt\n@@ -6,6 +6,7 @@ The Mediatek vencsys controller provides various clocks to the system.\n Required Properties:\n \n - compatible: Should be one of:\n+\t- \"mediatek,mt2712-vencsys\", \"syscon\"\n \t- \"mediatek,mt6797-vencsys\", \"syscon\"\n \t- \"mediatek,mt8173-vencsys\", \"syscon\"\n - #clock-cells: Must be 1\n","prefixes":["v3","1/9"]}