{"id":811633,"url":"http://patchwork.ozlabs.org/api/1.2/patches/811633/?format=json","web_url":"http://patchwork.ozlabs.org/project/qemu-devel/patch/1504880304-12069-9-git-send-email-mst@redhat.com/","project":{"id":14,"url":"http://patchwork.ozlabs.org/api/1.2/projects/14/?format=json","name":"QEMU Development","link_name":"qemu-devel","list_id":"qemu-devel.nongnu.org","list_email":"qemu-devel@nongnu.org","web_url":"","scm_url":"","webscm_url":"","list_archive_url":"","list_archive_url_format":"","commit_url_format":""},"msgid":"<1504880304-12069-9-git-send-email-mst@redhat.com>","list_archive_url":null,"date":"2017-09-08T14:19:17","name":"[PULL,08/17] hw/pci: add QEMU-specific PCI capability to the Generic PCI Express Root Port","commit_ref":null,"pull_url":null,"state":"new","archived":false,"hash":"5aebc98a07ddb1f0708e13a11f965edb13fa6f16","submitter":{"id":2235,"url":"http://patchwork.ozlabs.org/api/1.2/people/2235/?format=json","name":"Michael S. Tsirkin","email":"mst@redhat.com"},"delegate":null,"mbox":"http://patchwork.ozlabs.org/project/qemu-devel/patch/1504880304-12069-9-git-send-email-mst@redhat.com/mbox/","series":[{"id":2227,"url":"http://patchwork.ozlabs.org/api/1.2/series/2227/?format=json","web_url":"http://patchwork.ozlabs.org/project/qemu-devel/list/?series=2227","date":"2017-09-08T14:18:52","name":"[PULL,01/17] vhost: Release memory references on cleanup","version":1,"mbox":"http://patchwork.ozlabs.org/series/2227/mbox/"}],"comments":"http://patchwork.ozlabs.org/api/patches/811633/comments/","check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/811633/checks/","tags":{},"related":[],"headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@bilbo.ozlabs.org","Authentication-Results":["ozlabs.org;\n\tspf=pass (mailfrom) smtp.mailfrom=nongnu.org\n\t(client-ip=2001:4830:134:3::11; helo=lists.gnu.org;\n\tenvelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org;\n\treceiver=)","ext-mx04.extmail.prod.ext.phx2.redhat.com;\n\tdmarc=none (p=none dis=none) header.from=redhat.com","ext-mx04.extmail.prod.ext.phx2.redhat.com;\n\tspf=fail smtp.mailfrom=mst@redhat.com"],"Received":["from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11])\n\t(using TLSv1 with cipher AES256-SHA (256/256 bits))\n\t(No client certificate requested)\n\tby ozlabs.org (Postfix) with ESMTPS id 3xpfms2KDXz9sCZ\n\tfor ;\n\tSat, 9 Sep 2017 00:27:53 +1000 (AEST)","from localhost ([::1]:45707 helo=lists.gnu.org)\n\tby lists.gnu.org with esmtp (Exim 4.71) (envelope-from\n\t)\n\tid 1dqKG7-0005eI-1Z\n\tfor incoming@patchwork.ozlabs.org; Fri, 08 Sep 2017 10:27:51 -0400","from eggs.gnu.org ([2001:4830:134:3::10]:49087)\n\tby lists.gnu.org with esmtp (Exim 4.71)\n\t(envelope-from ) id 1dqK7v-0006gJ-FF\n\tfor qemu-devel@nongnu.org; Fri, 08 Sep 2017 10:19:24 -0400","from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71)\n\t(envelope-from ) id 1dqK7r-0004yv-Ev\n\tfor qemu-devel@nongnu.org; Fri, 08 Sep 2017 10:19:23 -0400","from mx1.redhat.com ([209.132.183.28]:60064)\n\tby eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32)\n\t(Exim 4.71) (envelope-from ) id 1dqK7r-0004yG-5S\n\tfor qemu-devel@nongnu.org; Fri, 08 Sep 2017 10:19:19 -0400","from smtp.corp.redhat.com\n\t(int-mx01.intmail.prod.int.phx2.redhat.com [10.5.11.11])\n\t(using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits))\n\t(No client certificate requested)\n\tby mx1.redhat.com (Postfix) with ESMTPS id 45F2D7EA8F;\n\tFri, 8 Sep 2017 14:19:18 +0000 (UTC)","from redhat.com (ovpn-120-144.rdu2.redhat.com [10.10.120.144])\n\tby smtp.corp.redhat.com (Postfix) with SMTP id B4F686016F;\n\tFri, 8 Sep 2017 14:19:17 +0000 (UTC)"],"DMARC-Filter":"OpenDMARC Filter v1.3.2 mx1.redhat.com 45F2D7EA8F","Date":"Fri, 8 Sep 2017 17:19:17 +0300","From":"\"Michael S. Tsirkin\" ","To":"qemu-devel@nongnu.org","Message-ID":"<1504880304-12069-9-git-send-email-mst@redhat.com>","References":"<1504880304-12069-1-git-send-email-mst@redhat.com>","MIME-Version":"1.0","Content-Type":"text/plain; charset=us-ascii","Content-Disposition":"inline","In-Reply-To":"<1504880304-12069-1-git-send-email-mst@redhat.com>","X-Mutt-Fcc":"=sent","X-Scanned-By":"MIMEDefang 2.79 on 10.5.11.11","X-Greylist":"Sender IP whitelisted, not delayed by milter-greylist-4.5.16\n\t(mx1.redhat.com [10.5.110.28]);\n\tFri, 08 Sep 2017 14:19:18 +0000 (UTC)","X-detected-operating-system":"by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic]\n\t[fuzzy]","X-Received-From":"209.132.183.28","Subject":"[Qemu-devel] [PULL 08/17] hw/pci: add QEMU-specific PCI capability\n\tto the Generic PCI Express Root Port","X-BeenThere":"qemu-devel@nongnu.org","X-Mailman-Version":"2.1.21","Precedence":"list","List-Id":"","List-Unsubscribe":",\n\t","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n\t","Cc":"Marcel Apfelbaum ,\n\tPeter Maydell ,\n\tAleksandr Bezzubikov ","Errors-To":"qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org","Sender":"\"Qemu-devel\"\n\t"},"content":"From: Aleksandr Bezzubikov \n\nTo enable hotplugging of a newly created pcie-pci-bridge,\nwe need to tell firmware (e.g. SeaBIOS) to reserve\nadditional buses or IO/MEM/PREF space for pcie-root-port.\nAdditional bus reservation allows us to hotplug pcie-pci-bridge into this root port.\nThe number of buses and IO/MEM/PREF space to reserve are provided to the device via\na corresponding property, and to the firmware via new PCI capability.\nThe properties' default values are -1 to keep default behavior unchanged.\n\nSigned-off-by: Aleksandr Bezzubikov \nReviewed-by: Marcel Apfelbaum \nTested-by: Marcel Apfelbaum \nReviewed-by: Michael S. Tsirkin \nSigned-off-by: Michael S. Tsirkin \n---\n include/hw/pci/pcie_port.h | 1 +\n hw/pci-bridge/gen_pcie_root_port.c | 36 ++++++++++++++++++++++++++++++++++++\n 2 files changed, 37 insertions(+)","diff":"diff --git a/include/hw/pci/pcie_port.h b/include/hw/pci/pcie_port.h\nindex 1333266..0736014 100644\n--- a/include/hw/pci/pcie_port.h\n+++ b/include/hw/pci/pcie_port.h\n@@ -65,6 +65,7 @@ void pcie_chassis_del_slot(PCIESlot *s);\n \n typedef struct PCIERootPortClass {\n PCIDeviceClass parent_class;\n+ DeviceRealize parent_realize;\n \n uint8_t (*aer_vector)(const PCIDevice *dev);\n int (*interrupts_init)(PCIDevice *dev, Error **errp);\ndiff --git a/hw/pci-bridge/gen_pcie_root_port.c b/hw/pci-bridge/gen_pcie_root_port.c\nindex cb694d6..ed03ffc 100644\n--- a/hw/pci-bridge/gen_pcie_root_port.c\n+++ b/hw/pci-bridge/gen_pcie_root_port.c\n@@ -16,6 +16,8 @@\n #include \"hw/pci/pcie_port.h\"\n \n #define TYPE_GEN_PCIE_ROOT_PORT \"pcie-root-port\"\n+#define GEN_PCIE_ROOT_PORT(obj) \\\n+ OBJECT_CHECK(GenPCIERootPort, (obj), TYPE_GEN_PCIE_ROOT_PORT)\n \n #define GEN_PCIE_ROOT_PORT_AER_OFFSET 0x100\n #define GEN_PCIE_ROOT_PORT_MSIX_NR_VECTOR 1\n@@ -26,6 +28,13 @@ typedef struct GenPCIERootPort {\n /*< public >*/\n \n bool migrate_msix;\n+\n+ /* additional resources to reserve on firmware init */\n+ uint32_t bus_reserve;\n+ uint64_t io_reserve;\n+ uint64_t mem_reserve;\n+ uint64_t pref32_reserve;\n+ uint64_t pref64_reserve;\n } GenPCIERootPort;\n \n static uint8_t gen_rp_aer_vector(const PCIDevice *d)\n@@ -60,6 +69,24 @@ static bool gen_rp_test_migrate_msix(void *opaque, int version_id)\n return rp->migrate_msix;\n }\n \n+static void gen_rp_realize(DeviceState *dev, Error **errp)\n+{\n+ PCIDevice *d = PCI_DEVICE(dev);\n+ GenPCIERootPort *grp = GEN_PCIE_ROOT_PORT(d);\n+ PCIERootPortClass *rpc = PCIE_ROOT_PORT_GET_CLASS(d);\n+\n+ rpc->parent_realize(dev, errp);\n+\n+ int rc = pci_bridge_qemu_reserve_cap_init(d, 0, grp->bus_reserve,\n+ grp->io_reserve, grp->mem_reserve, grp->pref32_reserve,\n+ grp->pref64_reserve, errp);\n+\n+ if (rc < 0) {\n+ rpc->parent_class.exit(d);\n+ return;\n+ }\n+}\n+\n static const VMStateDescription vmstate_rp_dev = {\n .name = \"pcie-root-port\",\n .version_id = 1,\n@@ -78,6 +105,11 @@ static const VMStateDescription vmstate_rp_dev = {\n \n static Property gen_rp_props[] = {\n DEFINE_PROP_BOOL(\"x-migrate-msix\", GenPCIERootPort, migrate_msix, true),\n+ DEFINE_PROP_UINT32(\"bus-reserve\", GenPCIERootPort, bus_reserve, -1),\n+ DEFINE_PROP_SIZE(\"io-reserve\", GenPCIERootPort, io_reserve, -1),\n+ DEFINE_PROP_SIZE(\"mem-reserve\", GenPCIERootPort, mem_reserve, -1),\n+ DEFINE_PROP_SIZE(\"pref32-reserve\", GenPCIERootPort, pref32_reserve, -1),\n+ DEFINE_PROP_SIZE(\"pref64-reserve\", GenPCIERootPort, pref64_reserve, -1),\n DEFINE_PROP_END_OF_LIST()\n };\n \n@@ -92,6 +124,10 @@ static void gen_rp_dev_class_init(ObjectClass *klass, void *data)\n dc->desc = \"PCI Express Root Port\";\n dc->vmsd = &vmstate_rp_dev;\n dc->props = gen_rp_props;\n+\n+ rpc->parent_realize = dc->realize;\n+ dc->realize = gen_rp_realize;\n+\n rpc->aer_vector = gen_rp_aer_vector;\n rpc->interrupts_init = gen_rp_interrupts_init;\n rpc->interrupts_uninit = gen_rp_interrupts_uninit;\n","prefixes":["PULL","08/17"]}