{"id":811356,"url":"http://patchwork.ozlabs.org/api/1.2/patches/811356/?format=json","web_url":"http://patchwork.ozlabs.org/project/netdev/patch/20170908071156.5115-6-clabbe.montjoie@gmail.com/","project":{"id":7,"url":"http://patchwork.ozlabs.org/api/1.2/projects/7/?format=json","name":"Linux network development","link_name":"netdev","list_id":"netdev.vger.kernel.org","list_email":"netdev@vger.kernel.org","web_url":null,"scm_url":null,"webscm_url":null,"list_archive_url":"","list_archive_url_format":"","commit_url_format":""},"msgid":"<20170908071156.5115-6-clabbe.montjoie@gmail.com>","list_archive_url":null,"date":"2017-09-08T07:11:51","name":"[v5,05/10] dt-bindings: net: dwmac-sun8i: update documentation about integrated PHY","commit_ref":null,"pull_url":null,"state":"changes-requested","archived":true,"hash":"91ecff61eda0aec192a5d51fa7948bff55985fb0","submitter":{"id":64152,"url":"http://patchwork.ozlabs.org/api/1.2/people/64152/?format=json","name":"Corentin Labbe","email":"clabbe.montjoie@gmail.com"},"delegate":{"id":34,"url":"http://patchwork.ozlabs.org/api/1.2/users/34/?format=json","username":"davem","first_name":"David","last_name":"Miller","email":"davem@davemloft.net"},"mbox":"http://patchwork.ozlabs.org/project/netdev/patch/20170908071156.5115-6-clabbe.montjoie@gmail.com/mbox/","series":[{"id":2114,"url":"http://patchwork.ozlabs.org/api/1.2/series/2114/?format=json","web_url":"http://patchwork.ozlabs.org/project/netdev/list/?series=2114","date":"2017-09-08T07:11:56","name":"net: stmmac: dwmac-sun8i: Handle integrated PHY","version":5,"mbox":"http://patchwork.ozlabs.org/series/2114/mbox/"}],"comments":"http://patchwork.ozlabs.org/api/patches/811356/comments/","check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/811356/checks/","tags":{},"related":[],"headers":{"Return-Path":"","X-Original-To":"patchwork-incoming@ozlabs.org","Delivered-To":"patchwork-incoming@ozlabs.org","Authentication-Results":["ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=vger.kernel.org\n\t(client-ip=209.132.180.67; helo=vger.kernel.org;\n\tenvelope-from=netdev-owner@vger.kernel.org;\n\treceiver=)","ozlabs.org; dkim=pass (2048-bit key;\n\tunprotected) header.d=gmail.com header.i=@gmail.com\n\theader.b=\"cOT/WfUU\"; dkim-atps=neutral"],"Received":["from vger.kernel.org (vger.kernel.org [209.132.180.67])\n\tby ozlabs.org (Postfix) with ESMTP id 3xpTBq6xfgz9sBd\n\tfor ;\n\tFri, 8 Sep 2017 17:16:19 +1000 (AEST)","(majordomo@vger.kernel.org) by vger.kernel.org via listexpand\n\tid S1756094AbdIHHQK (ORCPT );\n\tFri, 8 Sep 2017 03:16:10 -0400","from mail-wr0-f194.google.com ([209.85.128.194]:32909 \"EHLO\n\tmail-wr0-f194.google.com\" rhost-flags-OK-OK-OK-OK) by vger.kernel.org\n\twith ESMTP id S1755041AbdIHHOO (ORCPT\n\t); Fri, 8 Sep 2017 03:14:14 -0400","by mail-wr0-f194.google.com with SMTP id b9so832846wra.0;\n\tFri, 08 Sep 2017 00:14:13 -0700 (PDT)","from Red.local (LFbn-MAR-1-580-96.w90-118.abo.wanadoo.fr.\n\t[90.118.159.96]) by smtp.googlemail.com with ESMTPSA id\n\tl19sm684566wrl.47.2017.09.08.00.14.12\n\t(version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128);\n\tFri, 08 Sep 2017 00:14:12 -0700 (PDT)"],"DKIM-Signature":"v=1; a=rsa-sha256; c=relaxed/relaxed;\n\td=gmail.com; s=20161025;\n\th=from:to:cc:subject:date:message-id:in-reply-to:references;\n\tbh=v3OUF9wjayWVPy9qPBPci63XPYFyt5bnNKMvxB0Ytbc=;\n\tb=cOT/WfUU5zhn5ZxhajtgrZgqc1oR23G84iaRnxbK+I4c8iqSmb4qLgQwn3NZtWkEWc\n\t20li5fGk/t8lW+/1rgGYpPPLxo1W5n20MsbWW52wxIBACkzujHXngKedcrecGNENyK0h\n\trTDtQtBAdWW8ANecMJKspLnxUnhHwJCi4oJVlO5wpWOZhAt8ZVh2Tz/maHmogMUUf5BL\n\t2vy9H0r5Jvu+cj1aQNz5dVv/nX30u12Qn4OUUA4WZu6P3m8jfjk87foGkQLz3E73pIKi\n\tajSyL9v5oHIhlosaEMufDtN4tB0xlVhDGFLDVARvul04HMidwsqyW4+zh5B2P9UzbOv8\n\tkCwA==","X-Google-DKIM-Signature":"v=1; a=rsa-sha256; c=relaxed/relaxed;\n\td=1e100.net; s=20161025;\n\th=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to\n\t:references;\n\tbh=v3OUF9wjayWVPy9qPBPci63XPYFyt5bnNKMvxB0Ytbc=;\n\tb=J9MaZerEUKuq8X1w7uYytAgM8QV4WesLqBGXRCSWUd/YWmycTbfyUTkW1QsQ29twj0\n\tzHHSJ0wRpLjjpjfQYmVNYAxLe/YBq3Bj9mc67artg9lmjwNUdG2Knbb0fajn+CSgQ3aP\n\tTFbreZMUTpTmxEFklo4FYH5cwNh7FxubK6ES1IEKLJ5K6SIkJfXYnJTB0KwzsP2GE5gH\n\thJSioFbNhC4nk5nyJ8KSs5xAJa+rv08beYWKFCQJ/giKwC/3KPxlspHaZysTjc1WKBMh\n\tvOIbP6/mYD0oxuOjGiVIsa7X6AxWQl1Q06XqkNiLHrWjbgkOmGSu0ckVeQFaiBkBXrUe\n\tFQxQ==","X-Gm-Message-State":"AHPjjUhSKkAcDveoxBOTnR/c0M30L7DmWW79+HGHOMsNf7BN3myqLiKf\n\t78Xh8s/UMFEOAQ==","X-Google-Smtp-Source":"ADKCNb66qebnX3Asp0WoXrDRKAuqySN185agnrZKo6A5JceON4kvT1JToULP6KGjqBgicwBYIyOEfg==","X-Received":"by 10.223.174.214 with SMTP id y80mr1257142wrc.192.1504854853236;\n\tFri, 08 Sep 2017 00:14:13 -0700 (PDT)","From":"Corentin Labbe ","To":"robh+dt@kernel.org, mark.rutland@arm.com,\n\tmaxime.ripard@free-electrons.com, wens@csie.org,\n\tlinux@armlinux.org.uk, catalin.marinas@arm.com,\n\twill.deacon@arm.com, peppe.cavallaro@st.com,\n\talexandre.torgue@st.com, andrew@lunn.ch, f.fainelli@gmail.com","Cc":"netdev@vger.kernel.org, devicetree@vger.kernel.org,\n\tlinux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org,\n\tCorentin Labbe ","Subject":"[PATCH v5 05/10] dt-bindings: net: dwmac-sun8i: update\n\tdocumentation about integrated PHY","Date":"Fri, 8 Sep 2017 09:11:51 +0200","Message-Id":"<20170908071156.5115-6-clabbe.montjoie@gmail.com>","X-Mailer":"git-send-email 2.13.5","In-Reply-To":"<20170908071156.5115-1-clabbe.montjoie@gmail.com>","References":"<20170908071156.5115-1-clabbe.montjoie@gmail.com>","Sender":"netdev-owner@vger.kernel.org","Precedence":"bulk","List-ID":"","X-Mailing-List":"netdev@vger.kernel.org"},"content":"This patch add documentation about the MDIO switch used on sun8i-h3-emac\nfor integrated PHY.\n\nSigned-off-by: Corentin Labbe \n---\n .../devicetree/bindings/net/dwmac-sun8i.txt | 127 +++++++++++++++++++--\n 1 file changed, 120 insertions(+), 7 deletions(-)","diff":"diff --git a/Documentation/devicetree/bindings/net/dwmac-sun8i.txt b/Documentation/devicetree/bindings/net/dwmac-sun8i.txt\nindex 725f3b187886..3fa0e54825ea 100644\n--- a/Documentation/devicetree/bindings/net/dwmac-sun8i.txt\n+++ b/Documentation/devicetree/bindings/net/dwmac-sun8i.txt\n@@ -39,7 +39,7 @@ Optional properties for the following compatibles:\n - allwinner,leds-active-low: EPHY LEDs are active low\n \n Required child node of emac:\n-- mdio bus node: should be named mdio\n+- mdio bus node: should be labelled mdio\n \n Required properties of the mdio node:\n - #address-cells: shall be 1\n@@ -48,14 +48,28 @@ Required properties of the mdio node:\n The device node referenced by \"phy\" or \"phy-handle\" should be a child node\n of the mdio node. See phy.txt for the generic PHY bindings.\n \n-Required properties of the phy node with the following compatibles:\n+The following compatibles require an mdio-mux node called \"mdio-mux\":\n+ - \"allwinner,sun8i-h3-emac\"\n+ - \"allwinner,sun8i-v3s-emac\":\n+Required properties for the mdio-mux node:\n+ - compatible = \"mdio-mux\"\n+ - one child mdio for the integrated mdio\n+ - one child mdio for the external mdio if present (V3s have none)\n+Required properties for the mdio-mux children node:\n+ - reg: 0 for internal MDIO bus, 1 for external MDIO bus\n+\n+The following compatibles require a PHY node representing the integrated\n+PHY, under the integrated MDIO bus node if an mdio-mux node is used:\n - \"allwinner,sun8i-h3-emac\",\n - \"allwinner,sun8i-v3s-emac\":\n+\n+Required properties of the integrated phy node:\n - clocks: a phandle to the reference clock for the EPHY\n - resets: a phandle to the reset control for the EPHY\n+- phy-is-integrated\n+- Should be a child of the integrated mdio\n \n-Example:\n-\n+Example with integrated PHY:\n emac: ethernet@1c0b000 {\n \tcompatible = \"allwinner,sun8i-h3-emac\";\n \tsyscon = <&syscon>;\n@@ -72,13 +86,112 @@ emac: ethernet@1c0b000 {\n \tphy-handle = <&int_mii_phy>;\n \tphy-mode = \"mii\";\n \tallwinner,leds-active-low;\n+\n+\tmdio0: mdio {\n+\t\t#address-cells = <1>;\n+\t\t#size-cells = <0>;\n+\t\tcompatible = \"snps,dwmac-mdio\";\n+\t};\n+\n+\tmdio-mux {\n+\t\tcompatible = \"mdio-mux\";\n+\t\t#address-cells = <1>;\n+\t\t#size-cells = <0>;\n+\n+\t\tint_mdio: mdio@1 {\n+\t\t\treg = <0>;\n+\t\t\t#address-cells = <1>;\n+\t\t\t#size-cells = <0>;\n+\t\t\tint_mii_phy: ethernet-phy@1 {\n+\t\t\t\treg = <1>;\n+\t\t\t\tclocks = <&ccu CLK_BUS_EPHY>;\n+\t\t\t\tresets = <&ccu RST_BUS_EPHY>;\n+\t\t\t\tphy-is-integrated\n+\t\t\t};\n+\t\t};\n+\t\text_mdio: mdio@0 {\n+\t\t\treg = <1>;\n+\t\t\t#address-cells = <1>;\n+\t\t\t#size-cells = <0>;\n+\t\t};\n+\t};\n+};\n+\n+Example with external PHY:\n+emac: ethernet@1c0b000 {\n+\tcompatible = \"allwinner,sun8i-h3-emac\";\n+\tsyscon = <&syscon>;\n+\treg = <0x01c0b000 0x104>;\n+\tinterrupts = ;\n+\tinterrupt-names = \"macirq\";\n+\tresets = <&ccu RST_BUS_EMAC>;\n+\treset-names = \"stmmaceth\";\n+\tclocks = <&ccu CLK_BUS_EMAC>;\n+\tclock-names = \"stmmaceth\";\n+\t#address-cells = <1>;\n+\t#size-cells = <0>;\n+\n+\tphy-handle = <&ext_rgmii_phy>;\n+\tphy-mode = \"rgmii\";\n+\tallwinner,leds-active-low;\n+\n+\tmdio0: mdio {\n+\t\t#address-cells = <1>;\n+\t\t#size-cells = <0>;\n+\t\tcompatible = \"snps,dwmac-mdio\";\n+\t};\n+\n+\tmdio-mux {\n+\t\tcompatible = \"mdio-mux\";\n+\t\t#address-cells = <1>;\n+\t\t#size-cells = <0>;\n+\n+\t\tint_mdio: mdio@1 {\n+\t\t\treg = <0>;\n+\t\t\t#address-cells = <1>;\n+\t\t\t#size-cells = <0>;\n+\t\t\tint_mii_phy: ethernet-phy@1 {\n+\t\t\t\treg = <1>;\n+\t\t\t\tclocks = <&ccu CLK_BUS_EPHY>;\n+\t\t\t\tresets = <&ccu RST_BUS_EPHY>;\n+\t\t\t\tphy-is-integrated\n+\t\t\t};\n+\t\t};\n+\t\text_mdio: mdio@0 {\n+\t\t\treg = <1>;\n+\t\t\t#address-cells = <1>;\n+\t\t\t#size-cells = <0>;\n+\t\t\text_rgmii_phy: ethernet-phy@1 {\n+\t\t\t\treg = <1>;\n+\t\t\t};\n+\t\t};\n+\t};\n+};\n+\n+Example with SoC without integrated PHY\n+\n+emac: ethernet@1c0b000 {\n+\tcompatible = \"allwinner,sun8i-a83t-emac\";\n+\tsyscon = <&syscon>;\n+\treg = <0x01c0b000 0x104>;\n+\tinterrupts = ;\n+\tinterrupt-names = \"macirq\";\n+\tresets = <&ccu RST_BUS_EMAC>;\n+\treset-names = \"stmmaceth\";\n+\tclocks = <&ccu CLK_BUS_EMAC>;\n+\tclock-names = \"stmmaceth\";\n+\t#address-cells = <1>;\n+\t#size-cells = <0>;\n+\n+\tphy-handle = <&ext_rgmii_phy>;\n+\tphy-mode = \"rgmii\";\n+\n \tmdio: mdio {\n+\t\tcompatible = \"snps,dwmac-mdio\";\n \t\t#address-cells = <1>;\n \t\t#size-cells = <0>;\n-\t\tint_mii_phy: ethernet-phy@1 {\n+\t\text_rgmii_phy: ethernet-phy@1 {\n \t\t\treg = <1>;\n-\t\t\tclocks = <&ccu CLK_BUS_EPHY>;\n-\t\t\tresets = <&ccu RST_BUS_EPHY>;\n \t\t};\n \t};\n };\n","prefixes":["v5","05/10"]}