{"id":811239,"url":"http://patchwork.ozlabs.org/api/1.2/patches/811239/?format=json","web_url":"http://patchwork.ozlabs.org/project/qemu-devel/patch/20170907224051.21518-13-richard.henderson@linaro.org/","project":{"id":14,"url":"http://patchwork.ozlabs.org/api/1.2/projects/14/?format=json","name":"QEMU Development","link_name":"qemu-devel","list_id":"qemu-devel.nongnu.org","list_email":"qemu-devel@nongnu.org","web_url":"","scm_url":"","webscm_url":"","list_archive_url":"","list_archive_url_format":"","commit_url_format":""},"msgid":"<20170907224051.21518-13-richard.henderson@linaro.org>","list_archive_url":null,"date":"2017-09-07T22:40:40","name":"[PULL,12/23] tcg/aarch64: Use constant pool for movi","commit_ref":null,"pull_url":null,"state":"new","archived":false,"hash":"717d58b5b9d005e8f7e07fc44bef583ea8efb687","submitter":{"id":72104,"url":"http://patchwork.ozlabs.org/api/1.2/people/72104/?format=json","name":"Richard Henderson","email":"richard.henderson@linaro.org"},"delegate":null,"mbox":"http://patchwork.ozlabs.org/project/qemu-devel/patch/20170907224051.21518-13-richard.henderson@linaro.org/mbox/","series":[{"id":2073,"url":"http://patchwork.ozlabs.org/api/1.2/series/2073/?format=json","web_url":"http://patchwork.ozlabs.org/project/qemu-devel/list/?series=2073","date":"2017-09-07T22:40:28","name":"[PULL,01/23] tcg: Move USE_DIRECT_JUMP discriminator to tcg/cpu/tcg-target.h","version":1,"mbox":"http://patchwork.ozlabs.org/series/2073/mbox/"}],"comments":"http://patchwork.ozlabs.org/api/patches/811239/comments/","check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/811239/checks/","tags":{},"related":[],"headers":{"Return-Path":"<qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org>","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@bilbo.ozlabs.org","Authentication-Results":["ozlabs.org;\n\tspf=pass (mailfrom) smtp.mailfrom=nongnu.org\n\t(client-ip=2001:4830:134:3::11; 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For 64-bit\n        values within [2**31, 2**32-1], we can create smaller sequences by\n@@ -638,38 +641,29 @@ static void tcg_out_movi(TCGContext *s, TCGType type, TCGReg rd,\n         }\n     }\n \n-    /* Would it take fewer insns to begin with MOVN?  For the value and its\n-       inverse, count the number of 16-bit lanes that are 0.  */\n-    for (i = wantinv = 0; i < 64; i += 16) {\n-        tcg_target_long mask = 0xffffull << i;\n-        wantinv -= ((value & mask) == 0);\n-        wantinv += ((ivalue & mask) == 0);\n-    }\n-\n-    if (wantinv <= 0) {\n-        /* Find the lowest lane that is not 0x0000.  */\n-        shift = ctz64(value) & (63 & -16);\n-        tcg_out_insn(s, 3405, MOVZ, type, rd, value >> shift, shift);\n-        /* Clear out the lane that we just set.  */\n-        value &= ~(0xffffUL << shift);\n-        /* Iterate until all non-zero lanes have been processed.  */\n-        while (value) {\n-            shift = ctz64(value) & (63 & -16);\n-            tcg_out_insn(s, 3405, MOVK, type, rd, value >> shift, shift);\n-            value &= ~(0xffffUL << shift);\n-        }\n+    /* Would it take fewer insns to begin with MOVN?  */\n+    if (ctpop64(value) >= 32) {\n+        t0 = ivalue;\n+        opc = I3405_MOVN;\n     } else {\n-        /* Like above, but with the inverted value and MOVN to start.  */\n-        shift = ctz64(ivalue) & (63 & -16);\n-        tcg_out_insn(s, 3405, MOVN, type, rd, ivalue >> shift, shift);\n-        ivalue &= ~(0xffffUL << shift);\n-        while (ivalue) {\n-            shift = ctz64(ivalue) & (63 & -16);\n-            /* Provide MOVK with the non-inverted value.  */\n-            tcg_out_insn(s, 3405, MOVK, type, rd, ~(ivalue >> shift), shift);\n-            ivalue &= ~(0xffffUL << shift);\n+        t0 = value;\n+        opc = I3405_MOVZ;\n+    }\n+    s0 = ctz64(t0) & (63 & -16);\n+    t1 = t0 & ~(0xffffUL << s0);\n+    s1 = ctz64(t1) & (63 & -16);\n+    t2 = t1 & ~(0xffffUL << s1);\n+    if (t2 == 0) {\n+        tcg_out_insn_3405(s, opc, type, rd, t0 >> s0, s0);\n+        if (t1 != 0) {\n+            tcg_out_insn(s, 3405, MOVK, type, rd, value >> s1, s1);\n         }\n+        return;\n     }\n+\n+    /* For more than 2 insns, dump it into the constant pool.  */\n+    new_pool_label(s, value, R_AARCH64_CONDBR19, s->code_ptr, 0);\n+    tcg_out_insn(s, 3305, LDR, 0, rd);\n }\n \n /* Define something more legible for general use.  */\n@@ -2030,6 +2024,14 @@ static void tcg_target_qemu_prologue(TCGContext *s)\n     tcg_out_insn(s, 3207, RET, TCG_REG_LR);\n }\n \n+static void tcg_out_nop_fill(tcg_insn_unit *p, int count)\n+{\n+    int i;\n+    for (i = 0; i < count; ++i) {\n+        p[i] = NOP;\n+    }\n+}\n+\n typedef struct {\n     DebugFrameHeader h;\n     uint8_t fde_def_cfa[4];\n","prefixes":["PULL","12/23"]}