{"id":810021,"url":"http://patchwork.ozlabs.org/api/1.2/patches/810021/?format=json","web_url":"http://patchwork.ozlabs.org/project/uboot/patch/1504602267-31283-9-git-send-email-patrice.chotard@st.com/","project":{"id":18,"url":"http://patchwork.ozlabs.org/api/1.2/projects/18/?format=json","name":"U-Boot","link_name":"uboot","list_id":"u-boot.lists.denx.de","list_email":"u-boot@lists.denx.de","web_url":null,"scm_url":null,"webscm_url":null,"list_archive_url":"","list_archive_url_format":"","commit_url_format":""},"msgid":"<1504602267-31283-9-git-send-email-patrice.chotard@st.com>","list_archive_url":null,"date":"2017-09-05T09:04:25","name":"[U-Boot,v10,08/10] ARM: dts: STiH410: set DWC3 dual role mode to peripheral","commit_ref":null,"pull_url":null,"state":"accepted","archived":false,"hash":"1d13d8bd00b14385eef60bf362267a691ce3b833","submitter":{"id":63958,"url":"http://patchwork.ozlabs.org/api/1.2/people/63958/?format=json","name":"Patrice CHOTARD","email":"patrice.chotard@st.com"},"delegate":{"id":3651,"url":"http://patchwork.ozlabs.org/api/1.2/users/3651/?format=json","username":"trini","first_name":"Tom","last_name":"Rini","email":"trini@ti.com"},"mbox":"http://patchwork.ozlabs.org/project/uboot/patch/1504602267-31283-9-git-send-email-patrice.chotard@st.com/mbox/","series":[{"id":1524,"url":"http://patchwork.ozlabs.org/api/1.2/series/1524/?format=json","web_url":"http://patchwork.ozlabs.org/project/uboot/list/?series=1524","date":"2017-09-05T09:04:18","name":"STiH410-B2260: add reset, usb and fastboot support","version":10,"mbox":"http://patchwork.ozlabs.org/series/1524/mbox/"}],"comments":"http://patchwork.ozlabs.org/api/patches/810021/comments/","check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/810021/checks/","tags":{},"related":[],"headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@bilbo.ozlabs.org","Authentication-Results":"ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=lists.denx.de\n\t(client-ip=81.169.180.215; helo=lists.denx.de;\n\tenvelope-from=u-boot-bounces@lists.denx.de;\n\treceiver=)","Received":["from lists.denx.de (dione.denx.de [81.169.180.215])\n\tby ozlabs.org (Postfix) with ESMTP id 3xmgtm4vNnz9sPk\n\tfor ;\n\tTue, 5 Sep 2017 19:11:12 +1000 (AEST)","by lists.denx.de (Postfix, from userid 105)\n\tid 5FD81C21F73; Tue, 5 Sep 2017 09:09:04 +0000 (UTC)","from lists.denx.de (localhost [IPv6:::1])\n\tby lists.denx.de (Postfix) with ESMTP id 6C6D7C21F78;\n\tTue, 5 Sep 2017 09:08:31 +0000 (UTC)","by lists.denx.de (Postfix, from userid 105)\n\tid 99D49C21EE6; Tue, 5 Sep 2017 09:06:05 +0000 (UTC)","from mx07-00178001.pphosted.com (mx08-00178001.pphosted.com\n\t[91.207.212.93])\n\tby lists.denx.de (Postfix) with ESMTPS id 86370C21FBA\n\tfor ; Tue, 5 Sep 2017 09:04:45 +0000 (UTC)","from pps.filterd (m0046661.ppops.net [127.0.0.1])\n\tby mx08-.pphosted.com (8.16.0.21/8.16.0.21) with SMTP id\n\tv857cqA1019865; Tue, 5 Sep 2017 11:04:37 +0200","from beta.dmz-eu.st.com (beta.dmz-eu.st.com [164.129.1.35])\n\tby mx08-00178001.pphosted.com with ESMTP id 2crp3j8pa7-1\n\t(version=TLSv1 cipher=ECDHE-RSA-AES256-SHA bits=256 verify=NOT);\n\tTue, 05 Sep 2017 11:04:37 +0200","from zeta.dmz-eu.st.com (zeta.dmz-eu.st.com [164.129.230.9])\n\tby beta.dmz-eu.st.com (STMicroelectronics) with ESMTP id 5CE5358;\n\tTue, 5 Sep 2017 09:04:36 +0000 (GMT)","from Webmail-eu.st.com (sfhdag6node3.st.com [10.75.127.18])\n\tby zeta.dmz-eu.st.com (STMicroelectronics) with ESMTP id 461B5160A;\n\tTue, 5 Sep 2017 09:04:36 +0000 (GMT)","from localhost (10.75.127.51) by SFHDAG6NODE3.st.com (10.75.127.18)\n\twith Microsoft SMTP Server (TLS) id 15.0.1178.4;\n\tTue, 5 Sep 2017 11:04:35 +0200"],"X-Spam-Checker-Version":"SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de","X-Spam-Level":"","X-Spam-Status":"No, score=-0.7 required=5.0 tests=RCVD_IN_DNSWL_LOW\n\tautolearn=unavailable autolearn_force=no version=3.4.0","From":"","To":", , , \n\t, ","Date":"Tue, 5 Sep 2017 11:04:25 +0200","Message-ID":"<1504602267-31283-9-git-send-email-patrice.chotard@st.com>","X-Mailer":"git-send-email 1.9.1","In-Reply-To":"<1504602267-31283-1-git-send-email-patrice.chotard@st.com>","References":"<1504602267-31283-1-git-send-email-patrice.chotard@st.com>","MIME-Version":"1.0","X-Originating-IP":"[10.75.127.51]","X-ClientProxiedBy":"SFHDAG3NODE2.st.com (10.75.127.8) To SFHDAG6NODE3.st.com\n\t(10.75.127.18)","X-Proofpoint-Virus-Version":"vendor=fsecure engine=2.50.10432:, ,\n\tdefinitions=2017-09-05_03:, , signatures=0","Subject":"[U-Boot] [PATCH v10 08/10] ARM: dts: STiH410: set DWC3 dual role\n\tmode to peripheral","X-BeenThere":"u-boot@lists.denx.de","X-Mailman-Version":"2.1.18","Precedence":"list","List-Id":"U-Boot discussion ","List-Unsubscribe":",\n\t","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n\t","Content-Type":"text/plain; charset=\"utf-8\"","Content-Transfer-Encoding":"base64","Errors-To":"u-boot-bounces@lists.denx.de","Sender":"\"U-Boot\" "},"content":"From: Patrice Chotard \n\nOn STi 96boards, configure by default the micro USB connector\n(managed by DWC3 hardware block) in peripheral mode.\nThis will allow to use fastboot feature.\n\nSigned-off-by: Patrice Chotard \nReviewed-by: Simon Glass \n---\n\nv10:\t_ none\nv9:\t_ none\nv8:\t_ add Reviewed-by: Simon Glass\nv7:\t_ none\n\n arch/arm/dts/stih407-family.dtsi | 2 +-\n 1 file changed, 1 insertion(+), 1 deletion(-)","diff":"diff --git a/arch/arm/dts/stih407-family.dtsi b/arch/arm/dts/stih407-family.dtsi\nindex 452ac1c..6c6de58 100644\n--- a/arch/arm/dts/stih407-family.dtsi\n+++ b/arch/arm/dts/stih407-family.dtsi\n@@ -655,7 +655,7 @@\n \t\t\t\tcompatible\t= \"snps,dwc3\";\n \t\t\t\treg\t\t= <0x09900000 0x100000>;\n \t\t\t\tinterrupts\t= ;\n-\t\t\t\tdr_mode\t\t= \"host\";\n+\t\t\t\tdr_mode\t\t= \"peripheral\";\n \t\t\t\tphy-names\t= \"usb2-phy\", \"usb3-phy\";\n \t\t\t\tphys\t\t= <&usb2_picophy0>,\n \t\t\t\t\t\t <&phy_port2 PHY_TYPE_USB3>;\n","prefixes":["U-Boot","v10","08/10"]}