{"id":810017,"url":"http://patchwork.ozlabs.org/api/1.2/patches/810017/?format=json","web_url":"http://patchwork.ozlabs.org/project/uboot/patch/1504602267-31283-2-git-send-email-patrice.chotard@st.com/","project":{"id":18,"url":"http://patchwork.ozlabs.org/api/1.2/projects/18/?format=json","name":"U-Boot","link_name":"uboot","list_id":"u-boot.lists.denx.de","list_email":"u-boot@lists.denx.de","web_url":null,"scm_url":null,"webscm_url":null,"list_archive_url":"","list_archive_url_format":"","commit_url_format":""},"msgid":"<1504602267-31283-2-git-send-email-patrice.chotard@st.com>","list_archive_url":null,"date":"2017-09-05T09:04:18","name":"[U-Boot,v10,01/10] mmc: sti_sdhci: Rework sti_mmc_core_config()","commit_ref":null,"pull_url":null,"state":"accepted","archived":false,"hash":"7b2e5e8db03c1bca51d9fe4f6132ebbe6e84d5c3","submitter":{"id":63958,"url":"http://patchwork.ozlabs.org/api/1.2/people/63958/?format=json","name":"Patrice CHOTARD","email":"patrice.chotard@st.com"},"delegate":{"id":3651,"url":"http://patchwork.ozlabs.org/api/1.2/users/3651/?format=json","username":"trini","first_name":"Tom","last_name":"Rini","email":"trini@ti.com"},"mbox":"http://patchwork.ozlabs.org/project/uboot/patch/1504602267-31283-2-git-send-email-patrice.chotard@st.com/mbox/","series":[{"id":1524,"url":"http://patchwork.ozlabs.org/api/1.2/series/1524/?format=json","web_url":"http://patchwork.ozlabs.org/project/uboot/list/?series=1524","date":"2017-09-05T09:04:18","name":"STiH410-B2260: add reset, usb and fastboot support","version":10,"mbox":"http://patchwork.ozlabs.org/series/1524/mbox/"}],"comments":"http://patchwork.ozlabs.org/api/patches/810017/comments/","check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/810017/checks/","tags":{},"related":[],"headers":{"Return-Path":"<u-boot-bounces@lists.denx.de>","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@bilbo.ozlabs.org","Authentication-Results":"ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=lists.denx.de\n\t(client-ip=81.169.180.215; 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charset=\"utf-8\"","Content-Transfer-Encoding":"base64","Errors-To":"u-boot-bounces@lists.denx.de","Sender":"\"U-Boot\" <u-boot-bounces@lists.denx.de>"},"content":"From: Patrice Chotard <patrice.chotard@st.com>\n\nUse struct udevice* as input parameter. Previous\nparameters are retrieved through plat and priv data.\n\nThis to prepare to use the reset framework.\n\nSigned-off-by: Patrice Chotard <patrice.chotard@st.com>\nReviewed-by: Jaehoon Chung <jh80.chung@samsung.com>\nReviewed-by: Simon Glass <sjg@chromium.org>\n---\nv10:\t_ none\nv9:\t_ none\nv8:\t_ none\nv7:\t_ none\nv6:\t_ add reviewed-by Simon Glass\nv5:\t_ none\nv4:\t_ none\nv3:\t_ none\nv2:\t_ none\n\n drivers/mmc/sti_sdhci.c | 33 ++++++++++++++++++---------------\n 1 file changed, 18 insertions(+), 15 deletions(-)","diff":"diff --git a/drivers/mmc/sti_sdhci.c b/drivers/mmc/sti_sdhci.c\nindex f85f6b4..714afd9 100644\n--- a/drivers/mmc/sti_sdhci.c\n+++ b/drivers/mmc/sti_sdhci.c\n@@ -16,6 +16,7 @@ DECLARE_GLOBAL_DATA_PTR;\n struct sti_sdhci_plat {\n \tstruct mmc_config cfg;\n \tstruct mmc mmc;\n+\tint instance;\n };\n \n /*\n@@ -26,8 +27,8 @@ struct sti_sdhci_plat {\n \n /**\n  * sti_mmc_core_config: configure the Arasan HC\n- * @regbase: base address\n- * @mmc_instance: mmc instance id\n+ * @dev : udevice\n+ *\n  * Description: this function is to configure the Arasan MMC HC.\n  * This should be called when the system starts in case of, on the SoC,\n  * it is needed to configure the host controller.\n@@ -36,33 +37,35 @@ struct sti_sdhci_plat {\n  * W/o these settings the SDHCI could configure and use the embedded controller\n  * with limited features.\n  */\n-static void sti_mmc_core_config(const u32 regbase, int mmc_instance)\n+static void sti_mmc_core_config(struct udevice *dev)\n {\n+\tstruct sti_sdhci_plat *plat = dev_get_platdata(dev);\n+\tstruct sdhci_host *host = dev_get_priv(dev);\n \tunsigned long *sysconf;\n \n \t/* only MMC1 has a reset line */\n-\tif (mmc_instance) {\n+\tif (plat->instance) {\n \t\tsysconf = (unsigned long *)(STIH410_SYSCONF5_BASE +\n \t\t\t  ST_MMC_CCONFIG_REG_5);\n \t\tgeneric_set_bit(SYSCONF_MMC1_ENABLE_BIT, sysconf);\n \t}\n \n \twritel(STI_FLASHSS_MMC_CORE_CONFIG_1,\n-\t       regbase + FLASHSS_MMC_CORE_CONFIG_1);\n+\t       host->ioaddr + FLASHSS_MMC_CORE_CONFIG_1);\n \n-\tif (mmc_instance) {\n+\tif (plat->instance) {\n \t\twritel(STI_FLASHSS_MMC_CORE_CONFIG2,\n-\t\t       regbase + FLASHSS_MMC_CORE_CONFIG_2);\n+\t\t       host->ioaddr + FLASHSS_MMC_CORE_CONFIG_2);\n \t\twritel(STI_FLASHSS_MMC_CORE_CONFIG3,\n-\t\t       regbase + FLASHSS_MMC_CORE_CONFIG_3);\n+\t\t       host->ioaddr + FLASHSS_MMC_CORE_CONFIG_3);\n \t} else {\n \t\twritel(STI_FLASHSS_SDCARD_CORE_CONFIG2,\n-\t\t       regbase + FLASHSS_MMC_CORE_CONFIG_2);\n+\t\t       host->ioaddr + FLASHSS_MMC_CORE_CONFIG_2);\n \t\twritel(STI_FLASHSS_SDCARD_CORE_CONFIG3,\n-\t\t       regbase + FLASHSS_MMC_CORE_CONFIG_3);\n+\t\t       host->ioaddr + FLASHSS_MMC_CORE_CONFIG_3);\n \t}\n \twritel(STI_FLASHSS_MMC_CORE_CONFIG4,\n-\t       regbase + FLASHSS_MMC_CORE_CONFIG_4);\n+\t       host->ioaddr + FLASHSS_MMC_CORE_CONFIG_4);\n }\n \n static int sti_sdhci_probe(struct udevice *dev)\n@@ -70,7 +73,7 @@ static int sti_sdhci_probe(struct udevice *dev)\n \tstruct mmc_uclass_priv *upriv = dev_get_uclass_priv(dev);\n \tstruct sti_sdhci_plat *plat = dev_get_platdata(dev);\n \tstruct sdhci_host *host = dev_get_priv(dev);\n-\tint ret, mmc_instance;\n+\tint ret;\n \n \t/*\n \t * identify current mmc instance, mmc1 has a reset, not mmc0\n@@ -79,11 +82,11 @@ static int sti_sdhci_probe(struct udevice *dev)\n \t */\n \n \tif (fdt_getprop(gd->fdt_blob, dev_of_offset(dev), \"resets\", NULL))\n-\t\tmmc_instance = 1;\n+\t\tplat->instance = 1;\n \telse\n-\t\tmmc_instance = 0;\n+\t\tplat->instance = 0;\n \n-\tsti_mmc_core_config((const u32) host->ioaddr, mmc_instance);\n+\tsti_mmc_core_config(dev);\n \n \thost->quirks = SDHCI_QUIRK_WAIT_SEND_CMD |\n \t\t       SDHCI_QUIRK_32BIT_DMA_ADDR |\n","prefixes":["U-Boot","v10","01/10"]}