{"id":809601,"url":"http://patchwork.ozlabs.org/api/1.2/patches/809601/?format=json","web_url":"http://patchwork.ozlabs.org/project/uboot/patch/20170904104655.29103-8-ran.wang_1@nxp.com/","project":{"id":18,"url":"http://patchwork.ozlabs.org/api/1.2/projects/18/?format=json","name":"U-Boot","link_name":"uboot","list_id":"u-boot.lists.denx.de","list_email":"u-boot@lists.denx.de","web_url":null,"scm_url":null,"webscm_url":null,"list_archive_url":"","list_archive_url_format":"","commit_url_format":""},"msgid":"<20170904104655.29103-8-ran.wang_1@nxp.com>","list_archive_url":null,"date":"2017-09-04T10:46:54","name":"[U-Boot,v5,8/9] armv7: Add workaround for USB erratum A-008997","commit_ref":null,"pull_url":null,"state":"accepted","archived":false,"hash":"d1d68f7390db0f56f5ebf52f2a97f5b2ba1e5060","submitter":{"id":71939,"url":"http://patchwork.ozlabs.org/api/1.2/people/71939/?format=json","name":"Ran Wang","email":"ran.wang_1@nxp.com"},"delegate":{"id":2666,"url":"http://patchwork.ozlabs.org/api/1.2/users/2666/?format=json","username":"yorksun","first_name":"York","last_name":"Sun","email":"yorksun@freescale.com"},"mbox":"http://patchwork.ozlabs.org/project/uboot/patch/20170904104655.29103-8-ran.wang_1@nxp.com/mbox/","series":[{"id":1355,"url":"http://patchwork.ozlabs.org/api/1.2/series/1355/?format=json","web_url":"http://patchwork.ozlabs.org/project/uboot/list/?series=1355","date":"2017-09-04T10:46:47","name":"[U-Boot,v5,1/9] armv8: Add scfg_clrsetbits_32(), scfg_clrbits_32()","version":5,"mbox":"http://patchwork.ozlabs.org/series/1355/mbox/"}],"comments":"http://patchwork.ozlabs.org/api/patches/809601/comments/","check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/809601/checks/","tags":{},"related":[],"headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@bilbo.ozlabs.org","Authentication-Results":["ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=lists.denx.de\n\t(client-ip=81.169.180.215; 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","X-Forefront-PRVS":"0420213CCD","SpamDiagnosticOutput":"1:99","SpamDiagnosticMetadata":"NSPM","X-MS-Exchange-CrossTenant-OriginalArrivalTime":"04 Sep 2017 11:04:34.9518\n\t(UTC)","X-MS-Exchange-CrossTenant-Id":"5afe0b00-7697-4969-b663-5eab37d5f47e","X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp":"TenantId=5afe0b00-7697-4969-b663-5eab37d5f47e;\n\tIp=[192.88.158.2]; \n\tHelo=[az84smr01.freescale.net]","X-MS-Exchange-CrossTenant-FromEntityHeader":"HybridOnPrem","X-MS-Exchange-Transport-CrossTenantHeadersStamped":"SN2PR03MB2270","Cc":"Priyanka Jain ,\n\tSuresh Gupta , ran.wang_1@nxp.com","Subject":"[U-Boot] [PATCH v5 8/9] armv7: Add workaround for USB erratum\n\tA-008997","X-BeenThere":"u-boot@lists.denx.de","X-Mailman-Version":"2.1.18","Precedence":"list","List-Id":"U-Boot discussion ","List-Unsubscribe":",\n\t","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n\t","Content-Type":"text/plain; charset=\"utf-8\"","Content-Transfer-Encoding":"base64","Errors-To":"u-boot-bounces@lists.denx.de","Sender":"\"U-Boot\" "},"content":"Low Frequency Periodic Singaling (LFPS) Peak-to-Peak Differential\nOutput Voltage Test Compliance fails using default transmitter settings\n\nChange config of transmitter signal swings by setting register\nPCSTXSWINGFULL to 0x47 to pass compliance tests.\n\nSigned-off-by: Sriram Dash \nSigned-off-by: Rajesh Bhagat \nSigned-off-by: Suresh Gupta \nSigned-off-by: Ran Wang \n---\nChange in v5:\n\tUse clrsetbits_be32() instead.\n\nChange in v4:\n\tUpdate commit message about register setting.\n\tRename USB_PCSTXSWINGFULL to SCFG_USB_PCSTXSWINGFULL.\n\nChange in v3:\n- none\n\nChange in v2:\n\tIn function erratum_a008997():\n\t1.Put a blank line after variable declaration.\n\n arch/arm/cpu/armv7/ls102xa/Kconfig | 6 ++++++\n arch/arm/cpu/armv7/ls102xa/soc.c | 13 +++++++++++++\n arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h | 3 +++\n 3 files changed, 22 insertions(+)","diff":"diff --git a/arch/arm/cpu/armv7/ls102xa/Kconfig b/arch/arm/cpu/armv7/ls102xa/Kconfig\nindex f09766cf03..ee09dd6fed 100644\n--- a/arch/arm/cpu/armv7/ls102xa/Kconfig\n+++ b/arch/arm/cpu/armv7/ls102xa/Kconfig\n@@ -7,6 +7,7 @@ config ARCH_LS1021A\n \tselect SYS_FSL_ERRATUM_A010315\n \tselect SYS_FSL_ERRATUM_A009008\n \tselect SYS_FSL_ERRATUM_A009798\n+\tselect SYS_FSL_ERRATUM_A008997\n \tselect SYS_FSL_SRDS_1\n \tselect SYS_HAS_SERDES\n \tselect SYS_FSL_DDR_BE if SYS_FSL_DDR\n@@ -64,6 +65,11 @@ config SYS_FSL_ERRATUM_A009798\n \thelp\n \t\tWorkaround for USB PHY erratum A009798\n \n+config SYS_FSL_ERRATUM_A008997\n+\tbool\n+\thelp\n+\t\tWorkaround for USB PHY erratum A008997\n+\n config SYS_FSL_SRDS_1\n \tbool\n \ndiff --git a/arch/arm/cpu/armv7/ls102xa/soc.c b/arch/arm/cpu/armv7/ls102xa/soc.c\nindex a0e3c85421..f409ad7f44 100644\n--- a/arch/arm/cpu/armv7/ls102xa/soc.c\n+++ b/arch/arm/cpu/armv7/ls102xa/soc.c\n@@ -81,6 +81,18 @@ static void erratum_a009798(void)\n #endif /* CONFIG_SYS_FSL_ERRATUM_A009798 */\n }\n \n+static void erratum_a008997(void)\n+{\n+#ifdef CONFIG_SYS_FSL_ERRATUM_A008997\n+\tu32 __iomem *scfg = (u32 __iomem *)SCFG_BASE;\n+\n+\tclrsetbits_be32(scfg + SCFG_USB3PRM2CR / 4,\n+\t\t\tSCFG_USB_PCSTXSWINGFULL_MASK,\n+\t\t\tSCFG_USB_PCSTXSWINGFULL_VAL);\n+#endif /* CONFIG_SYS_FSL_ERRATUM_A008997 */\n+}\n+\n+\n void s_init(void)\n {\n }\n@@ -170,6 +182,7 @@ int arch_soc_init(void)\n \t/* Erratum */\n \terratum_a009008();\n \terratum_a009798();\n+\terratum_a008997();\n \n \treturn 0;\n }\ndiff --git a/arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h b/arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h\nindex 5762d3308a..e5c06170da 100644\n--- a/arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h\n+++ b/arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h\n@@ -177,6 +177,9 @@ struct ccsr_gur {\n #define SCFG_USB3PRM1CR\t\t\t0x070\n #define SCFG_USB_TXVREFTUNE\t\t0x9\n #define SCFG_USB_SQRXTUNE_MASK\t\t0x7\n+#define SCFG_USB3PRM2CR\t\t\t0x074\n+#define SCFG_USB_PCSTXSWINGFULL_MASK\t0x0000FE00\n+#define SCFG_USB_PCSTXSWINGFULL_VAL\t\t0x00008E00\n \n /* Supplemental Configuration Unit */\n struct ccsr_scfg {\n","prefixes":["U-Boot","v5","8/9"]}