{"id":809600,"url":"http://patchwork.ozlabs.org/api/1.2/patches/809600/?format=json","web_url":"http://patchwork.ozlabs.org/project/uboot/patch/20170904104655.29103-7-ran.wang_1@nxp.com/","project":{"id":18,"url":"http://patchwork.ozlabs.org/api/1.2/projects/18/?format=json","name":"U-Boot","link_name":"uboot","list_id":"u-boot.lists.denx.de","list_email":"u-boot@lists.denx.de","web_url":null,"scm_url":null,"webscm_url":null,"list_archive_url":"","list_archive_url_format":"","commit_url_format":""},"msgid":"<20170904104655.29103-7-ran.wang_1@nxp.com>","list_archive_url":null,"date":"2017-09-04T10:46:53","name":"[U-Boot,v5,7/9] armv7: Add workaround for USB erratum A-009798","commit_ref":null,"pull_url":null,"state":"accepted","archived":false,"hash":"f7ced082aa1cfafeb70d29d2f154c1b7f697b487","submitter":{"id":71939,"url":"http://patchwork.ozlabs.org/api/1.2/people/71939/?format=json","name":"Ran Wang","email":"ran.wang_1@nxp.com"},"delegate":{"id":2666,"url":"http://patchwork.ozlabs.org/api/1.2/users/2666/?format=json","username":"yorksun","first_name":"York","last_name":"Sun","email":"yorksun@freescale.com"},"mbox":"http://patchwork.ozlabs.org/project/uboot/patch/20170904104655.29103-7-ran.wang_1@nxp.com/mbox/","series":[{"id":1355,"url":"http://patchwork.ozlabs.org/api/1.2/series/1355/?format=json","web_url":"http://patchwork.ozlabs.org/project/uboot/list/?series=1355","date":"2017-09-04T10:46:47","name":"[U-Boot,v5,1/9] armv8: Add scfg_clrsetbits_32(), scfg_clrbits_32()","version":5,"mbox":"http://patchwork.ozlabs.org/series/1355/mbox/"}],"comments":"http://patchwork.ozlabs.org/api/patches/809600/comments/","check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/809600/checks/","tags":{},"related":[],"headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@bilbo.ozlabs.org","Authentication-Results":["ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=lists.denx.de\n\t(client-ip=81.169.180.215; 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\n\tclient-ip=192.88.158.2; helo=az84smr01.freescale.net;","From":"Ran Wang ","To":"open list , York Sun ","Date":"Mon, 4 Sep 2017 18:46:53 +0800","Message-ID":"<20170904104655.29103-7-ran.wang_1@nxp.com>","X-Mailer":"git-send-email 2.14.1","In-Reply-To":"<20170904104655.29103-1-ran.wang_1@nxp.com>","References":"<20170904104655.29103-1-ran.wang_1@nxp.com>","X-EOPAttributedMessage":"0","X-Matching-Connectors":"131489966718095674;\n\t(91ab9b29-cfa4-454e-5278-08d120cd25b8); ()","X-Forefront-Antispam-Report":"CIP:192.88.158.2; IPV:NLI; CTRY:US; EFV:NLI;\n\tSFV:NSPM;\n\tSFS:(10009020)(6009001)(336005)(39860400002)(39380400002)(2980300002)(1109001)(1110001)(339900001)(199003)(189002)(53936002)(4326008)(54906002)(105606002)(36756003)(106466001)(85426001)(1076002)(33646002)(5003940100001)(6666003)(5660300001)(6636002)(104016004)(8656003)(76176999)(50986999)(7416002)(8676002)(189998001)(69596002)(77096006)(97736004)(2906002)(50226002)(47776003)(626005)(81166006)(81156014)(68736007)(498600001)(2950100002)(48376002)(86362001)(575784001)(356003)(8936002)(50466002)(305945005);\n\tDIR:OUT; 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","X-Forefront-PRVS":"0420213CCD","SpamDiagnosticOutput":"1:99","SpamDiagnosticMetadata":"NSPM","X-MS-Exchange-CrossTenant-OriginalArrivalTime":"04 Sep 2017 11:04:31.5599\n\t(UTC)","X-MS-Exchange-CrossTenant-Id":"5afe0b00-7697-4969-b663-5eab37d5f47e","X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp":"TenantId=5afe0b00-7697-4969-b663-5eab37d5f47e;\n\tIp=[192.88.158.2]; \n\tHelo=[az84smr01.freescale.net]","X-MS-Exchange-CrossTenant-FromEntityHeader":"HybridOnPrem","X-MS-Exchange-Transport-CrossTenantHeadersStamped":"CY1PR03MB2268","Cc":"Priyanka Jain ,\n\tSuresh Gupta , ran.wang_1@nxp.com","Subject":"[U-Boot] [PATCH v5 7/9] armv7: Add workaround for USB erratum\n\tA-009798","X-BeenThere":"u-boot@lists.denx.de","X-Mailman-Version":"2.1.18","Precedence":"list","List-Id":"U-Boot discussion ","List-Unsubscribe":",\n\t","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n\t","Content-Type":"text/plain; charset=\"utf-8\"","Content-Transfer-Encoding":"base64","Errors-To":"u-boot-bounces@lists.denx.de","Sender":"\"U-Boot\" "},"content":"The default setting for USB High Speed Squelch Threshold results\nin a threshold close to or lower than 100mV. This leads to Receive\nCompliance test failure for a 100mV threshold.\n\nShift the threshold from ~100mV towards ~130mV by setting SQRXTUNE\nto 0x0 to pass USB High Speed Receiver Sensitivity Compliance test.\n\nSigned-off-by: Sriram Dash \nSigned-off-by: Rajesh Bhagat \nSigned-off-by: Suresh Gupta \nSigned-off-by: Ran Wang \n---\nChange in v5:\n\tUse clrbits_be32() instead.\n\nChange in v4:\n\tUpdate commit message about register setting.\n\tClean up the math in register setting.\n\tRedefine SQRXTUNE to make code clearer.\n\nChange in v3:\n- none\n\nChange in v2:\n\tIn function erratum_a009798():\n\t1.Put a blank line after variable declaration.\n\n arch/arm/cpu/armv7/ls102xa/Kconfig | 8 +++++++-\n arch/arm/cpu/armv7/ls102xa/soc.c | 10 ++++++++++\n arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h | 1 +\n 3 files changed, 18 insertions(+), 1 deletion(-)","diff":"diff --git a/arch/arm/cpu/armv7/ls102xa/Kconfig b/arch/arm/cpu/armv7/ls102xa/Kconfig\nindex 599cc28249..f09766cf03 100644\n--- a/arch/arm/cpu/armv7/ls102xa/Kconfig\n+++ b/arch/arm/cpu/armv7/ls102xa/Kconfig\n@@ -6,6 +6,7 @@ config ARCH_LS1021A\n \tselect SYS_FSL_ERRATUM_A009942\n \tselect SYS_FSL_ERRATUM_A010315\n \tselect SYS_FSL_ERRATUM_A009008\n+\tselect SYS_FSL_ERRATUM_A009798\n \tselect SYS_FSL_SRDS_1\n \tselect SYS_HAS_SERDES\n \tselect SYS_FSL_DDR_BE if SYS_FSL_DDR\n@@ -56,7 +57,12 @@ config SYS_FSL_ERRATUM_A010315\n config SYS_FSL_ERRATUM_A009008\n \tbool\n \thelp\n-\t\tWorkaround for USB erratum A009008\n+\t\tWorkaround for USB PHY erratum A009008\n+\n+config SYS_FSL_ERRATUM_A009798\n+\tbool\n+\thelp\n+\t\tWorkaround for USB PHY erratum A009798\n \n config SYS_FSL_SRDS_1\n \tbool\ndiff --git a/arch/arm/cpu/armv7/ls102xa/soc.c b/arch/arm/cpu/armv7/ls102xa/soc.c\nindex 1c59a62a0e..a0e3c85421 100644\n--- a/arch/arm/cpu/armv7/ls102xa/soc.c\n+++ b/arch/arm/cpu/armv7/ls102xa/soc.c\n@@ -71,6 +71,15 @@ static void erratum_a009008(void)\n #endif /* CONFIG_SYS_FSL_ERRATUM_A009008 */\n }\n \n+static void erratum_a009798(void)\n+{\n+#ifdef CONFIG_SYS_FSL_ERRATUM_A009798\n+\tu32 __iomem *scfg = (u32 __iomem *)SCFG_BASE;\n+\n+\tclrbits_be32(scfg + SCFG_USB3PRM1CR / 4,\n+\t\t\tSCFG_USB_SQRXTUNE_MASK << 23);\n+#endif /* CONFIG_SYS_FSL_ERRATUM_A009798 */\n+}\n \n void s_init(void)\n {\n@@ -160,6 +169,7 @@ int arch_soc_init(void)\n \n \t/* Erratum */\n \terratum_a009008();\n+\terratum_a009798();\n \n \treturn 0;\n }\ndiff --git a/arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h b/arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h\nindex ba59f40382..5762d3308a 100644\n--- a/arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h\n+++ b/arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h\n@@ -176,6 +176,7 @@ struct ccsr_gur {\n #define SCFG_BASE\t\t\t0x01570000\n #define SCFG_USB3PRM1CR\t\t\t0x070\n #define SCFG_USB_TXVREFTUNE\t\t0x9\n+#define SCFG_USB_SQRXTUNE_MASK\t\t0x7\n \n /* Supplemental Configuration Unit */\n struct ccsr_scfg {\n","prefixes":["U-Boot","v5","7/9"]}