{"id":809516,"url":"http://patchwork.ozlabs.org/api/1.2/patches/809516/?format=json","web_url":"http://patchwork.ozlabs.org/project/uboot/patch/20170904053832.12229-1-judge.packham@gmail.com/","project":{"id":18,"url":"http://patchwork.ozlabs.org/api/1.2/projects/18/?format=json","name":"U-Boot","link_name":"uboot","list_id":"u-boot.lists.denx.de","list_email":"u-boot@lists.denx.de","web_url":null,"scm_url":null,"webscm_url":null,"list_archive_url":"","list_archive_url_format":"","commit_url_format":""},"msgid":"<20170904053832.12229-1-judge.packham@gmail.com>","list_archive_url":null,"date":"2017-09-04T05:38:31","name":"[U-Boot,next,v2,1/2] ARM: mvebu: Add SoC IDs for Marvell's integrated CPUs","commit_ref":null,"pull_url":null,"state":"awaiting-upstream","archived":false,"hash":"9f76c3342ee740e7c4a2caf77a02e8748a002a85","submitter":{"id":6125,"url":"http://patchwork.ozlabs.org/api/1.2/people/6125/?format=json","name":"Chris Packham","email":"judge.packham@gmail.com"},"delegate":null,"mbox":"http://patchwork.ozlabs.org/project/uboot/patch/20170904053832.12229-1-judge.packham@gmail.com/mbox/","series":[{"id":1306,"url":"http://patchwork.ozlabs.org/api/1.2/series/1306/?format=json","web_url":"http://patchwork.ozlabs.org/project/uboot/list/?series=1306","date":"2017-09-04T05:38:31","name":"[U-Boot,next,v2,1/2] ARM: mvebu: Add SoC IDs for Marvell's integrated CPUs","version":2,"mbox":"http://patchwork.ozlabs.org/series/1306/mbox/"}],"comments":"http://patchwork.ozlabs.org/api/patches/809516/comments/","check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/809516/checks/","tags":{},"related":[],"headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@bilbo.ozlabs.org","Authentication-Results":["ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=lists.denx.de\n\t(client-ip=81.169.180.215; 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charset=\"utf-8\"","Content-Transfer-Encoding":"base64","Errors-To":"u-boot-bounces@lists.denx.de","Sender":"\"U-Boot\" "},"content":"These SoCs are network packet processors (switch chips) with integrated\nARMv7 cores. They share a great deal of commonality with the Armada-XP\nCPUs.\n\nSigned-off-by: Chris Packham \n---\nThere are actually a number of IDs for these chips, probably a dozen in\ntotal. I haven't enumerated them all in this patch, the 98DX4251,\n98DX3336 and 98DX3236 are the base versions in their respective ranges.\nThese 3 IDs also happen to suit my immediate need but I can add the\nadditional ones in an follow up patch or a re-roll of this one.\n\nChanges in v2:\n- none\n\n arch/arm/mach-mvebu/cpu.c | 14 ++++++++++++++\n arch/arm/mach-mvebu/include/mach/cpu.h | 1 +\n arch/arm/mach-mvebu/include/mach/soc.h | 3 +++\n 3 files changed, 18 insertions(+)","diff":"diff --git a/arch/arm/mach-mvebu/cpu.c b/arch/arm/mach-mvebu/cpu.c\nindex 14457317ce76..f7f83bfa3655 100644\n--- a/arch/arm/mach-mvebu/cpu.c\n+++ b/arch/arm/mach-mvebu/cpu.c\n@@ -62,6 +62,11 @@ int mvebu_soc_family(void)\n \tcase SOC_88F6820_ID:\n \tcase SOC_88F6828_ID:\n \t\treturn MVEBU_SOC_A38X;\n+\n+\tcase SOC_98DX3236_ID:\n+\tcase SOC_98DX3336_ID:\n+\tcase SOC_98DX4251_ID:\n+\t\treturn MVEBU_SOC_MSYS;\n \t}\n \n \treturn MVEBU_SOC_UNKNOWN;\n@@ -208,6 +213,15 @@ int print_cpuinfo(void)\n \tcase SOC_88F6828_ID:\n \t\tputs(\"MV88F6828-\");\n \t\tbreak;\n+\tcase SOC_98DX3236_ID:\n+\t\tputs(\"98DX3236-\");\n+\t\tbreak;\n+\tcase SOC_98DX3336_ID:\n+\t\tputs(\"98DX3336-\");\n+\t\tbreak;\n+\tcase SOC_98DX4251_ID:\n+\t\tputs(\"98DX4251-\");\n+\t\tbreak;\n \tdefault:\n \t\tputs(\"Unknown-\");\n \t\tbreak;\ndiff --git a/arch/arm/mach-mvebu/include/mach/cpu.h b/arch/arm/mach-mvebu/include/mach/cpu.h\nindex d241eea9568d..b67b77ae0df4 100644\n--- a/arch/arm/mach-mvebu/include/mach/cpu.h\n+++ b/arch/arm/mach-mvebu/include/mach/cpu.h\n@@ -65,6 +65,7 @@ enum {\n \tMVEBU_SOC_AXP,\n \tMVEBU_SOC_A375,\n \tMVEBU_SOC_A38X,\n+\tMVEBU_SOC_MSYS,\n \tMVEBU_SOC_UNKNOWN,\n };\n \ndiff --git a/arch/arm/mach-mvebu/include/mach/soc.h b/arch/arm/mach-mvebu/include/mach/soc.h\nindex 0900e4008c12..cdd64fb28527 100644\n--- a/arch/arm/mach-mvebu/include/mach/soc.h\n+++ b/arch/arm/mach-mvebu/include/mach/soc.h\n@@ -18,6 +18,9 @@\n #define SOC_88F6810_ID\t\t0x6810\n #define SOC_88F6820_ID\t\t0x6820\n #define SOC_88F6828_ID\t\t0x6828\n+#define SOC_98DX3236_ID\t\t0xf410\n+#define SOC_98DX3336_ID\t\t0xf400\n+#define SOC_98DX4251_ID\t\t0xfc00\n \n /* A375 revisions */\n #define MV_88F67XX_A0_ID\t0x3\n","prefixes":["U-Boot","next","v2","1/2"]}