{"id":808686,"url":"http://patchwork.ozlabs.org/api/1.2/patches/808686/?format=json","web_url":"http://patchwork.ozlabs.org/project/gcc/patch/20170901133347.GA1605@arm.com/","project":{"id":17,"url":"http://patchwork.ozlabs.org/api/1.2/projects/17/?format=json","name":"GNU Compiler Collection","link_name":"gcc","list_id":"gcc-patches.gcc.gnu.org","list_email":"gcc-patches@gcc.gnu.org","web_url":null,"scm_url":null,"webscm_url":null,"list_archive_url":"","list_archive_url_format":"","commit_url_format":""},"msgid":"<20170901133347.GA1605@arm.com>","list_archive_url":null,"date":"2017-09-01T13:33:49","name":"[ARM] Dot Product NEON patterns [Patch (2/8)]","commit_ref":null,"pull_url":null,"state":"new","archived":false,"hash":"8b9e0d1a68bed69ecab2e940346d48c379887dc6","submitter":{"id":69689,"url":"http://patchwork.ozlabs.org/api/1.2/people/69689/?format=json","name":"Tamar Christina","email":"Tamar.Christina@arm.com"},"delegate":null,"mbox":"http://patchwork.ozlabs.org/project/gcc/patch/20170901133347.GA1605@arm.com/mbox/","series":[{"id":1030,"url":"http://patchwork.ozlabs.org/api/1.2/series/1030/?format=json","web_url":"http://patchwork.ozlabs.org/project/gcc/list/?series=1030","date":"2017-09-01T13:33:49","name":"[ARM] Dot Product NEON patterns [Patch (2/8)]","version":1,"mbox":"http://patchwork.ozlabs.org/series/1030/mbox/"}],"comments":"http://patchwork.ozlabs.org/api/patches/808686/comments/","check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/808686/checks/","tags":{},"related":[],"headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":["patchwork-incoming@bilbo.ozlabs.org","mailing list gcc-patches@gcc.gnu.org"],"Authentication-Results":["ozlabs.org;\n\tspf=pass (mailfrom) smtp.mailfrom=gcc.gnu.org\n\t(client-ip=209.132.180.131; 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PCL:0;\n\tRULEID:(100000700101)(100105000095)(100000701101)(100105300095)(100000702101)(100105100095)(102415395)(6040450)(601004)(2401047)(5005006)(8121501046)(93006095)(93001095)(3002001)(100000703101)(100105400095)(10201501046)(6055026)(6041248)(20161123564025)(20161123555025)(20161123560025)(20161123558100)(201703131423075)(201702281528075)(201703061421075)(201703061406153)(20161123562025)(6072148)(201708071742011)(100000704101)(100105200095)(100000705101)(100105500095);\n\tSRVR:DB6PR0802MB2309; BCL:0; PCL:0;\n\tRULEID:(100000800101)(100110000095)(100000801101)(100110300095)(100000802101)(100110100095)(100000803101)(100110400095)(100000804101)(100110200095)(100000805101)(100110500095);\n\tSRVR:DB6PR0802MB2309; ","X-Forefront-PRVS":"0417A3FFD2","X-Forefront-Antispam-Report":"SFV:NSPM;\n\tSFS:(10009020)(4630300001)(7370300001)(6009001)(39860400002)(377424004)(189002)(53754006)(199003)(2476003)(5890100001)(3846002)(6116002)(1076002)(25786009)(54356999)(568964002)(5660300001)(72206003)(33656002)(7350300001)(50986999)(86362001)(4001350100001)(101416001)(6916009)(110136004)(478600001)(97736004)(189998001)(106356001)(105586002)(4326008)(2351001)(2361001)(8676002)(36756003)(55016002)(42186005)(7736002)(81166006)(81156014)(4610100001)(305945005)(21086003)(5000100001)(68736007)(66066001)(84326002)(83506001)(2906002)(53936002)(18370500001)(2700100001);\n\tDIR:OUT; SFP:1101; SCL:1; SRVR:DB6PR0802MB2309; H:arm.com;\n\tFPR:; SPF:None; PTR:InfoNoRecords; MX:1; A:1; LANG:en; ","Received-SPF":"None (protection.outlook.com: arm.com does not designate\n\tpermitted sender hosts)","SpamDiagnosticOutput":"1:99","SpamDiagnosticMetadata":"NSPM","X-OriginatorOrg":"arm.com","X-MS-Exchange-CrossTenant-OriginalArrivalTime":"01 Sep 2017 13:33:46.8764\n\t(UTC)","X-MS-Exchange-CrossTenant-FromEntityHeader":"Hosted","X-MS-Exchange-Transport-CrossTenantHeadersStamped":"DB6PR0802MB2309","X-IsSubscribed":"yes"},"content":"Hi All,\n\nThis patch adds the instructions for Dot Product to ARM along\nwith the intrinsics and vectorizer pattern.\n\nArmv8.2-a dot product supports 8-bit element values both\nsigned and unsigned.\n\nDot product is available from Armv8.2-a and onwards.\n\nRegtested and bootstrapped on arm-none-eabi and no issues.\n\nOk for trunk?\n\ngcc/\n2017-09-01 Tamar Christina \n\n\t* config/arm/arm-builtins.c (arm_unsigned_uternop_qualifiers): New.\n\t(UTERNOP_QUALIFIERS, arm_umac_lane_qualifiers, UMAC_LANE_QUALIFIERS): New.\n\t* config/arm/arm_neon_builtins.def (sdot, udot, sdot_lane, udot_lane): new.\n\t* config/arm/iterators.md (DOTPROD, DOT_MODE, dot_mode): New.\n\t(UNSPEC_DOT_S, UNSPEC_DOT_U, opsuffix): New.\n\t* config/arm/neon.md (neon_dot): New.\n\t(neon_dot_lane, dot_prod): New.\n\t* config/arm/types.md (neon_dot, neon_dot_q): New.\n\t* config/arm/unspecs.md (UNSPEC_DOT_S, UNSPEC_DOT_U): New.\n\n--","diff":"diff --git a/gcc/config/arm/arm-builtins.c b/gcc/config/arm/arm-builtins.c\nindex 7504ed581c63a657a0dff48442633704bd252b2e..467596c1dbefe62cc92a0ffb8a03ecaf950f3701 100644\n--- a/gcc/config/arm/arm-builtins.c\n+++ b/gcc/config/arm/arm-builtins.c\n@@ -105,6 +105,13 @@ arm_ternop_qualifiers[SIMD_MAX_BUILTIN_ARGS]\n = { qualifier_none, qualifier_none, qualifier_none, qualifier_none };\n #define TERNOP_QUALIFIERS (arm_ternop_qualifiers)\n \n+/* unsigned T (unsigned T, unsigned T, unsigned T). */\n+static enum arm_type_qualifiers\n+arm_unsigned_uternop_qualifiers[SIMD_MAX_BUILTIN_ARGS]\n+ = { qualifier_unsigned, qualifier_unsigned, qualifier_unsigned,\n+ qualifier_unsigned };\n+#define UTERNOP_QUALIFIERS (arm_unsigned_uternop_qualifiers)\n+\n /* T (T, immediate). */\n static enum arm_type_qualifiers\n arm_binop_imm_qualifiers[SIMD_MAX_BUILTIN_ARGS]\n@@ -131,6 +138,13 @@ arm_mac_lane_qualifiers[SIMD_MAX_BUILTIN_ARGS]\n qualifier_none, qualifier_lane_index };\n #define MAC_LANE_QUALIFIERS (arm_mac_lane_qualifiers)\n \n+/* unsigned T (unsigned T, unsigned T, unsigend T, lane index). */\n+static enum arm_type_qualifiers\n+arm_umac_lane_qualifiers[SIMD_MAX_BUILTIN_ARGS]\n+ = { qualifier_unsigned, qualifier_unsigned, qualifier_unsigned,\n+ qualifier_unsigned, qualifier_lane_index };\n+#define UMAC_LANE_QUALIFIERS (arm_umac_lane_qualifiers)\n+\n /* T (T, T, immediate). */\n static enum arm_type_qualifiers\n arm_ternop_imm_qualifiers[SIMD_MAX_BUILTIN_ARGS]\ndiff --git a/gcc/config/arm/arm_neon_builtins.def b/gcc/config/arm/arm_neon_builtins.def\nindex 07f0368343a0c940c1cc1848d31f28a47a587b6f..982eec810dafb5ec955273099853f8842020d104 100644\n--- a/gcc/config/arm/arm_neon_builtins.def\n+++ b/gcc/config/arm/arm_neon_builtins.def\n@@ -331,3 +331,7 @@ VAR11 (STORE1, vst4,\n \tv8qi, v4hi, v4hf, v2si, v2sf, di, v16qi, v8hi, v8hf, v4si, v4sf)\n VAR9 (STORE1LANE, vst4_lane,\n \tv8qi, v4hi, v4hf, v2si, v2sf, v8hi, v8hf, v4si, v4sf)\n+VAR2 (TERNOP, sdot, v8qi, v16qi)\n+VAR2 (UTERNOP, udot, v8qi, v16qi)\n+VAR2 (MAC_LANE, sdot_lane, v8qi, v16qi)\n+VAR2 (UMAC_LANE, udot_lane, v8qi, v16qi)\ndiff --git a/gcc/config/arm/iterators.md b/gcc/config/arm/iterators.md\nindex 7acbaf1bb40a4f270e75968804546508f7839e49..139e09fd929e17216ad9383505f1453a73d071fb 100644\n--- a/gcc/config/arm/iterators.md\n+++ b/gcc/config/arm/iterators.md\n@@ -410,6 +410,8 @@\n \n (define_int_iterator VFM_LANE_AS [UNSPEC_VFMA_LANE UNSPEC_VFMS_LANE])\n \n+(define_int_iterator DOTPROD [UNSPEC_DOT_S UNSPEC_DOT_U])\n+\n ;;----------------------------------------------------------------------------\n ;; Mode attributes\n ;;----------------------------------------------------------------------------\n@@ -720,6 +722,10 @@\n \n (define_mode_attr pf [(V8QI \"p\") (V16QI \"p\") (V2SF \"f\") (V4SF \"f\")])\n \n+;; Mapping attribute for Dot Product input modes based on result mode.\n+(define_mode_attr DOT_MODE [(V2SI \"V8QI\") (V4SI \"V16QI\")])\n+(define_mode_attr dot_mode [(V2SI \"v8qi\") (V4SI \"v16qi\")])\n+\n ;;----------------------------------------------------------------------------\n ;; Code attributes\n ;;----------------------------------------------------------------------------\n@@ -816,6 +822,7 @@\n (UNSPEC_VSRA_S_N \"s\") (UNSPEC_VSRA_U_N \"u\")\n (UNSPEC_VRSRA_S_N \"s\") (UNSPEC_VRSRA_U_N \"u\")\n (UNSPEC_VCVTH_S \"s\") (UNSPEC_VCVTH_U \"u\")\n+ (UNSPEC_DOT_S \"s\") (UNSPEC_DOT_U \"u\")\n ])\n \n (define_int_attr vcvth_op\n@@ -1003,3 +1010,6 @@\n \n (define_int_attr mrrc [(VUNSPEC_MRRC \"mrrc\") (VUNSPEC_MRRC2 \"mrrc2\")])\n (define_int_attr MRRC [(VUNSPEC_MRRC \"MRRC\") (VUNSPEC_MRRC2 \"MRRC2\")])\n+\n+(define_int_attr opsuffix [(UNSPEC_DOT_S \"s8\")\n+\t\t\t (UNSPEC_DOT_U \"u8\")])\ndiff --git a/gcc/config/arm/neon.md b/gcc/config/arm/neon.md\nindex 45b3bd18052dd4a33e4b9c10f3ca2ea7e2eed5ce..4c919f53757ada3ca40609b8244ed3b403be3329 100644\n--- a/gcc/config/arm/neon.md\n+++ b/gcc/config/arm/neon.md\n@@ -3044,6 +3044,71 @@\n DONE;\n })\n \n+;; These instructions map to the __builtins for the Dot Product operations.\n+(define_insn \"neon_dot\"\n+ [(set (match_operand:VCVTI 0 \"register_operand\" \"=w\")\n+\t(unspec:VCVTI [(match_operand:VCVTI 1 \"register_operand\" \"0\")\n+\t\t (match_operand: 2 \"register_operand\" \"w\")\n+\t\t (match_operand: 3 \"register_operand\" \"w\")]\n+\t\tDOTPROD))]\n+ \"TARGET_DOTPROD\"\n+ \"vdot.\\\\t%0, %2, %3\"\n+ [(set_attr \"type\" \"neon_dot\")]\n+)\n+\n+;; These instructions map to the __builtins for the Dot Product\n+;; indexed operations.\n+(define_insn \"neon_dot_lane\"\n+ [(set (match_operand:VCVTI 0 \"register_operand\" \"=w\")\n+\t(unspec:VCVTI [(match_operand:VCVTI 1 \"register_operand\" \"0\")\n+\t\t (match_operand: 2 \"register_operand\" \"w\")\n+\t\t (match_operand:V8QI 3 \"register_operand\" \"t\")\n+\t\t (match_operand:SI 4 \"immediate_operand\" \"i\")]\n+\t\tDOTPROD))]\n+ \"TARGET_DOTPROD\"\n+ {\n+ operands[4]\n+ = GEN_INT (NEON_ENDIAN_LANE_N (V8QImode, INTVAL (operands[4])));\n+ return \"vdot.\\\\t%0, %2, %P3[%c4]\";\n+ }\n+ [(set_attr \"type\" \"neon_dot\")]\n+)\n+\n+;; These expands map to the Dot Product optab the vectorizer checks for.\n+;; The auto-vectorizer expects a dot product builtin that also does an\n+;; accumulation into the provided register.\n+;; Given the following pattern\n+;;\n+;; for (i=0; idot_prod\"\n+ [(set (match_operand:VCVTI 0 \"register_operand\")\n+\t(unspec:VCVTI [(match_operand: 1 \"register_operand\")\n+\t\t (match_operand: 2 \"register_operand\")\n+\t\t (match_operand:VCVTI 3 \"register_operand\")]\n+\t\tDOTPROD))]\n+ \"TARGET_DOTPROD\"\n+{\n+ emit_insn (\n+ gen_neon_dot (operands[3], operands[3], operands[1],\n+\t\t\t\t operands[2]));\n+ emit_insn (gen_rtx_SET (operands[0], operands[3]));\n+ DONE;\n+})\n+\n (define_expand \"neon_copysignf\"\n [(match_operand:VCVTF 0 \"register_operand\")\n (match_operand:VCVTF 1 \"register_operand\")\ndiff --git a/gcc/config/arm/types.md b/gcc/config/arm/types.md\nindex 253f4968d12a09fe69f3a0d82f896115b0a92c47..27398dffd9e71ee851d5d2ed5759d7c8a85df320 100644\n--- a/gcc/config/arm/types.md\n+++ b/gcc/config/arm/types.md\n@@ -316,6 +316,8 @@\n ; neon_cls_q\n ; neon_cnt\n ; neon_cnt_q\n+; neon_dot\n+; neon_dot_q\n ; neon_ext\n ; neon_ext_q\n ; neon_rbit\n@@ -764,6 +766,8 @@\n \\\n neon_abs,\\\n neon_abs_q,\\\n+ neon_dot,\\\n+ neon_dot_q,\\\n neon_neg,\\\n neon_neg_q,\\\n neon_qneg,\\\n@@ -1110,8 +1114,8 @@\n neon_sub, neon_sub_q, neon_sub_widen, neon_sub_long, neon_qsub,\\\n neon_qsub_q, neon_sub_halve, neon_sub_halve_q,\\\n neon_sub_halve_narrow_q,\\\n- neon_abs, neon_abs_q, neon_neg, neon_neg_q, neon_qneg,\\\n- neon_qneg_q, neon_qabs, neon_qabs_q, neon_abd, neon_abd_q,\\\n+\t neon_abs, neon_abs_q, neon_dot, neon_dot_q, neon_neg, neon_neg_q,\\\n+\t neon_qneg, neon_qneg_q, neon_qabs, neon_qabs_q, neon_abd, neon_abd_q,\\\n neon_abd_long, neon_minmax, neon_minmax_q, neon_compare,\\\n neon_compare_q, neon_compare_zero, neon_compare_zero_q,\\\n neon_arith_acc, neon_arith_acc_q, neon_reduc_add,\\\ndiff --git a/gcc/config/arm/unspecs.md b/gcc/config/arm/unspecs.md\nindex 99cfa41b08dad24a85e78f069331e83c03c8bce1..c474f4bb5db995b60f464f098e478f0398ce15f9 100644\n--- a/gcc/config/arm/unspecs.md\n+++ b/gcc/config/arm/unspecs.md\n@@ -410,4 +410,6 @@\n UNSPEC_VRNDN\n UNSPEC_VRNDP\n UNSPEC_VRNDX\n+ UNSPEC_DOT_S\n+ UNSPEC_DOT_U\n ])\n\n","prefixes":["ARM"]}