{"id":808375,"url":"http://patchwork.ozlabs.org/api/1.2/patches/808375/?format=json","web_url":"http://patchwork.ozlabs.org/project/linux-pci/patch/1504201930-3617-9-git-send-email-fabio.estevam@nxp.com/","project":{"id":28,"url":"http://patchwork.ozlabs.org/api/1.2/projects/28/?format=json","name":"Linux PCI development","link_name":"linux-pci","list_id":"linux-pci.vger.kernel.org","list_email":"linux-pci@vger.kernel.org","web_url":null,"scm_url":null,"webscm_url":null,"list_archive_url":"","list_archive_url_format":"","commit_url_format":""},"msgid":"<1504201930-3617-9-git-send-email-fabio.estevam@nxp.com>","list_archive_url":null,"date":"2017-08-31T17:52:09","name":"[09/10] PCI: rockchip: Fix platform_get_irq() error handling","commit_ref":null,"pull_url":null,"state":"accepted","archived":false,"hash":"7bf63772f3d18bae66c9071797fad136b9fb82bb","submitter":{"id":67998,"url":"http://patchwork.ozlabs.org/api/1.2/people/67998/?format=json","name":"Fabio Estevam","email":"fabio.estevam@nxp.com"},"delegate":null,"mbox":"http://patchwork.ozlabs.org/project/linux-pci/patch/1504201930-3617-9-git-send-email-fabio.estevam@nxp.com/mbox/","series":[{"id":888,"url":"http://patchwork.ozlabs.org/api/1.2/series/888/?format=json","web_url":"http://patchwork.ozlabs.org/project/linux-pci/list/?series=888","date":"2017-08-31T17:52:05","name":"[01/10] PCI: exynos: Fix platform_get_irq() error handling","version":1,"mbox":"http://patchwork.ozlabs.org/series/888/mbox/"}],"comments":"http://patchwork.ozlabs.org/api/patches/808375/comments/","check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/808375/checks/","tags":{},"related":[],"headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@bilbo.ozlabs.org","Authentication-Results":["ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=vger.kernel.org\n\t(client-ip=209.132.180.67; helo=vger.kernel.org;\n\tenvelope-from=linux-pci-owner@vger.kernel.org;\n\treceiver=)","spf=fail (sender IP is 192.88.168.50)\n\tsmtp.mailfrom=nxp.com; rock-chips.com; dkim=none (message not signed)\n\theader.d=none; rock-chips.com;\n\tdmarc=fail action=none header.from=nxp.com; "],"Received":["from vger.kernel.org (vger.kernel.org [209.132.180.67])\n\tby ozlabs.org (Postfix) with ESMTP id 3xjqj255xWz9s83\n\tfor ;\n\tFri, 1 Sep 2017 03:52:54 +1000 (AEST)","(majordomo@vger.kernel.org) by vger.kernel.org via listexpand\n\tid S1751412AbdHaRww (ORCPT );\n\tThu, 31 Aug 2017 13:52:52 -0400","from mail-sn1nam01on0059.outbound.protection.outlook.com\n\t([104.47.32.59]:61167\n\t\"EHLO NAM01-SN1-obe.outbound.protection.outlook.com\"\n\trhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP\n\tid S1751040AbdHaRwu (ORCPT );\n\tThu, 31 Aug 2017 13:52:50 -0400","from BN3PR03CA0095.namprd03.prod.outlook.com (10.174.66.13) by\n\tCY1PR03MB2267.namprd03.prod.outlook.com (10.166.207.19) with\n\tMicrosoft SMTP Server (version=TLS1_2,\n\tcipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384_P256) id\n\t15.20.13.10; Thu, 31 Aug 2017 17:52:49 +0000","from BL2FFO11FD046.protection.gbl (2a01:111:f400:7c09::157) by\n\tBN3PR03CA0095.outlook.office365.com (2603:10b6:400:4::13) with\n\tMicrosoft SMTP Server (version=TLS1_2,\n\tcipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384_P256) id\n\t15.20.13.10 via Frontend Transport; Thu, 31 Aug 2017 17:52:49 +0000","from tx30smr01.am.freescale.net (192.88.168.50) by\n\tBL2FFO11FD046.mail.protection.outlook.com (10.173.161.208) with\n\tMicrosoft\n\tSMTP Server (version=TLS1_0, cipher=TLS_RSA_WITH_AES_256_CBC_SHA) id\n\t15.1.1341.15 via Frontend Transport; Thu, 31 Aug 2017 17:52:48 +0000","from r49496.am.freescale.net (r49496.am.freescale.net\n\t[10.29.244.202])\n\tby tx30smr01.am.freescale.net (8.14.3/8.14.0) with ESMTP id\n\tv7VHqajQ026181; Thu, 31 Aug 2017 10:52:47 -0700"],"Received-SPF":"Fail (protection.outlook.com: domain of nxp.com does not\n\tdesignate 192.88.168.50 as permitted sender)\n\treceiver=protection.outlook.com; \n\tclient-ip=192.88.168.50; helo=tx30smr01.am.freescale.net;","From":"Fabio Estevam ","To":"","CC":", Fabio Estevam ,\n\tShawn Lin ","Subject":"[PATCH 09/10] PCI: rockchip: Fix platform_get_irq() error handling","Date":"Thu, 31 Aug 2017 14:52:09 -0300","Message-ID":"<1504201930-3617-9-git-send-email-fabio.estevam@nxp.com>","X-Mailer":"git-send-email 2.7.4","In-Reply-To":"<1504201930-3617-1-git-send-email-fabio.estevam@nxp.com>","References":"<1504201930-3617-1-git-send-email-fabio.estevam@nxp.com>","X-EOPAttributedMessage":"0","X-Matching-Connectors":"131486755685739664;\n\t(91ab9b29-cfa4-454e-5278-08d120cd25b8); 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BCL:0; PCL:0;\n\tRULEID:(100000800101)(100110000095)(100000801101)(100110300095)(100000802101)(100110100095)(100000803101)(100110400095)(400006)(100000804101)(100110200095)(100000805101)(100110500095);\n\tSRVR:CY1PR03MB2267; ","X-Forefront-PRVS":"04163EF38A","SpamDiagnosticOutput":"1:99","SpamDiagnosticMetadata":"NSPM","X-MS-Exchange-CrossTenant-OriginalArrivalTime":"31 Aug 2017 17:52:48.4023\n\t(UTC)","X-MS-Exchange-CrossTenant-Id":"5afe0b00-7697-4969-b663-5eab37d5f47e","X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp":"TenantId=5afe0b00-7697-4969-b663-5eab37d5f47e;\n\tIp=[192.88.168.50]; Helo=[tx30smr01.am.freescale.net]","X-MS-Exchange-CrossTenant-FromEntityHeader":"HybridOnPrem","X-MS-Exchange-Transport-CrossTenantHeadersStamped":"CY1PR03MB2267","Sender":"linux-pci-owner@vger.kernel.org","Precedence":"bulk","List-ID":"","X-Mailing-List":"linux-pci@vger.kernel.org"},"content":"When platform_get_irq() fails we should propagate the real error\nvalue instead of always returning -EINVAL\n\nCc: Shawn Lin \nSigned-off-by: Fabio Estevam \n---\n drivers/pci/host/pcie-rockchip.c | 6 +++---\n 1 file changed, 3 insertions(+), 3 deletions(-)","diff":"diff --git a/drivers/pci/host/pcie-rockchip.c b/drivers/pci/host/pcie-rockchip.c\nindex 56c2423..d205381 100644\n--- a/drivers/pci/host/pcie-rockchip.c\n+++ b/drivers/pci/host/pcie-rockchip.c\n@@ -962,7 +962,7 @@ static int rockchip_pcie_setup_irq(struct rockchip_pcie *rockchip)\n \tirq = platform_get_irq_byname(pdev, \"sys\");\n \tif (irq < 0) {\n \t\tdev_err(dev, \"missing sys IRQ resource\\n\");\n-\t\treturn -EINVAL;\n+\t\treturn irq;\n \t}\n \n \terr = devm_request_irq(dev, irq, rockchip_pcie_subsys_irq_handler,\n@@ -975,7 +975,7 @@ static int rockchip_pcie_setup_irq(struct rockchip_pcie *rockchip)\n \tirq = platform_get_irq_byname(pdev, \"legacy\");\n \tif (irq < 0) {\n \t\tdev_err(dev, \"missing legacy IRQ resource\\n\");\n-\t\treturn -EINVAL;\n+\t\treturn irq;\n \t}\n \n \tirq_set_chained_handler_and_data(irq,\n@@ -985,7 +985,7 @@ static int rockchip_pcie_setup_irq(struct rockchip_pcie *rockchip)\n \tirq = platform_get_irq_byname(pdev, \"client\");\n \tif (irq < 0) {\n \t\tdev_err(dev, \"missing client IRQ resource\\n\");\n-\t\treturn -EINVAL;\n+\t\treturn irq;\n \t}\n \n \terr = devm_request_irq(dev, irq, rockchip_pcie_client_irq_handler,\n","prefixes":["09/10"]}