{"id":807973,"url":"http://patchwork.ozlabs.org/api/1.2/patches/807973/?format=json","web_url":"http://patchwork.ozlabs.org/project/netdev/patch/20170830230409.15176-3-saeedm@mellanox.com/","project":{"id":7,"url":"http://patchwork.ozlabs.org/api/1.2/projects/7/?format=json","name":"Linux network development","link_name":"netdev","list_id":"netdev.vger.kernel.org","list_email":"netdev@vger.kernel.org","web_url":null,"scm_url":null,"webscm_url":null,"list_archive_url":"","list_archive_url_format":"","commit_url_format":""},"msgid":"<20170830230409.15176-3-saeedm@mellanox.com>","list_archive_url":null,"date":"2017-08-30T23:04:08","name":"[net-next,2/3] net/mlx5e: Support TSO and TX checksum offloads for GRE tunnels","commit_ref":null,"pull_url":null,"state":"accepted","archived":true,"hash":"c678217ad42b831b6081b15f9749a567a55c7dc5","submitter":{"id":65299,"url":"http://patchwork.ozlabs.org/api/1.2/people/65299/?format=json","name":"Saeed Mahameed","email":"saeedm@mellanox.com"},"delegate":{"id":34,"url":"http://patchwork.ozlabs.org/api/1.2/users/34/?format=json","username":"davem","first_name":"David","last_name":"Miller","email":"davem@davemloft.net"},"mbox":"http://patchwork.ozlabs.org/project/netdev/patch/20170830230409.15176-3-saeedm@mellanox.com/mbox/","series":[{"id":721,"url":"http://patchwork.ozlabs.org/api/1.2/series/721/?format=json","web_url":"http://patchwork.ozlabs.org/project/netdev/list/?series=721","date":"2017-08-30T23:04:06","name":"[net-next,1/3] net/mlx5e: Use IP version matching to classify IP traffic","version":1,"mbox":"http://patchwork.ozlabs.org/series/721/mbox/"}],"comments":"http://patchwork.ozlabs.org/api/patches/807973/comments/","check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/807973/checks/","tags":{},"related":[],"headers":{"Return-Path":"","X-Original-To":"patchwork-incoming@ozlabs.org","Delivered-To":"patchwork-incoming@ozlabs.org","Authentication-Results":"ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=vger.kernel.org\n\t(client-ip=209.132.180.67; helo=vger.kernel.org;\n\tenvelope-from=netdev-owner@vger.kernel.org;\n\treceiver=)","Received":["from vger.kernel.org (vger.kernel.org [209.132.180.67])\n\tby ozlabs.org (Postfix) with ESMTP id 3xjLgV5mpQz9s7C\n\tfor ;\n\tThu, 31 Aug 2017 09:04:54 +1000 (AEST)","(majordomo@vger.kernel.org) by vger.kernel.org via listexpand\n\tid S1751519AbdH3XEw (ORCPT );\n\tWed, 30 Aug 2017 19:04:52 -0400","from mail-il-dmz.mellanox.com ([193.47.165.129]:34552 \"EHLO\n\tmellanox.co.il\" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org\n\twith ESMTP id S1751301AbdH3XEV (ORCPT\n\t); Wed, 30 Aug 2017 19:04:21 -0400","from Internal Mail-Server by MTLPINE1 (envelope-from\n\tsaeedm@mellanox.com)\n\twith ESMTPS (AES256-SHA encrypted); 31 Aug 2017 02:04:17 +0300","from sws.mtl.labs.mlnx (reg-l-vrt-045-015.mtl.labs.mlnx\n\t[10.135.45.15])\n\tby labmailer.mlnx (8.13.8/8.13.8) with ESMTP id v7UN4HFl017137;\n\tThu, 31 Aug 2017 02:04:17 +0300"],"From":"Saeed Mahameed ","To":"\"David S. Miller\" ","Cc":"netdev@vger.kernel.org, Gal Pressman ,\n\tSaeed Mahameed ","Subject":"[net-next 2/3] net/mlx5e: Support TSO and TX checksum offloads for\n\tGRE tunnels","Date":"Thu, 31 Aug 2017 02:04:08 +0300","Message-Id":"<20170830230409.15176-3-saeedm@mellanox.com>","X-Mailer":"git-send-email 2.13.0","In-Reply-To":"<20170830230409.15176-1-saeedm@mellanox.com>","References":"<20170830230409.15176-1-saeedm@mellanox.com>","Sender":"netdev-owner@vger.kernel.org","Precedence":"bulk","List-ID":"","X-Mailing-List":"netdev@vger.kernel.org"},"content":"From: Gal Pressman \n\nAdd TX offloads support for GRE tunneled packets by reporting the needed\nnetdev features.\n\nSigned-off-by: Gal Pressman \nReviewed-by: Or Gerlitz \nSigned-off-by: Saeed Mahameed \n---\n drivers/net/ethernet/mellanox/mlx5/core/en_main.c | 51 +++++++++++++++--------\n include/linux/mlx5/mlx5_ifc.h | 2 +-\n 2 files changed, 34 insertions(+), 19 deletions(-)","diff":"diff --git a/drivers/net/ethernet/mellanox/mlx5/core/en_main.c b/drivers/net/ethernet/mellanox/mlx5/core/en_main.c\nindex fdc2b92f020b..9475fb89a744 100644\n--- a/drivers/net/ethernet/mellanox/mlx5/core/en_main.c\n+++ b/drivers/net/ethernet/mellanox/mlx5/core/en_main.c\n@@ -3499,13 +3499,13 @@ static void mlx5e_del_vxlan_port(struct net_device *netdev,\n \tmlx5e_vxlan_queue_work(priv, ti->sa_family, be16_to_cpu(ti->port), 0);\n }\n \n-static netdev_features_t mlx5e_vxlan_features_check(struct mlx5e_priv *priv,\n-\t\t\t\t\t\t struct sk_buff *skb,\n-\t\t\t\t\t\t netdev_features_t features)\n+static netdev_features_t mlx5e_tunnel_features_check(struct mlx5e_priv *priv,\n+\t\t\t\t\t\t struct sk_buff *skb,\n+\t\t\t\t\t\t netdev_features_t features)\n {\n \tstruct udphdr *udph;\n-\tu16 proto;\n-\tu16 port = 0;\n+\tu8 proto;\n+\tu16 port;\n \n \tswitch (vlan_get_protocol(skb)) {\n \tcase htons(ETH_P_IP):\n@@ -3518,14 +3518,17 @@ static netdev_features_t mlx5e_vxlan_features_check(struct mlx5e_priv *priv,\n \t\tgoto out;\n \t}\n \n-\tif (proto == IPPROTO_UDP) {\n+\tswitch (proto) {\n+\tcase IPPROTO_GRE:\n+\t\treturn features;\n+\tcase IPPROTO_UDP:\n \t\tudph = udp_hdr(skb);\n \t\tport = be16_to_cpu(udph->dest);\n-\t}\n \n-\t/* Verify if UDP port is being offloaded by HW */\n-\tif (port && mlx5e_vxlan_lookup_port(priv, port))\n-\t\treturn features;\n+\t\t/* Verify if UDP port is being offloaded by HW */\n+\t\tif (mlx5e_vxlan_lookup_port(priv, port))\n+\t\t\treturn features;\n+\t}\n \n out:\n \t/* Disable CSUM and GSO if the udp dport is not offloaded by HW */\n@@ -3549,7 +3552,7 @@ static netdev_features_t mlx5e_features_check(struct sk_buff *skb,\n \t/* Validate if the tunneled packet is being offloaded by HW */\n \tif (skb->encapsulation &&\n \t (features & NETIF_F_CSUM_MASK || features & NETIF_F_GSO_MASK))\n-\t\treturn mlx5e_vxlan_features_check(priv, skb, features);\n+\t\treturn mlx5e_tunnel_features_check(priv, skb, features);\n \n \treturn features;\n }\n@@ -4014,20 +4017,32 @@ static void mlx5e_build_nic_netdev(struct net_device *netdev)\n \tnetdev->hw_features |= NETIF_F_HW_VLAN_CTAG_RX;\n \tnetdev->hw_features |= NETIF_F_HW_VLAN_CTAG_FILTER;\n \n-\tif (mlx5e_vxlan_allowed(mdev)) {\n-\t\tnetdev->hw_features |= NETIF_F_GSO_UDP_TUNNEL |\n-\t\t\t\t\t NETIF_F_GSO_UDP_TUNNEL_CSUM |\n-\t\t\t\t\t NETIF_F_GSO_PARTIAL;\n+\tif (mlx5e_vxlan_allowed(mdev) || MLX5_CAP_ETH(mdev, tunnel_stateless_gre)) {\n+\t\tnetdev->hw_features |= NETIF_F_GSO_PARTIAL;\n \t\tnetdev->hw_enc_features |= NETIF_F_IP_CSUM;\n \t\tnetdev->hw_enc_features |= NETIF_F_IPV6_CSUM;\n \t\tnetdev->hw_enc_features |= NETIF_F_TSO;\n \t\tnetdev->hw_enc_features |= NETIF_F_TSO6;\n-\t\tnetdev->hw_enc_features |= NETIF_F_GSO_UDP_TUNNEL;\n-\t\tnetdev->hw_enc_features |= NETIF_F_GSO_UDP_TUNNEL_CSUM |\n-\t\t\t\t\t NETIF_F_GSO_PARTIAL;\n+\t\tnetdev->hw_enc_features |= NETIF_F_GSO_PARTIAL;\n+\t}\n+\n+\tif (mlx5e_vxlan_allowed(mdev)) {\n+\t\tnetdev->hw_features |= NETIF_F_GSO_UDP_TUNNEL |\n+\t\t\t\t\t NETIF_F_GSO_UDP_TUNNEL_CSUM;\n+\t\tnetdev->hw_enc_features |= NETIF_F_GSO_UDP_TUNNEL |\n+\t\t\t\t\t NETIF_F_GSO_UDP_TUNNEL_CSUM;\n \t\tnetdev->gso_partial_features = NETIF_F_GSO_UDP_TUNNEL_CSUM;\n \t}\n \n+\tif (MLX5_CAP_ETH(mdev, tunnel_stateless_gre)) {\n+\t\tnetdev->hw_features |= NETIF_F_GSO_GRE |\n+\t\t\t\t\t NETIF_F_GSO_GRE_CSUM;\n+\t\tnetdev->hw_enc_features |= NETIF_F_GSO_GRE |\n+\t\t\t\t\t NETIF_F_GSO_GRE_CSUM;\n+\t\tnetdev->gso_partial_features |= NETIF_F_GSO_GRE |\n+\t\t\t\t\t\tNETIF_F_GSO_GRE_CSUM;\n+\t}\n+\n \tmlx5_query_port_fcs(mdev, &fcs_supported, &fcs_enabled);\n \n \tif (fcs_supported)\ndiff --git a/include/linux/mlx5/mlx5_ifc.h b/include/linux/mlx5/mlx5_ifc.h\nindex ae7d09b9c52f..3d5d32e5446c 100644\n--- a/include/linux/mlx5/mlx5_ifc.h\n+++ b/include/linux/mlx5/mlx5_ifc.h\n@@ -602,7 +602,7 @@ struct mlx5_ifc_per_protocol_networking_offload_caps_bits {\n \tu8 reserved_at_1a[0x1];\n \tu8 tunnel_lso_const_out_ip_id[0x1];\n \tu8 reserved_at_1c[0x2];\n-\tu8 tunnel_statless_gre[0x1];\n+\tu8 tunnel_stateless_gre[0x1];\n \tu8 tunnel_stateless_vxlan[0x1];\n \n \tu8 swp[0x1];\n","prefixes":["net-next","2/3"]}