{"id":807295,"url":"http://patchwork.ozlabs.org/api/1.2/patches/807295/?format=json","web_url":"http://patchwork.ozlabs.org/project/netdev/patch/1504038918-49254-3-git-send-email-f.fainelli@gmail.com/","project":{"id":7,"url":"http://patchwork.ozlabs.org/api/1.2/projects/7/?format=json","name":"Linux network development","link_name":"netdev","list_id":"netdev.vger.kernel.org","list_email":"netdev@vger.kernel.org","web_url":null,"scm_url":null,"webscm_url":null,"list_archive_url":"","list_archive_url_format":"","commit_url_format":""},"msgid":"<1504038918-49254-3-git-send-email-f.fainelli@gmail.com>","list_archive_url":null,"date":"2017-08-29T20:35:16","name":"[net-next,v2,2/4] net: dsa: bcm_sf2: Use correct I/O accessors","commit_ref":null,"pull_url":null,"state":"accepted","archived":true,"hash":"a3c448da7ae2a57f1301188586d45fbd1b0f3428","submitter":{"id":2800,"url":"http://patchwork.ozlabs.org/api/1.2/people/2800/?format=json","name":"Florian Fainelli","email":"f.fainelli@gmail.com"},"delegate":{"id":34,"url":"http://patchwork.ozlabs.org/api/1.2/users/34/?format=json","username":"davem","first_name":"David","last_name":"Miller","email":"davem@davemloft.net"},"mbox":"http://patchwork.ozlabs.org/project/netdev/patch/1504038918-49254-3-git-send-email-f.fainelli@gmail.com/mbox/","series":[{"id":470,"url":"http://patchwork.ozlabs.org/api/1.2/series/470/?format=json","web_url":"http://patchwork.ozlabs.org/project/netdev/list/?series=470","date":"2017-08-29T20:35:14","name":"Endian fixes for SYSTEMPORT/SF2/MDIO","version":2,"mbox":"http://patchwork.ozlabs.org/series/470/mbox/"}],"comments":"http://patchwork.ozlabs.org/api/patches/807295/comments/","check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/807295/checks/","tags":{},"related":[],"headers":{"Return-Path":"<netdev-owner@vger.kernel.org>","X-Original-To":"patchwork-incoming@ozlabs.org","Delivered-To":"patchwork-incoming@ozlabs.org","Authentication-Results":["ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=vger.kernel.org\n\t(client-ip=209.132.180.67; helo=vger.kernel.org;\n\tenvelope-from=netdev-owner@vger.kernel.org;\n\treceiver=<UNKNOWN>)","ozlabs.org; dkim=pass (2048-bit key;\n\tunprotected) header.d=gmail.com header.i=@gmail.com\n\theader.b=\"uT2AllI+\"; dkim-atps=neutral"],"Received":["from vger.kernel.org (vger.kernel.org [209.132.180.67])\n\tby ozlabs.org (Postfix) with ESMTP id 3xhgXN3CmHz9s9Y\n\tfor <patchwork-incoming@ozlabs.org>;\n\tWed, 30 Aug 2017 06:41:24 +1000 (AEST)","(majordomo@vger.kernel.org) by vger.kernel.org via listexpand\n\tid S1751660AbdH2UlV (ORCPT <rfc822;patchwork-incoming@ozlabs.org>);\n\tTue, 29 Aug 2017 16:41:21 -0400","from mail-qt0-f195.google.com ([209.85.216.195]:38868 \"EHLO\n\tmail-qt0-f195.google.com\" rhost-flags-OK-OK-OK-OK) by vger.kernel.org\n\twith ESMTP id S1751558AbdH2UlS (ORCPT\n\t<rfc822;netdev@vger.kernel.org>); Tue, 29 Aug 2017 16:41:18 -0400","by mail-qt0-f195.google.com with SMTP id d15so3751713qta.5\n\tfor <netdev@vger.kernel.org>; Tue, 29 Aug 2017 13:41:18 -0700 (PDT)","from stb-bld-04.irv.broadcom.com ([192.19.255.250])\n\tby smtp.gmail.com with ESMTPSA id\n\tu17sm2645446qtc.43.2017.08.29.13.41.15\n\t(version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128);\n\tTue, 29 Aug 2017 13:41:16 -0700 (PDT)"],"DKIM-Signature":"v=1; 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\n\tTue, 29 Aug 2017 13:41:17 -0700 (PDT)","From":"Florian Fainelli <f.fainelli@gmail.com>","To":"netdev@vger.kernel.org","Cc":"davem@davemloft.net, opendmb@gmail.com, andrew@lunn.ch,\n\tvivien.didelot@savoirfairelinux.com,\n\tFlorian Fainelli <f.fainelli@gmail.com>","Subject":"[PATCH net-next v2 2/4] net: dsa: bcm_sf2: Use correct I/O accessors","Date":"Tue, 29 Aug 2017 13:35:16 -0700","Message-Id":"<1504038918-49254-3-git-send-email-f.fainelli@gmail.com>","X-Mailer":"git-send-email 1.9.1","In-Reply-To":"<1504038918-49254-1-git-send-email-f.fainelli@gmail.com>","References":"<1504038918-49254-1-git-send-email-f.fainelli@gmail.com>","Sender":"netdev-owner@vger.kernel.org","Precedence":"bulk","List-ID":"<netdev.vger.kernel.org>","X-Mailing-List":"netdev@vger.kernel.org"},"content":"The Starfigther 2 driver currently uses __raw_{read,write}l which means\nnative I/O endian. This works correctly for an ARM LE kernel (default)\nbut fails miserably on an ARM BE (BE8) kernel where registers are kept\nlittle endian, so replace uses with {read,write}l_relaxed here which is\nwhat we want because this is all performance sensitive code.\n\nSigned-off-by: Florian Fainelli <f.fainelli@gmail.com>\n---\n drivers/net/dsa/bcm_sf2.h | 12 ++++++------\n 1 file changed, 6 insertions(+), 6 deletions(-)","diff":"diff --git a/drivers/net/dsa/bcm_sf2.h b/drivers/net/dsa/bcm_sf2.h\nindex 7d3030e04f11..d9c96b281fc0 100644\n--- a/drivers/net/dsa/bcm_sf2.h\n+++ b/drivers/net/dsa/bcm_sf2.h\n@@ -130,12 +130,12 @@ static inline u32 bcm_sf2_mangle_addr(struct bcm_sf2_priv *priv, u32 off)\n #define SF2_IO_MACRO(name) \\\n static inline u32 name##_readl(struct bcm_sf2_priv *priv, u32 off)\t\\\n {\t\t\t\t\t\t\t\t\t\\\n-\treturn __raw_readl(priv->name + off);\t\t\t\t\\\n+\treturn readl_relaxed(priv->name + off);\t\t\t\t\\\n }\t\t\t\t\t\t\t\t\t\\\n static inline void name##_writel(struct bcm_sf2_priv *priv,\t\t\\\n \t\t\t\t  u32 val, u32 off)\t\t\t\\\n {\t\t\t\t\t\t\t\t\t\\\n-\t__raw_writel(val, priv->name + off);\t\t\t\t\\\n+\twritel_relaxed(val, priv->name + off);\t\t\t\t\\\n }\t\t\t\t\t\t\t\t\t\\\n \n /* Accesses to 64-bits register requires us to latch the hi/lo pairs\n@@ -179,23 +179,23 @@ static inline u32 bcm_sf2_mangle_addr(struct bcm_sf2_priv *priv, u32 off)\n static inline u32 core_readl(struct bcm_sf2_priv *priv, u32 off)\n {\n \tu32 tmp = bcm_sf2_mangle_addr(priv, off);\n-\treturn __raw_readl(priv->core + tmp);\n+\treturn readl_relaxed(priv->core + tmp);\n }\n \n static inline void core_writel(struct bcm_sf2_priv *priv, u32 val, u32 off)\n {\n \tu32 tmp = bcm_sf2_mangle_addr(priv, off);\n-\t__raw_writel(val, priv->core + tmp);\n+\twritel_relaxed(val, priv->core + tmp);\n }\n \n static inline u32 reg_readl(struct bcm_sf2_priv *priv, u16 off)\n {\n-\treturn __raw_readl(priv->reg + priv->reg_offsets[off]);\n+\treturn readl_relaxed(priv->reg + priv->reg_offsets[off]);\n }\n \n static inline void reg_writel(struct bcm_sf2_priv *priv, u32 val, u16 off)\n {\n-\t__raw_writel(val, priv->reg + priv->reg_offsets[off]);\n+\twritel_relaxed(val, priv->reg + priv->reg_offsets[off]);\n }\n \n SF2_IO64_MACRO(core);\n","prefixes":["net-next","v2","2/4"]}