{"id":805258,"url":"http://patchwork.ozlabs.org/api/1.2/patches/805258/?format=json","web_url":"http://patchwork.ozlabs.org/project/linuxppc-dev/patch/1503556688-15412-3-git-send-email-sukadev@linux.vnet.ibm.com/","project":{"id":2,"url":"http://patchwork.ozlabs.org/api/1.2/projects/2/?format=json","name":"Linux PPC development","link_name":"linuxppc-dev","list_id":"linuxppc-dev.lists.ozlabs.org","list_email":"linuxppc-dev@lists.ozlabs.org","web_url":"https://github.com/linuxppc/wiki/wiki","scm_url":"https://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux.git","webscm_url":"https://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux.git/","list_archive_url":"https://lore.kernel.org/linuxppc-dev/","list_archive_url_format":"https://lore.kernel.org/linuxppc-dev/{}/","commit_url_format":"https://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux.git/commit/?id={}"},"msgid":"<1503556688-15412-3-git-send-email-sukadev@linux.vnet.ibm.com>","list_archive_url":"https://lore.kernel.org/linuxppc-dev/1503556688-15412-3-git-send-email-sukadev@linux.vnet.ibm.com/","date":"2017-08-24T06:37:58","name":"[v7,02/12] Move GET_FIELD/SET_FIELD to vas.h","commit_ref":null,"pull_url":null,"state":"changes-requested","archived":false,"hash":"05b1e954adb425173aa647e6ccd7cdfd79cf3592","submitter":{"id":984,"url":"http://patchwork.ozlabs.org/api/1.2/people/984/?format=json","name":"Sukadev Bhattiprolu","email":"sukadev@linux.vnet.ibm.com"},"delegate":null,"mbox":"http://patchwork.ozlabs.org/project/linuxppc-dev/patch/1503556688-15412-3-git-send-email-sukadev@linux.vnet.ibm.com/mbox/","series":[],"comments":"http://patchwork.ozlabs.org/api/patches/805258/comments/","check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/805258/checks/","tags":{},"related":[],"headers":{"Return-Path":"","X-Original-To":["patchwork-incoming@ozlabs.org","linuxppc-dev@lists.ozlabs.org"],"Delivered-To":["patchwork-incoming@ozlabs.org","linuxppc-dev@lists.ozlabs.org","linuxppc-dev@ozlabs.org"],"Received":["from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3])\n\t(using TLSv1.2 with cipher ADH-AES256-GCM-SHA384 (256/256 bits))\n\t(No client certificate requested)\n\tby ozlabs.org (Postfix) with ESMTPS id 3xdF9n4hChz9sRW\n\tfor ;\n\tThu, 24 Aug 2017 16:43:25 +1000 (AEST)","from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3])\n\tby lists.ozlabs.org (Postfix) with ESMTP id 3xdF9n3bnpzDrMw\n\tfor ;\n\tThu, 24 Aug 2017 16:43:25 +1000 (AEST)","from ozlabs.org (bilbo.ozlabs.org [103.22.144.67])\n\t(using TLSv1.2 with cipher ADH-AES256-GCM-SHA384 (256/256 bits))\n\t(No client certificate requested)\n\tby lists.ozlabs.org (Postfix) with ESMTPS id 3xdF425bGHzDrJY\n\tfor ;\n\tThu, 24 Aug 2017 16:38:26 +1000 (AEST)","from ozlabs.org (ozlabs.org [IPv6:2401:3900:2:1::2])\n\tby bilbo.ozlabs.org (Postfix) with ESMTP id 3xdF423Prtz8w2H\n\tfor ;\n\tThu, 24 Aug 2017 16:38:26 +1000 (AEST)","by ozlabs.org (Postfix)\n\tid 3xdF422Ykgz9t3G; Thu, 24 Aug 2017 16:38:26 +1000 (AEST)","from mx0a-001b2d01.pphosted.com (mx0a-001b2d01.pphosted.com\n\t[148.163.156.1])\n\t(using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256\n\tbits)) (No client certificate requested)\n\tby ozlabs.org (Postfix) with ESMTPS id 3xdF415sFNz9t3C\n\tfor ; Thu, 24 Aug 2017 16:38:25 +1000 (AEST)","from pps.filterd (m0098396.ppops.net [127.0.0.1])\n\tby mx0a-001b2d01.pphosted.com (8.16.0.21/8.16.0.21) with SMTP id\n\tv7O6at3g041490\n\tfor ; Thu, 24 Aug 2017 02:38:24 -0400","from e18.ny.us.ibm.com (e18.ny.us.ibm.com [129.33.205.208])\n\tby mx0a-001b2d01.pphosted.com with ESMTP id 2chruduyra-1\n\t(version=TLSv1.2 cipher=AES256-SHA bits=256 verify=NOT)\n\tfor ; Thu, 24 Aug 2017 02:38:23 -0400","from localhost\n\tby e18.ny.us.ibm.com with IBM ESMTP SMTP Gateway: Authorized Use\n\tOnly! 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Violators will be prosecuted; \n\tThu, 24 Aug 2017 02:38:20 -0400","from b01ledav002.gho.pok.ibm.com (b01ledav002.gho.pok.ibm.com\n\t[9.57.199.107])\n\tby b01cxnp22036.gho.pok.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP\n\tid v7O6cJGN30474484; Thu, 24 Aug 2017 06:38:19 GMT","from b01ledav002.gho.pok.ibm.com (unknown [127.0.0.1])\n\tby IMSVA (Postfix) with ESMTP id F219C124037;\n\tThu, 24 Aug 2017 02:35:39 -0400 (EDT)","from suka-w540.usor.ibm.com (unknown [9.70.94.25])\n\tby b01ledav002.gho.pok.ibm.com (Postfix) with ESMTP id 25166124035;\n\tThu, 24 Aug 2017 02:35:39 -0400 (EDT)"],"Authentication-Results":"ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=linux.vnet.ibm.com\n\t(client-ip=148.163.156.1; helo=mx0a-001b2d01.pphosted.com;\n\tenvelope-from=sukadev@linux.vnet.ibm.com; receiver=)","From":"Sukadev Bhattiprolu ","To":"Michael Ellerman ","Subject":"[PATCH v7 02/12] Move GET_FIELD/SET_FIELD to vas.h","Date":"Wed, 23 Aug 2017 23:37:58 -0700","X-Mailer":"git-send-email 2.7.4","In-Reply-To":"<1503556688-15412-1-git-send-email-sukadev@linux.vnet.ibm.com>","References":"<1503556688-15412-1-git-send-email-sukadev@linux.vnet.ibm.com>","X-TM-AS-GCONF":"00","x-cbid":"17082406-0044-0000-0000-000003822BCD","X-IBM-SpamModules-Scores":"","X-IBM-SpamModules-Versions":"BY=3.00007601; HX=3.00000241; KW=3.00000007;\n\tPH=3.00000004; SC=3.00000224; SDB=6.00906836; UDB=6.00454554;\n\tIPR=6.00687033; \n\tBA=6.00005550; NDR=6.00000001; ZLA=6.00000005; ZF=6.00000009;\n\tZB=6.00000000; \n\tZP=6.00000000; ZH=6.00000000; ZU=6.00000002; MB=3.00016840;\n\tXFM=3.00000015; UTC=2017-08-24 06:38:22","X-IBM-AV-DETECTION":"SAVI=unused REMOTE=unused XFE=unused","x-cbparentid":"17082406-0045-0000-0000-000007B04379","Message-Id":"<1503556688-15412-3-git-send-email-sukadev@linux.vnet.ibm.com>","X-Proofpoint-Virus-Version":"vendor=fsecure engine=2.50.10432:, ,\n\tdefinitions=2017-08-24_03:, , signatures=0","X-Proofpoint-Spam-Details":"rule=outbound_notspam policy=outbound score=0\n\tspamscore=0 suspectscore=0\n\tmalwarescore=0 phishscore=0 adultscore=0 bulkscore=0 classifier=spam\n\tadjust=0 reason=mlx scancount=1 engine=8.0.1-1707230000\n\tdefinitions=main-1708240106","X-BeenThere":"linuxppc-dev@lists.ozlabs.org","X-Mailman-Version":"2.1.23","Precedence":"list","List-Id":"Linux on PowerPC Developers Mail List\n\t","List-Unsubscribe":",\n\t","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n\t","Cc":"stewart@linux.vnet.ibm.com, mikey@neuling.org, linuxppc-dev@ozlabs.org, \n\tlinux-kernel@vger.kernel.org, apopple@au1.ibm.com, oohall@gmail.com","Errors-To":"linuxppc-dev-bounces+patchwork-incoming=ozlabs.org@lists.ozlabs.org","Sender":"\"Linuxppc-dev\"\n\t"},"content":"Move the GET_FIELD and SET_FIELD macros to vas.h as VAS and other\nusers of VAS, including NX-842 can use those macros.\n\nThere is a lot of related code between the VAS/NX kernel drivers\nand skiboot. For consistency, switch the order of parameters in\nSET_FIELD to match the order in skiboot.\n\nSigned-off-by: Sukadev Bhattiprolu \nReviewed-by: Dan Streetman \n---\n\nChangelog[v7]\n\t[Michael Ellerman] Move the macros to rather than\n\t\tto \n\nChangelog[v3]\n\t- Fix order of parameters in nx-842 driver.\n---\n arch/powerpc/include/asm/vas.h | 8 ++++++++\n drivers/crypto/nx/nx-842-powernv.c | 7 ++++---\n drivers/crypto/nx/nx-842.h | 5 -----\n 3 files changed, 12 insertions(+), 8 deletions(-)","diff":"diff --git a/arch/powerpc/include/asm/vas.h b/arch/powerpc/include/asm/vas.h\nindex 66a863c..e34d46a 100644\n--- a/arch/powerpc/include/asm/vas.h\n+++ b/arch/powerpc/include/asm/vas.h\n@@ -30,6 +30,14 @@\n #define VAS_THRESH_FIFO_GT_EIGHTH_FULL\t3\n \n /*\n+ * Get/Set bit fields\n+ */\n+#define GET_FIELD(m, v) (((v) & (m)) >> MASK_LSH(m))\n+#define MASK_LSH(m) (__builtin_ffsl(m) - 1)\n+#define SET_FIELD(m, v, val) \\\n+\t\t(((v) & ~(m)) | ((((typeof(v))(val)) << MASK_LSH(m)) & (m)))\n+\n+/*\n * Co-processor Engine type.\n */\n enum vas_cop_type {\ndiff --git a/drivers/crypto/nx/nx-842-powernv.c b/drivers/crypto/nx/nx-842-powernv.c\nindex 1710f80..3abb045 100644\n--- a/drivers/crypto/nx/nx-842-powernv.c\n+++ b/drivers/crypto/nx/nx-842-powernv.c\n@@ -22,6 +22,7 @@\n \n #include \n #include \n+#include \n \n MODULE_LICENSE(\"GPL\");\n MODULE_AUTHOR(\"Dan Streetman \");\n@@ -424,9 +425,9 @@ static int nx842_powernv_function(const unsigned char *in, unsigned int inlen,\n \n \t/* set up CCW */\n \tccw = 0;\n-\tccw = SET_FIELD(ccw, CCW_CT, nx842_ct);\n-\tccw = SET_FIELD(ccw, CCW_CI_842, 0); /* use 0 for hw auto-selection */\n-\tccw = SET_FIELD(ccw, CCW_FC_842, fc);\n+\tccw = SET_FIELD(CCW_CT, ccw, nx842_ct);\n+\tccw = SET_FIELD(CCW_CI_842, ccw, 0); /* use 0 for hw auto-selection */\n+\tccw = SET_FIELD(CCW_FC_842, ccw, fc);\n \n \t/* set up CRB's CSB addr */\n \tcsb_addr = nx842_get_pa(csb) & CRB_CSB_ADDRESS;\ndiff --git a/drivers/crypto/nx/nx-842.h b/drivers/crypto/nx/nx-842.h\nindex a4eee3b..30929bd 100644\n--- a/drivers/crypto/nx/nx-842.h\n+++ b/drivers/crypto/nx/nx-842.h\n@@ -100,11 +100,6 @@ static inline unsigned long nx842_get_pa(void *addr)\n \treturn page_to_phys(vmalloc_to_page(addr)) + offset_in_page(addr);\n }\n \n-/* Get/Set bit fields */\n-#define MASK_LSH(m)\t\t(__builtin_ffsl(m) - 1)\n-#define GET_FIELD(v, m)\t\t(((v) & (m)) >> MASK_LSH(m))\n-#define SET_FIELD(v, m, val)\t(((v) & ~(m)) | (((val) << MASK_LSH(m)) & (m)))\n-\n /**\n * This provides the driver's constraints. Different nx842 implementations\n * may have varying requirements. The constraints are:\n","prefixes":["v7","02/12"]}