{"id":805236,"url":"http://patchwork.ozlabs.org/api/1.2/patches/805236/?format=json","web_url":"http://patchwork.ozlabs.org/project/linux-pci/patch/1503551066-23212-2-git-send-email-oza.oza@broadcom.com/","project":{"id":28,"url":"http://patchwork.ozlabs.org/api/1.2/projects/28/?format=json","name":"Linux PCI development","link_name":"linux-pci","list_id":"linux-pci.vger.kernel.org","list_email":"linux-pci@vger.kernel.org","web_url":null,"scm_url":null,"webscm_url":null,"list_archive_url":"","list_archive_url_format":"","commit_url_format":""},"msgid":"<1503551066-23212-2-git-send-email-oza.oza@broadcom.com>","list_archive_url":null,"date":"2017-08-24T05:04:24","name":"[v8,1/3] PCI: iproc: factor out ep configuration access","commit_ref":null,"pull_url":null,"state":"accepted","archived":false,"hash":"252903936d9267662a5597c9d46721db8bd3bd19","submitter":{"id":71219,"url":"http://patchwork.ozlabs.org/api/1.2/people/71219/?format=json","name":"Oza Pawandeep","email":"oza.oza@broadcom.com"},"delegate":null,"mbox":"http://patchwork.ozlabs.org/project/linux-pci/patch/1503551066-23212-2-git-send-email-oza.oza@broadcom.com/mbox/","series":[],"comments":"http://patchwork.ozlabs.org/api/patches/805236/comments/","check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/805236/checks/","tags":{},"related":[],"headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@bilbo.ozlabs.org","Authentication-Results":["ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=vger.kernel.org\n\t(client-ip=209.132.180.67; helo=vger.kernel.org;\n\tenvelope-from=linux-pci-owner@vger.kernel.org;\n\treceiver=)","ozlabs.org; dkim=pass (1024-bit key;\n\tunprotected) header.d=broadcom.com header.i=@broadcom.com\n\theader.b=\"YPkjJH8Z\"; dkim-atps=neutral"],"Received":["from vger.kernel.org (vger.kernel.org [209.132.180.67])\n\tby ozlabs.org (Postfix) with ESMTP id 3xdC0j1Z13z9s78\n\tfor ;\n\tThu, 24 Aug 2017 15:05:25 +1000 (AEST)","(majordomo@vger.kernel.org) by vger.kernel.org via listexpand\n\tid S1751258AbdHXFEl (ORCPT );\n\tThu, 24 Aug 2017 01:04:41 -0400","from mail-wr0-f173.google.com ([209.85.128.173]:38334 \"EHLO\n\tmail-wr0-f173.google.com\" rhost-flags-OK-OK-OK-OK) by vger.kernel.org\n\twith ESMTP id S1751249AbdHXFEi (ORCPT\n\t); Thu, 24 Aug 2017 01:04:38 -0400","by mail-wr0-f173.google.com with SMTP id p8so6242776wrf.5\n\tfor ; Wed, 23 Aug 2017 22:04:37 -0700 (PDT)","from anjanavk-OptiPlex-7010.dhcp.avagotech.net ([192.19.237.250])\n\tby smtp.gmail.com with ESMTPSA id\n\tn67sm3602691wmi.43.2017.08.23.22.04.29\n\t(version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128);\n\tWed, 23 Aug 2017 22:04:36 -0700 (PDT)"],"DKIM-Signature":"v=1; a=rsa-sha256; c=relaxed/relaxed;\n\td=broadcom.com; s=google;\n\th=from:to:subject:date:message-id:in-reply-to:references;\n\tbh=HtazC3FgZSCBQoIn4qU8Nolq5AplcYcp/WWyqGmYRVU=;\n\tb=YPkjJH8ZIE7lXLeILCUZXzc+Nm/44fRvM8J7OP75L2iLmdistayb2Rzcx9+twNV4va\n\tAzLJ/9iJjZxUJWOAPOz+FbdAovgpUrtyGC+l1wRXv8nj2n6HDb/xctaoGIbR6Svqbo28\n\tTWDCvg68pH3NMiQlf7wX33OJedqTloysyyjnA=","X-Google-DKIM-Signature":"v=1; a=rsa-sha256; c=relaxed/relaxed;\n\td=1e100.net; s=20161025;\n\th=x-gm-message-state:from:to:subject:date:message-id:in-reply-to\n\t:references;\n\tbh=HtazC3FgZSCBQoIn4qU8Nolq5AplcYcp/WWyqGmYRVU=;\n\tb=hPPzgXUhcRwq/ly+ksVwNV8sqa7hxrOlfb/cUQvtMGk1Cxdfamyqw/cYz2USnGQW6g\n\tNkP8OIdy1W2oIzP20fuXmERHYJpch2dK6w2YGN/r16kbGt3U8Io9VqCNjJ3pMNZK51LL\n\tI7rbNL0JkIjpQGK/vE/lL22KtfOoNaRdqam7MBT1GGW9p5lZNPHMVKbC4oIGLaUwfZOL\n\tJUCEnw70UMiV22d1EmsGz92z+2qJRVRPyeWc3XSrtr3tJ0HI5AIQiyfZTO7Zg0+gz65g\n\tBaHVXiCSEKqNTFLqZ8igIZLGWzGiHcCUuALL42SCwLVPCoGz32RVUBMaal5yTuhTnttM\n\tXr7A==","X-Gm-Message-State":"AHYfb5hlK4QY229i4rp0wB/GFm4ELlXBRq6zCmhW/ULrx+70/KD3iY8l\n\tEeFwMqu/sYvusCiA","X-Received":"by 10.223.195.120 with SMTP id e53mr3084321wrg.115.1503551076959;\n\tWed, 23 Aug 2017 22:04:36 -0700 (PDT)","From":"Oza Pawandeep ","To":"Bjorn Helgaas , ,\n\tRob Herring , Mark Rutland ,\n\tRay Jui , Scott Branden ,\n\tJon Mason , bcm-kernel-feedback-list@broadcom.com,\n\tOza Pawandeep ,\n\tAndy Gospodarek ,\n\tlinux-pci@vger.kernel.org, devicetree@vger.kernel.org,\n\tlinux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org,\n\tOza Pawandeep ","Subject":"[PATCH v8 1/3] PCI: iproc: factor out ep configuration access","Date":"Thu, 24 Aug 2017 10:34:24 +0530","Message-Id":"<1503551066-23212-2-git-send-email-oza.oza@broadcom.com>","X-Mailer":"git-send-email 1.9.1","In-Reply-To":"<1503551066-23212-1-git-send-email-oza.oza@broadcom.com>","References":"<1503551066-23212-1-git-send-email-oza.oza@broadcom.com>","Sender":"linux-pci-owner@vger.kernel.org","Precedence":"bulk","List-ID":"","X-Mailing-List":"linux-pci@vger.kernel.org"},"content":"This patch factors out ep configuration access\nas a separate function.\n\nSigned-off-by: Oza Pawandeep ","diff":"diff --git a/drivers/pci/host/pcie-iproc.c b/drivers/pci/host/pcie-iproc.c\nindex c574863..61d9be6 100644\n--- a/drivers/pci/host/pcie-iproc.c\n+++ b/drivers/pci/host/pcie-iproc.c\n@@ -448,6 +448,31 @@ static inline void iproc_pcie_apb_err_disable(struct pci_bus *bus,\n \t}\n }\n \n+static void __iomem *iproc_pcie_map_ep_cfg_reg(struct iproc_pcie *pcie,\n+\t\t\t\t\t unsigned int busno,\n+\t\t\t\t\t unsigned int slot,\n+\t\t\t\t\t unsigned int fn,\n+\t\t\t\t\t int where)\n+{\n+\tu16 offset;\n+\tu32 val;\n+\n+\t/* EP device access */\n+\tval = (busno << CFG_ADDR_BUS_NUM_SHIFT) |\n+\t\t(slot << CFG_ADDR_DEV_NUM_SHIFT) |\n+\t\t(fn << CFG_ADDR_FUNC_NUM_SHIFT) |\n+\t\t(where & CFG_ADDR_REG_NUM_MASK) |\n+\t\t(1 & CFG_ADDR_CFG_TYPE_MASK);\n+\n+\tiproc_pcie_write_reg(pcie, IPROC_PCIE_CFG_ADDR, val);\n+\toffset = iproc_pcie_reg_offset(pcie, IPROC_PCIE_CFG_DATA);\n+\n+\tif (iproc_pcie_reg_is_invalid(offset))\n+\t\treturn NULL;\n+\n+\treturn (pcie->base + offset);\n+}\n+\n /**\n * Note access to the configuration registers are protected at the higher layer\n * by 'pci_lock' in drivers/pci/access.c\n@@ -459,7 +484,6 @@ static void __iomem *iproc_pcie_map_cfg_bus(struct iproc_pcie *pcie,\n {\n \tunsigned slot = PCI_SLOT(devfn);\n \tunsigned fn = PCI_FUNC(devfn);\n-\tu32 val;\n \tu16 offset;\n \n \t/* root complex access */\n@@ -484,18 +508,7 @@ static void __iomem *iproc_pcie_map_cfg_bus(struct iproc_pcie *pcie,\n \t\tif (slot > 0)\n \t\t\treturn NULL;\n \n-\t/* EP device access */\n-\tval = (busno << CFG_ADDR_BUS_NUM_SHIFT) |\n-\t\t(slot << CFG_ADDR_DEV_NUM_SHIFT) |\n-\t\t(fn << CFG_ADDR_FUNC_NUM_SHIFT) |\n-\t\t(where & CFG_ADDR_REG_NUM_MASK) |\n-\t\t(1 & CFG_ADDR_CFG_TYPE_MASK);\n-\tiproc_pcie_write_reg(pcie, IPROC_PCIE_CFG_ADDR, val);\n-\toffset = iproc_pcie_reg_offset(pcie, IPROC_PCIE_CFG_DATA);\n-\tif (iproc_pcie_reg_is_invalid(offset))\n-\t\treturn NULL;\n-\telse\n-\t\treturn (pcie->base + offset);\n+\treturn iproc_pcie_map_ep_cfg_reg(pcie, busno, slot, fn, where);\n }\n \n static void __iomem *iproc_pcie_bus_map_cfg_bus(struct pci_bus *bus,\n","prefixes":["v8","1/3"]}