{"id":804838,"url":"http://patchwork.ozlabs.org/api/1.2/patches/804838/?format=json","web_url":"http://patchwork.ozlabs.org/project/linux-pci/patch/1503471777-73999-1-git-send-email-shawn.lin@rock-chips.com/","project":{"id":28,"url":"http://patchwork.ozlabs.org/api/1.2/projects/28/?format=json","name":"Linux PCI development","link_name":"linux-pci","list_id":"linux-pci.vger.kernel.org","list_email":"linux-pci@vger.kernel.org","web_url":null,"scm_url":null,"webscm_url":null,"list_archive_url":"","list_archive_url_format":"","commit_url_format":""},"msgid":"<1503471777-73999-1-git-send-email-shawn.lin@rock-chips.com>","list_archive_url":null,"date":"2017-08-23T07:02:57","name":"[v5,06/10] PCI: rockchip: fix missing phy manipulation for legacy phy","commit_ref":null,"pull_url":null,"state":"not-applicable","archived":false,"hash":"b13f225582a87e0da0ccc218cc6b02d0f76f87ef","submitter":{"id":66993,"url":"http://patchwork.ozlabs.org/api/1.2/people/66993/?format=json","name":"Shawn Lin","email":"shawn.lin@rock-chips.com"},"delegate":null,"mbox":"http://patchwork.ozlabs.org/project/linux-pci/patch/1503471777-73999-1-git-send-email-shawn.lin@rock-chips.com/mbox/","series":[],"comments":"http://patchwork.ozlabs.org/api/patches/804838/comments/","check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/804838/checks/","tags":{},"related":[],"headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@bilbo.ozlabs.org","Authentication-Results":"ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=vger.kernel.org\n\t(client-ip=209.132.180.67; helo=vger.kernel.org;\n\tenvelope-from=linux-pci-owner@vger.kernel.org;\n\treceiver=)","Received":["from vger.kernel.org (vger.kernel.org [209.132.180.67])\n\tby ozlabs.org (Postfix) with ESMTP id 3xcdh12JVCz9s0Z\n\tfor ;\n\tWed, 23 Aug 2017 17:04:01 +1000 (AEST)","(majordomo@vger.kernel.org) by vger.kernel.org via listexpand\n\tid S1753318AbdHWHEA (ORCPT );\n\tWed, 23 Aug 2017 03:04:00 -0400","from lucky1.263xmail.com ([211.157.147.130]:41453 \"EHLO\n\tlucky1.263xmail.com\" rhost-flags-OK-OK-OK-OK) by vger.kernel.org\n\twith ESMTP id S1753238AbdHWHEA (ORCPT\n\t); Wed, 23 Aug 2017 03:04:00 -0400","from shawn.lin?rock-chips.com (unknown [192.168.167.190])\n\tby lucky1.263xmail.com (Postfix) with ESMTP id AD06C1EF1B3;\n\tWed, 23 Aug 2017 15:03:56 +0800 (CST)","from localhost.localdomain (localhost [127.0.0.1])\n\tby smtp.263.net (Postfix) with ESMTPA id 12FFF3CE;\n\tWed, 23 Aug 2017 15:03:56 +0800 (CST)","from localhost.localdomain (unknown [58.22.7.114])\n\tby smtp.263.net (Postfix) whith ESMTP id 327201QXQ1;\n\tWed, 23 Aug 2017 15:03:57 +0800 (CST)"],"X-263anti-spam":"KSV:0;","X-MAIL-GRAY":"1","X-MAIL-DELIVERY":"0","X-KSVirus-check":"0","X-ABS-CHECKED":"4","X-RL-SENDER":"shawn.lin@rock-chips.com","X-FST-TO":"bhelgaas@google.com","X-SENDER-IP":"58.22.7.114","X-LOGIN-NAME":"shawn.lin@rock-chips.com","X-UNIQUE-TAG":"<5db49b83b732c113d2b000f3ac057d3e>","X-ATTACHMENT-NUM":"0","X-SENDER":"lintao@rock-chips.com","X-DNS-TYPE":"0","From":"Shawn Lin ","To":"Bjorn Helgaas ","Cc":"linux-pci@vger.kernel.org, linux-rockchip@lists.infradead.org,\n\tBrian Norris ,\n\tJeffy Chen ,\n\tShawn Lin ","Subject":"[PATCH v5 06/10] PCI: rockchip: fix missing phy manipulation for\n\tlegacy phy","Date":"Wed, 23 Aug 2017 15:02:57 +0800","Message-Id":"<1503471777-73999-1-git-send-email-shawn.lin@rock-chips.com>","X-Mailer":"git-send-email 1.9.1","In-Reply-To":"<1503471673-69478-1-git-send-email-shawn.lin@rock-chips.com>","References":"<1503471673-69478-1-git-send-email-shawn.lin@rock-chips.com>","Sender":"linux-pci-owner@vger.kernel.org","Precedence":"bulk","List-ID":"","X-Mailing-List":"linux-pci@vger.kernel.org"},"content":"For instance, if a EP connect to lane3 and work under lagecy\nphy mode, so struct phy phys[0..2] are all NULL. In this case,\nrockchip->lanes_map & BIT(i) will tell the driver that lane0 is\nalready inactive, but what we want actually is to power off\nthe phys[0] for legacy phy mode. Fix this by add checking of\nrockchip->legacy_phy for rockchip_pcie_deinit_phys.\n\nSigned-off-by: Shawn Lin \n---\n\nChanges in v5: None\nChanges in v4: None\nChanges in v3: None\nChanges in v2: None\n\n drivers/pci/host/pcie-rockchip.c | 2 +-\n 1 file changed, 1 insertion(+), 1 deletion(-)","diff":"diff --git a/drivers/pci/host/pcie-rockchip.c b/drivers/pci/host/pcie-rockchip.c\nindex 9cd51e0..933e3e9 100644\n--- a/drivers/pci/host/pcie-rockchip.c\n+++ b/drivers/pci/host/pcie-rockchip.c\n@@ -759,7 +759,7 @@ static void rockchip_pcie_deinit_phys(struct rockchip_pcie *rockchip)\n \n \tfor (i = 0; i < MAX_LANE_NUM; i++) {\n \t\t/* inactive lane is already powered off */\n-\t\tif (rockchip->lanes_map & BIT(i))\n+\t\tif (rockchip->legacy_phy || rockchip->lanes_map & BIT(i))\n \t\t\tphy_power_off(rockchip->phys[i]);\n \t\tphy_exit(rockchip->phys[i]);\n \t}\n","prefixes":["v5","06/10"]}