{"id":804770,"url":"http://patchwork.ozlabs.org/api/1.2/patches/804770/?format=json","web_url":"http://patchwork.ozlabs.org/project/devicetree-bindings/patch/20170823060957.31167-1-joel@jms.id.au/","project":{"id":37,"url":"http://patchwork.ozlabs.org/api/1.2/projects/37/?format=json","name":"Devicetree Bindings","link_name":"devicetree-bindings","list_id":"devicetree.vger.kernel.org","list_email":"devicetree@vger.kernel.org","web_url":"","scm_url":"","webscm_url":"","list_archive_url":"","list_archive_url_format":"","commit_url_format":""},"msgid":"<20170823060957.31167-1-joel@jms.id.au>","list_archive_url":null,"date":"2017-08-23T06:09:56","name":"[1/2] dt-bindings: aspeed-scu: Add clock and reset properties","commit_ref":null,"pull_url":null,"state":"not-applicable","archived":true,"hash":"cb71d25bf2d3b417f2189580deb48d8ca7d3a04c","submitter":{"id":48628,"url":"http://patchwork.ozlabs.org/api/1.2/people/48628/?format=json","name":"Joel Stanley","email":"joel@jms.id.au"},"delegate":null,"mbox":"http://patchwork.ozlabs.org/project/devicetree-bindings/patch/20170823060957.31167-1-joel@jms.id.au/mbox/","series":[],"comments":"http://patchwork.ozlabs.org/api/patches/804770/comments/","check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/804770/checks/","tags":{},"related":[],"headers":{"Return-Path":"<devicetree-owner@vger.kernel.org>","X-Original-To":"incoming-dt@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming-dt@bilbo.ozlabs.org","Authentication-Results":["ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=vger.kernel.org\n\t(client-ip=209.132.180.67; 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\n\tTue, 22 Aug 2017 23:10:15 -0700 (PDT)","From":"Joel Stanley <joel@jms.id.au>","To":"Lee Jones <lee.jones@linaro.org>, Rob Herring <robh+dt@kernel.org>,\n\tMark Rutland <mark.rutland@arm.com>,\n\tMichael Turquette <mturquette@baylibre.com>,\n\tStephen Boyd <sboyd@codeaurora.org>","Cc":"devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,\n\tlinux-clk@vger.kernel.org, Andrew Jeffery <andrew@aj.id.au>,\n\tBenjamin Herrenschmidt <benh@kernel.crashing.org>,\n\tJeremy Kerr <jk@ozlabs.org>, Rick Altherr <raltherr@google.com>,\n\tRyan Chen <ryan_chen@aspeedtech.com>","Subject":"[PATCH 1/2] dt-bindings: aspeed-scu: Add clock and reset properties","Date":"Wed, 23 Aug 2017 15:39:56 +0930","Message-Id":"<20170823060957.31167-1-joel@jms.id.au>","X-Mailer":"git-send-email 2.14.1","Sender":"devicetree-owner@vger.kernel.org","Precedence":"bulk","List-ID":"<devicetree.vger.kernel.org>","X-Mailing-List":"devicetree@vger.kernel.org"},"content":"Signed-off-by: Joel Stanley <joel@jms.id.au>\n---\n Documentation/devicetree/bindings/mfd/aspeed-scu.txt | 6 ++++++\n 1 file changed, 6 insertions(+)","diff":"diff --git a/Documentation/devicetree/bindings/mfd/aspeed-scu.txt b/Documentation/devicetree/bindings/mfd/aspeed-scu.txt\nindex 4fc5b83726d6..ce8cf0ec6279 100644\n--- a/Documentation/devicetree/bindings/mfd/aspeed-scu.txt\n+++ b/Documentation/devicetree/bindings/mfd/aspeed-scu.txt\n@@ -9,10 +9,16 @@ Required properties:\n \t\t\"aspeed,g5-scu\", \"syscon\", \"simple-mfd\"\n \n - reg:\t\tcontains the offset and length of the SCU memory region\n+- #clock-cells: should be set to <1> - the system controller is also a\n+\tclock provider\n+- #reset-cells: should be set to <1> - the system controller is also a\n+\treset line provider\n \n Example:\n \n syscon: syscon@1e6e2000 {\n \tcompatible = \"aspeed,ast2400-scu\", \"syscon\", \"simple-mfd\";\n \treg = <0x1e6e2000 0x1a8>;\n+\t#clock-cells = <1>;\n+\t#reset-cells = <1>;\n };\n","prefixes":["1/2"]}