{"id":804524,"url":"http://patchwork.ozlabs.org/api/1.2/patches/804524/?format=json","web_url":"http://patchwork.ozlabs.org/project/uboot/patch/1503414919-30820-8-git-send-email-bmeng.cn@gmail.com/","project":{"id":18,"url":"http://patchwork.ozlabs.org/api/1.2/projects/18/?format=json","name":"U-Boot","link_name":"uboot","list_id":"u-boot.lists.denx.de","list_email":"u-boot@lists.denx.de","web_url":null,"scm_url":null,"webscm_url":null,"list_archive_url":"","list_archive_url_format":"","commit_url_format":""},"msgid":"<1503414919-30820-8-git-send-email-bmeng.cn@gmail.com>","list_archive_url":null,"date":"2017-08-22T15:15:12","name":"[U-Boot,07/14] nvme: Use macros to access NVMe queues","commit_ref":"722e668db2b4dca735aafcd9ed325145d8a9208c","pull_url":null,"state":"accepted","archived":false,"hash":"fd1f7b0c17b6b219e50e7eac959bb1ca59ffbe73","submitter":{"id":64981,"url":"http://patchwork.ozlabs.org/api/1.2/people/64981/?format=json","name":"Bin Meng","email":"bmeng.cn@gmail.com"},"delegate":{"id":3651,"url":"http://patchwork.ozlabs.org/api/1.2/users/3651/?format=json","username":"trini","first_name":"Tom","last_name":"Rini","email":"trini@ti.com"},"mbox":"http://patchwork.ozlabs.org/project/uboot/patch/1503414919-30820-8-git-send-email-bmeng.cn@gmail.com/mbox/","series":[],"comments":"http://patchwork.ozlabs.org/api/patches/804524/comments/","check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/804524/checks/","tags":{},"related":[],"headers":{"Return-Path":"<u-boot-bounces@lists.denx.de>","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@bilbo.ozlabs.org","Authentication-Results":["ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=lists.denx.de\n\t(client-ip=81.169.180.215; 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charset=\"utf-8\"","Content-Transfer-Encoding":"base64","Errors-To":"u-boot-bounces@lists.denx.de","Sender":"\"U-Boot\" <u-boot-bounces@lists.denx.de>"},"content":"NVMe driver only uses two queues. The first one is allocated to do\nadmin stuff, while the second one is for IO stuff. So far the driver\nuses magic number (0/1) to access them. Change to use macros.\n\nSigned-off-by: Bin Meng <bmeng.cn@gmail.com>\n---\n\n drivers/nvme/nvme.c | 22 +++++++++++++++-------\n 1 file changed, 15 insertions(+), 7 deletions(-)","diff":"diff --git a/drivers/nvme/nvme.c b/drivers/nvme/nvme.c\nindex 8867977..868ff45 100644\n--- a/drivers/nvme/nvme.c\n+++ b/drivers/nvme/nvme.c\n@@ -23,6 +23,12 @@ struct nvme_info *nvme_info;\n #define IO_TIMEOUT\t\t30\n #define MAX_PRP_POOL\t\t512\n \n+enum nvme_queue_id {\n+\tNVME_ADMIN_Q,\n+\tNVME_IO_Q,\n+\tNVME_Q_NUM,\n+};\n+\n /*\n  * An NVM Express queue. Each device has at least two (one for admin\n  * commands and one for I/O commands).\n@@ -209,7 +215,8 @@ static int nvme_submit_sync_cmd(struct nvme_queue *nvmeq,\n static int nvme_submit_admin_cmd(struct nvme_dev *dev, struct nvme_command *cmd,\n \t\t\t\t u32 *result)\n {\n-\treturn nvme_submit_sync_cmd(dev->queues[0], cmd, result, ADMIN_TIMEOUT);\n+\treturn nvme_submit_sync_cmd(dev->queues[NVME_ADMIN_Q], cmd,\n+\t\t\t\t    result, ADMIN_TIMEOUT);\n }\n \n static struct nvme_queue *nvme_alloc_queue(struct nvme_dev *dev,\n@@ -349,7 +356,7 @@ static int nvme_configure_admin_queue(struct nvme_dev *dev)\n \tif (result < 0)\n \t\treturn result;\n \n-\tnvmeq = dev->queues[0];\n+\tnvmeq = dev->queues[NVME_ADMIN_Q];\n \tif (!nvmeq) {\n \t\tnvmeq = nvme_alloc_queue(dev, 0, NVME_AQ_DEPTH);\n \t\tif (!nvmeq)\n@@ -377,7 +384,7 @@ static int nvme_configure_admin_queue(struct nvme_dev *dev)\n \n \tnvmeq->cq_vector = 0;\n \n-\tnvme_init_queue(dev->queues[0], 0);\n+\tnvme_init_queue(dev->queues[NVME_ADMIN_Q], 0);\n \n \treturn result;\n \n@@ -691,7 +698,7 @@ static ulong nvme_blk_read(struct udevice *udev, lbaint_t blknr,\n \t\tc.rw.length = cpu_to_le16(lbas - 1);\n \t\tc.rw.prp1 = cpu_to_le64((ulong)buffer);\n \t\tc.rw.prp2 = cpu_to_le64(prp2);\n-\t\tstatus = nvme_submit_sync_cmd(dev->queues[1],\n+\t\tstatus = nvme_submit_sync_cmd(dev->queues[NVME_IO_Q],\n \t\t\t\t&c, NULL, IO_TIMEOUT);\n \t\tif (status)\n \t\t\tbreak;\n@@ -744,7 +751,7 @@ static ulong nvme_blk_write(struct udevice *udev, lbaint_t blknr,\n \t\tc.rw.length = cpu_to_le16(lbas - 1);\n \t\tc.rw.prp1 = cpu_to_le64((ulong)buffer);\n \t\tc.rw.prp2 = cpu_to_le64(prp2);\n-\t\tstatus = nvme_submit_sync_cmd(dev->queues[1],\n+\t\tstatus = nvme_submit_sync_cmd(dev->queues[NVME_IO_Q],\n \t\t\t\t&c, NULL, IO_TIMEOUT);\n \t\tif (status)\n \t\t\tbreak;\n@@ -792,13 +799,14 @@ static int nvme_probe(struct udevice *udev)\n \t\tgoto free_nvme;\n \t}\n \n-\tndev->queues = malloc(2 * sizeof(struct nvme_queue *));\n+\tndev->queues = malloc(NVME_Q_NUM * sizeof(struct nvme_queue *));\n \tif (!ndev->queues) {\n \t\tret = -ENOMEM;\n \t\tprintf(\"Error: %s: Out of memory!\\n\", udev->name);\n \t\tgoto free_nvme;\n \t}\n-\tmemset(ndev->queues, 0, sizeof(2 * sizeof(struct nvme_queue *)));\n+\tmemset(ndev->queues, 0,\n+\t       sizeof(NVME_Q_NUM * sizeof(struct nvme_queue *)));\n \n \tndev->prp_pool = malloc(MAX_PRP_POOL);\n \tif (!ndev->prp_pool) {\n","prefixes":["U-Boot","07/14"]}