{"id":804522,"url":"http://patchwork.ozlabs.org/api/1.2/patches/804522/?format=json","web_url":"http://patchwork.ozlabs.org/project/uboot/patch/1503414919-30820-9-git-send-email-bmeng.cn@gmail.com/","project":{"id":18,"url":"http://patchwork.ozlabs.org/api/1.2/projects/18/?format=json","name":"U-Boot","link_name":"uboot","list_id":"u-boot.lists.denx.de","list_email":"u-boot@lists.denx.de","web_url":null,"scm_url":null,"webscm_url":null,"list_archive_url":"","list_archive_url_format":"","commit_url_format":""},"msgid":"<1503414919-30820-9-git-send-email-bmeng.cn@gmail.com>","list_archive_url":null,"date":"2017-08-22T15:15:13","name":"[U-Boot,08/14] nvme: Consolidate block read and write routines","commit_ref":"625a483cea6442da5d435830357c10ecc459f9c6","pull_url":null,"state":"accepted","archived":false,"hash":"a86968e2bba908ec70200bd5917602f8a992b202","submitter":{"id":64981,"url":"http://patchwork.ozlabs.org/api/1.2/people/64981/?format=json","name":"Bin Meng","email":"bmeng.cn@gmail.com"},"delegate":{"id":3651,"url":"http://patchwork.ozlabs.org/api/1.2/users/3651/?format=json","username":"trini","first_name":"Tom","last_name":"Rini","email":"trini@ti.com"},"mbox":"http://patchwork.ozlabs.org/project/uboot/patch/1503414919-30820-9-git-send-email-bmeng.cn@gmail.com/mbox/","series":[],"comments":"http://patchwork.ozlabs.org/api/patches/804522/comments/","check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/804522/checks/","tags":{},"related":[],"headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@bilbo.ozlabs.org","Authentication-Results":["ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=lists.denx.de\n\t(client-ip=81.169.180.215; helo=lists.denx.de;\n\tenvelope-from=u-boot-bounces@lists.denx.de;\n\treceiver=)","ozlabs.org;\n\tdkim=fail reason=\"signature verification failed\" (2048-bit key;\n\tunprotected) header.d=gmail.com header.i=@gmail.com\n\theader.b=\"HbPiN9S8\"; dkim-atps=neutral"],"Received":["from lists.denx.de (dione.denx.de [81.169.180.215])\n\tby ozlabs.org (Postfix) with ESMTP id 3xcDd55w4rz9sNd\n\tfor ;\n\tWed, 23 Aug 2017 01:15:05 +1000 (AEST)","by lists.denx.de (Postfix, from userid 105)\n\tid 93A7CC21F03; Tue, 22 Aug 2017 15:13:33 +0000 (UTC)","from lists.denx.de (localhost [IPv6:::1])\n\tby lists.denx.de (Postfix) with ESMTP id EDE46C21EFB;\n\tTue, 22 Aug 2017 15:11:52 +0000 (UTC)","by lists.denx.de (Postfix, from userid 105)\n\tid A8DB4C21EFB; Tue, 22 Aug 2017 15:11:14 +0000 (UTC)","from mail-io0-f196.google.com (mail-io0-f196.google.com\n\t[209.85.223.196])\n\tby lists.denx.de (Postfix) with ESMTPS id BB314C21E62\n\tfor ; Tue, 22 Aug 2017 15:11:09 +0000 (UTC)","by mail-io0-f196.google.com with SMTP id m40so2352474ioi.4\n\tfor ; Tue, 22 Aug 2017 08:11:09 -0700 (PDT)","from ala-d2121-lx1.wrs.com (unknown-156-139.windriver.com.\n\t[147.11.156.139]) by smtp.gmail.com with ESMTPSA id\n\ta189sm5182572itd.5.2017.08.22.08.11.07\n\t(version=TLS1_1 cipher=ECDHE-RSA-AES128-SHA bits=128/128);\n\tTue, 22 Aug 2017 08:11:07 -0700 (PDT)"],"X-Spam-Checker-Version":"SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de","X-Spam-Level":"","X-Spam-Status":"No, score=0.0 required=5.0 tests=FREEMAIL_FROM,\n\tRCVD_IN_DNSWL_NONE, RCVD_IN_MSPIKE_H2,\n\tT_DKIM_INVALID autolearn=unavailable\n\tautolearn_force=no version=3.4.0","DKIM-Signature":"v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025;\n\th=from:to:subject:date:message-id:in-reply-to:references;\n\tbh=3qPlVqgFATiELJ+IJzYxAtIe37P5lklLHK4ICyGgbvI=;\n\tb=HbPiN9S8LwgSR70c3ireeCpvyDc2peqWq7Wu8sfv26KrjnWjPVGQsSymSoV8DU+30c\n\tXJeVL+LpCoEbkHo7nXuK2nzSEoxT7aNb2g4E0yAavmGlAyOpg4Qi3EokxR/IAReS8xar\n\twighLcJP3cRetlOU3Z19c+gckcepyKMC0KCilOxjdLWRer8x7+VgZJV1n/iIKpgpINrk\n\ts2pXmNAv2xKjNblKLTfi2rYUlC8e2B40cmrFxGauiThWYSgjA13/P/LyvzrRkwht45IT\n\tQl9MbE5CWwuRu3j32d0xfTyXxvkR+irxzd1QbH0rhbJEFO6nGOzuIdoqnmI0Z1EQFHUq\n\tXD8w==","X-Google-DKIM-Signature":"v=1; a=rsa-sha256; c=relaxed/relaxed;\n\td=1e100.net; s=20161025;\n\th=x-gm-message-state:from:to:subject:date:message-id:in-reply-to\n\t:references;\n\tbh=3qPlVqgFATiELJ+IJzYxAtIe37P5lklLHK4ICyGgbvI=;\n\tb=E3diAtHrfo0JTawxAkCEC4hA9aSpLPNAzF67eKmN6KM9wriBjijTT+xS5YeyUOBB2R\n\tfMk3W3z86UqRNJuDyxOyE/EGM0Oud0yvq2Y3c2FfUjjNDeuQW0VEzOVz9eXx8QFgq4jH\n\ttLN/XXLAUpQGFO2/ACsxbw0jeghlO/zkyyvtMCcs160WIHmbW38LzO3L4kmzVF4+Oh2S\n\taoFYYYTAPTEDz6aMQvwJV9G+I3ckRqy0Yy5gxWeExZLHiCAK6DCuxPrAGKeXXFtwRmJ5\n\tf0Zaj6bjCmhXTvp0qaXJntwWXVbcNoXneQXoeICbDJSvLqj5GDW1lT3IyQV9wvO/4SZg\n\tsQUQ==","X-Gm-Message-State":"AHYfb5i2zxNqVuoK7YJhgF8sM7FvytC6/zyzrW3qCbt7vju9DltAh0Ez\n\tDNjwMyNg3PV+MA==","X-Received":"by 10.107.156.147 with SMTP id f141mr869937ioe.78.1503414668667; \n\tTue, 22 Aug 2017 08:11:08 -0700 (PDT)","From":"Bin Meng ","To":"Tom Rini , U-Boot Mailing List ","Date":"Tue, 22 Aug 2017 08:15:13 -0700","Message-Id":"<1503414919-30820-9-git-send-email-bmeng.cn@gmail.com>","X-Mailer":"git-send-email 1.7.9.5","In-Reply-To":"<1503414919-30820-1-git-send-email-bmeng.cn@gmail.com>","References":"<1503414919-30820-1-git-send-email-bmeng.cn@gmail.com>","Subject":"[U-Boot] [PATCH 08/14] nvme: Consolidate block read and write\n\troutines","X-BeenThere":"u-boot@lists.denx.de","X-Mailman-Version":"2.1.18","Precedence":"list","List-Id":"U-Boot discussion ","List-Unsubscribe":",\n\t","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n\t","MIME-Version":"1.0","Content-Type":"text/plain; charset=\"utf-8\"","Content-Transfer-Encoding":"base64","Errors-To":"u-boot-bounces@lists.denx.de","Sender":"\"U-Boot\" "},"content":"The NVMe block read and write routines are almost the same except\nthe command opcode. Let's consolidate them to avoid duplication.\n\nSigned-off-by: Bin Meng \n---\n\n drivers/nvme/nvme.c | 65 ++++++++++-------------------------------------------\n 1 file changed, 12 insertions(+), 53 deletions(-)","diff":"diff --git a/drivers/nvme/nvme.c b/drivers/nvme/nvme.c\nindex 868ff45..c545ce7 100644\n--- a/drivers/nvme/nvme.c\n+++ b/drivers/nvme/nvme.c\n@@ -656,8 +656,8 @@ static int nvme_blk_probe(struct udevice *udev)\n \treturn 0;\n }\n \n-static ulong nvme_blk_read(struct udevice *udev, lbaint_t blknr,\n-\t\t\t lbaint_t blkcnt, void *buffer)\n+static ulong nvme_blk_rw(struct udevice *udev, lbaint_t blknr,\n+\t\t\t lbaint_t blkcnt, void *buffer, bool read)\n {\n \tstruct nvme_ns *ns = dev_get_priv(udev);\n \tstruct nvme_dev *dev = ns->dev;\n@@ -672,7 +672,7 @@ static ulong nvme_blk_read(struct udevice *udev, lbaint_t blknr,\n \tu16 lbas = 1 << (dev->max_transfer_shift - ns->lba_shift);\n \tu64 total_lbas = blkcnt;\n \n-\tc.rw.opcode = nvme_cmd_read;\n+\tc.rw.opcode = read ? nvme_cmd_read : nvme_cmd_write;\n \tc.rw.flags = 0;\n \tc.rw.nsid = cpu_to_le32(ns->ns_id);\n \tc.rw.control = 0;\n@@ -690,8 +690,8 @@ static ulong nvme_blk_read(struct udevice *udev, lbaint_t blknr,\n \t\t\ttotal_lbas -= lbas;\n \t\t}\n \n-\t\tif (nvme_setup_prps\n-\t\t (dev, &prp2, lbas << ns->lba_shift, (ulong)buffer))\n+\t\tif (nvme_setup_prps(dev, &prp2,\n+\t\t\t\t lbas << ns->lba_shift, (ulong)buffer))\n \t\t\treturn -EIO;\n \t\tc.rw.slba = cpu_to_le64(slba);\n \t\tslba += lbas;\n@@ -709,57 +709,16 @@ static ulong nvme_blk_read(struct udevice *udev, lbaint_t blknr,\n \treturn (total_len - temp_len) >> desc->log2blksz;\n }\n \n+static ulong nvme_blk_read(struct udevice *udev, lbaint_t blknr,\n+\t\t\t lbaint_t blkcnt, void *buffer)\n+{\n+\treturn nvme_blk_rw(udev, blknr, blkcnt, buffer, true);\n+}\n+\n static ulong nvme_blk_write(struct udevice *udev, lbaint_t blknr,\n \t\t\t lbaint_t blkcnt, const void *buffer)\n {\n-\tstruct nvme_ns *ns = dev_get_priv(udev);\n-\tstruct nvme_dev *dev = ns->dev;\n-\tstruct nvme_command c;\n-\tstruct blk_desc *desc = dev_get_uclass_platdata(udev);\n-\tint status;\n-\tu64 prp2;\n-\tu64 total_len = blkcnt << desc->log2blksz;\n-\tu64 temp_len = total_len;\n-\n-\tu64 slba = blknr;\n-\tu16 lbas = 1 << (dev->max_transfer_shift - ns->lba_shift);\n-\tu64 total_lbas = blkcnt;\n-\n-\tc.rw.opcode = nvme_cmd_write;\n-\tc.rw.flags = 0;\n-\tc.rw.nsid = cpu_to_le32(ns->ns_id);\n-\tc.rw.control = 0;\n-\tc.rw.dsmgmt = 0;\n-\tc.rw.reftag = 0;\n-\tc.rw.apptag = 0;\n-\tc.rw.appmask = 0;\n-\tc.rw.metadata = 0;\n-\n-\twhile (total_lbas) {\n-\t\tif (total_lbas < lbas) {\n-\t\t\tlbas = (u16)total_lbas;\n-\t\t\ttotal_lbas = 0;\n-\t\t} else {\n-\t\t\ttotal_lbas -= lbas;\n-\t\t}\n-\n-\t\tif (nvme_setup_prps\n-\t\t (dev, &prp2, lbas << ns->lba_shift, (ulong)buffer))\n-\t\t\treturn -EIO;\n-\t\tc.rw.slba = cpu_to_le64(slba);\n-\t\tslba += lbas;\n-\t\tc.rw.length = cpu_to_le16(lbas - 1);\n-\t\tc.rw.prp1 = cpu_to_le64((ulong)buffer);\n-\t\tc.rw.prp2 = cpu_to_le64(prp2);\n-\t\tstatus = nvme_submit_sync_cmd(dev->queues[NVME_IO_Q],\n-\t\t\t\t&c, NULL, IO_TIMEOUT);\n-\t\tif (status)\n-\t\t\tbreak;\n-\t\ttemp_len -= lbas << ns->lba_shift;\n-\t\tbuffer += lbas << ns->lba_shift;\n-\t}\n-\n-\treturn (total_len - temp_len) >> desc->log2blksz;\n+\treturn nvme_blk_rw(udev, blknr, blkcnt, (void *)buffer, false);\n }\n \n static const struct blk_ops nvme_blk_ops = {\n","prefixes":["U-Boot","08/14"]}