{"id":780095,"url":"http://patchwork.ozlabs.org/api/1.2/patches/780095/?format=json","web_url":"http://patchwork.ozlabs.org/project/intel-wired-lan/patch/20170623082451.32671-8-alice.michael@intel.com/","project":{"id":46,"url":"http://patchwork.ozlabs.org/api/1.2/projects/46/?format=json","name":"Intel Wired Ethernet development","link_name":"intel-wired-lan","list_id":"intel-wired-lan.osuosl.org","list_email":"intel-wired-lan@osuosl.org","web_url":"","scm_url":"","webscm_url":"","list_archive_url":"","list_archive_url_format":"","commit_url_format":""},"msgid":"<20170623082451.32671-8-alice.michael@intel.com>","list_archive_url":null,"date":"2017-06-23T08:24:49","name":"[next,S74-V2,08/10] i40e/i40evf: organize and re-number feature flags","commit_ref":null,"pull_url":null,"state":"superseded","archived":false,"hash":"692c42275fa0ddf108aa9a0ec917a768adafce6c","submitter":{"id":71123,"url":"http://patchwork.ozlabs.org/api/1.2/people/71123/?format=json","name":"Michael, Alice","email":"alice.michael@intel.com"},"delegate":{"id":68,"url":"http://patchwork.ozlabs.org/api/1.2/users/68/?format=json","username":"jtkirshe","first_name":"Jeff","last_name":"Kirsher","email":"jeffrey.t.kirsher@intel.com"},"mbox":"http://patchwork.ozlabs.org/project/intel-wired-lan/patch/20170623082451.32671-8-alice.michael@intel.com/mbox/","series":[],"comments":"http://patchwork.ozlabs.org/api/patches/780095/comments/","check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/780095/checks/","tags":{},"related":[],"headers":{"Return-Path":"","X-Original-To":["incoming@patchwork.ozlabs.org","intel-wired-lan@lists.osuosl.org"],"Delivered-To":["patchwork-incoming@bilbo.ozlabs.org","intel-wired-lan@lists.osuosl.org"],"Received":["from fraxinus.osuosl.org (smtp4.osuosl.org [140.211.166.137])\n\t(using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits))\n\t(No client certificate requested)\n\tby ozlabs.org (Postfix) with ESMTPS id 3wvP693KH0z9sNZ\n\tfor ;\n\tSat, 24 Jun 2017 02:29:05 +1000 (AEST)","from localhost (localhost [127.0.0.1])\n\tby fraxinus.osuosl.org (Postfix) with ESMTP id E5E8787A14;\n\tFri, 23 Jun 2017 16:29:03 +0000 (UTC)","from fraxinus.osuosl.org ([127.0.0.1])\n\tby localhost (.osuosl.org [127.0.0.1]) (amavisd-new, port 10024)\n\twith ESMTP id RWuhfGtB24FC; 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23 Jun 2017 09:29:00 -0700"],"X-Virus-Scanned":["amavisd-new at osuosl.org","amavisd-new at osuosl.org"],"X-Greylist":"domain auto-whitelisted by SQLgrey-1.7.6","X-ExtLoop1":"1","X-IronPort-AV":"E=Sophos; i=\"5.39,379,1493708400\"; d=\"scan'208\";\n\ta=\"1163958900\"","From":"Alice Michael ","To":"alice.michael@intel.com,\n\tintel-wired-lan@lists.osuosl.org","Date":"Fri, 23 Jun 2017 04:24:49 -0400","Message-Id":"<20170623082451.32671-8-alice.michael@intel.com>","X-Mailer":"git-send-email 2.9.3","In-Reply-To":"<20170623082451.32671-1-alice.michael@intel.com>","References":"<20170623082451.32671-1-alice.michael@intel.com>","Subject":"[Intel-wired-lan] [next PATCH S74-V2 08/10] i40e/i40evf: organize\n\tand re-number feature flags","X-BeenThere":"intel-wired-lan@osuosl.org","X-Mailman-Version":"2.1.18-1","Precedence":"list","List-Id":"Intel Wired Ethernet Linux Kernel Driver Development\n\t","List-Unsubscribe":", \n\t","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":", \n\t","MIME-Version":"1.0","Content-Type":"text/plain; charset=\"us-ascii\"","Content-Transfer-Encoding":"7bit","Errors-To":"intel-wired-lan-bounces@osuosl.org","Sender":"\"Intel-wired-lan\" "},"content":"From: Jacob Keller \n\nNow that we've reduced the number of flags, organize similar flags\ntogether and re-number them accordingly.\n\nAlso ensure that the flags variable is actually a u64 to guarantee\n64bits of space on all architectures.\n\nOne alternative approach considered, but not implemented here, was to\nuse an enumeration for the flag variables, and create a macro\nI40E_FLAG() which used string concatenation to generate BIT_ULL values.\nThis has the advantage of making the actual bit values compile-time\ndynamic so that we do not need to worry about matching the order to the\nbit value. However, this does produce a high level of code churn, and\nmakes it more difficult to read a dumped flags value when debugging.\n\nSigned-off-by: Jacob Keller \nReviewed-by: Williams, Mitch A \nChange-ID: I8653fff69453cd547d6fe98d29dfa9d8710387d1\n---\n drivers/net/ethernet/intel/i40e/i40e.h | 57 +++++++++++++++---------------\n drivers/net/ethernet/intel/i40evf/i40evf.h | 30 ++++++++--------\n 2 files changed, 44 insertions(+), 43 deletions(-)","diff":"diff --git a/drivers/net/ethernet/intel/i40e/i40e.h b/drivers/net/ethernet/intel/i40e/i40e.h\nindex d0c1bf5..5f75e67 100644\n--- a/drivers/net/ethernet/intel/i40e/i40e.h\n+++ b/drivers/net/ethernet/intel/i40e/i40e.h\n@@ -423,33 +423,34 @@ struct i40e_pf {\n #define I40E_HW_RESTART_AUTONEG\t\t\tBIT_ULL(18)\n \n \tu64 flags;\n-#define I40E_FLAG_RX_CSUM_ENABLED\t\tBIT_ULL(1)\n-#define I40E_FLAG_MSI_ENABLED\t\t\tBIT_ULL(2)\n-#define I40E_FLAG_MSIX_ENABLED\t\t\tBIT_ULL(3)\n-#define I40E_FLAG_HW_ATR_EVICT_ENABLED\t\tBIT_ULL(4)\n-#define I40E_FLAG_RSS_ENABLED\t\t\tBIT_ULL(6)\n-#define I40E_FLAG_VMDQ_ENABLED\t\t\tBIT_ULL(7)\n-#define I40E_FLAG_IWARP_ENABLED\t\t\tBIT_ULL(10)\n-#define I40E_FLAG_FILTER_SYNC\t\t\tBIT_ULL(15)\n-#define I40E_FLAG_SERVICE_CLIENT_REQUESTED\tBIT_ULL(16)\n-#define I40E_FLAG_SRIOV_ENABLED\t\t\tBIT_ULL(19)\n-#define I40E_FLAG_DCB_ENABLED\t\t\tBIT_ULL(20)\n-#define I40E_FLAG_FD_SB_ENABLED\t\t\tBIT_ULL(21)\n-#define I40E_FLAG_FD_ATR_ENABLED\t\tBIT_ULL(22)\n-#define I40E_FLAG_FD_SB_AUTO_DISABLED\t\tBIT_ULL(23)\n-#define I40E_FLAG_FD_ATR_AUTO_DISABLED\t\tBIT_ULL(24)\n-#define I40E_FLAG_PTP\t\t\t\tBIT_ULL(25)\n-#define I40E_FLAG_MFP_ENABLED\t\t\tBIT_ULL(26)\n-#define I40E_FLAG_UDP_FILTER_SYNC\t\tBIT_ULL(27)\n-#define I40E_FLAG_DCB_CAPABLE\t\t\tBIT_ULL(29)\n-#define I40E_FLAG_VEB_STATS_ENABLED\t\tBIT_ULL(37)\n-#define I40E_FLAG_LINK_POLLING_ENABLED\t\tBIT_ULL(39)\n-#define I40E_FLAG_VEB_MODE_ENABLED\t\tBIT_ULL(40)\n-#define I40E_FLAG_TRUE_PROMISC_SUPPORT\t\tBIT_ULL(51)\n-#define I40E_FLAG_CLIENT_RESET\t\t\tBIT_ULL(54)\n-#define I40E_FLAG_TEMP_LINK_POLLING\t\tBIT_ULL(55)\n-#define I40E_FLAG_CLIENT_L2_CHANGE\t\tBIT_ULL(56)\n-#define I40E_FLAG_LEGACY_RX\t\t\tBIT_ULL(58)\n+#define I40E_FLAG_RX_CSUM_ENABLED\t\tBIT_ULL(0)\n+#define I40E_FLAG_MSI_ENABLED\t\t\tBIT_ULL(1)\n+#define I40E_FLAG_MSIX_ENABLED\t\t\tBIT_ULL(2)\n+#define I40E_FLAG_RSS_ENABLED\t\t\tBIT_ULL(3)\n+#define I40E_FLAG_VMDQ_ENABLED\t\t\tBIT_ULL(4)\n+#define I40E_FLAG_FILTER_SYNC\t\t\tBIT_ULL(5)\n+#define I40E_FLAG_SRIOV_ENABLED\t\t\tBIT_ULL(6)\n+#define I40E_FLAG_DCB_CAPABLE\t\t\tBIT_ULL(7)\n+#define I40E_FLAG_DCB_ENABLED\t\t\tBIT_ULL(8)\n+#define I40E_FLAG_FD_SB_ENABLED\t\t\tBIT_ULL(9)\n+#define I40E_FLAG_FD_ATR_ENABLED\t\tBIT_ULL(10)\n+#define I40E_FLAG_FD_SB_AUTO_DISABLED\t\tBIT_ULL(11)\n+#define I40E_FLAG_FD_ATR_AUTO_DISABLED\t\tBIT_ULL(12)\n+#define I40E_FLAG_MFP_ENABLED\t\t\tBIT_ULL(13)\n+#define I40E_FLAG_UDP_FILTER_SYNC\t\tBIT_ULL(14)\n+#define I40E_FLAG_HW_ATR_EVICT_ENABLED\t\tBIT_ULL(15)\n+#define I40E_FLAG_VEB_MODE_ENABLED\t\tBIT_ULL(16)\n+#define I40E_FLAG_VEB_STATS_ENABLED\t\tBIT_ULL(17)\n+#define I40E_FLAG_LINK_POLLING_ENABLED\t\tBIT_ULL(18)\n+#define I40E_FLAG_TRUE_PROMISC_SUPPORT\t\tBIT_ULL(19)\n+#define I40E_FLAG_TEMP_LINK_POLLING\t\tBIT_ULL(20)\n+#define I40E_FLAG_LEGACY_RX\t\t\tBIT_ULL(21)\n+#define I40E_FLAG_PTP\t\t\t\tBIT_ULL(22)\n+#define I40E_FLAG_IWARP_ENABLED\t\t\tBIT_ULL(23)\n+#define I40E_FLAG_SERVICE_CLIENT_REQUESTED\tBIT_ULL(24)\n+#define I40E_FLAG_CLIENT_L2_CHANGE\t\tBIT_ULL(25)\n+#define I40E_FLAG_CLIENT_RESET\t\t\tBIT_ULL(26)\n+#define I40E_FLAG_LINK_DOWN_ON_CLOSE_ENABLED\tBIT_ULL(27)\n \n \tstruct i40e_client_instance *cinst;\n \tbool stat_offsets_loaded;\n@@ -613,7 +614,7 @@ struct i40e_vsi {\n \tDECLARE_BITMAP(state, __I40E_VSI_STATE_SIZE__);\n #define I40E_VSI_FLAG_FILTER_CHANGED\tBIT(0)\n #define I40E_VSI_FLAG_VEB_OWNER\t\tBIT(1)\n-\tunsigned long flags;\n+\tu64 flags;\n \n \t/* Per VSI lock to protect elements/hash (MAC filter) */\n \tspinlock_t mac_filter_hash_lock;\ndiff --git a/drivers/net/ethernet/intel/i40evf/i40evf.h b/drivers/net/ethernet/intel/i40evf/i40evf.h\nindex 7f90536..c89767e 100644\n--- a/drivers/net/ethernet/intel/i40evf/i40evf.h\n+++ b/drivers/net/ethernet/intel/i40evf/i40evf.h\n@@ -220,21 +220,21 @@ struct i40evf_adapter {\n \n \tu32 flags;\n #define I40EVF_FLAG_RX_CSUM_ENABLED\t\tBIT(0)\n-#define I40EVF_FLAG_IMIR_ENABLED\t\tBIT(5)\n-#define I40EVF_FLAG_MQ_CAPABLE\t\t\tBIT(6)\n-#define I40EVF_FLAG_PF_COMMS_FAILED\t\tBIT(8)\n-#define I40EVF_FLAG_RESET_PENDING\t\tBIT(9)\n-#define I40EVF_FLAG_RESET_NEEDED\t\tBIT(10)\n-#define I40EVF_FLAG_WB_ON_ITR_CAPABLE\t\tBIT(11)\n-#define I40EVF_FLAG_OUTER_UDP_CSUM_CAPABLE\tBIT(12)\n-#define I40EVF_FLAG_ADDR_SET_BY_PF\t\tBIT(13)\n-#define I40EVF_FLAG_SERVICE_CLIENT_REQUESTED\tBIT(14)\n-#define I40EVF_FLAG_CLIENT_NEEDS_OPEN\t\tBIT(15)\n-#define I40EVF_FLAG_CLIENT_NEEDS_CLOSE\t\tBIT(16)\n-#define I40EVF_FLAG_CLIENT_NEEDS_L2_PARAMS\tBIT(17)\n-#define I40EVF_FLAG_PROMISC_ON\t\t\tBIT(18)\n-#define I40EVF_FLAG_ALLMULTI_ON\t\t\tBIT(19)\n-#define I40EVF_FLAG_LEGACY_RX\t\t\tBIT(20)\n+#define I40EVF_FLAG_IMIR_ENABLED\t\tBIT(1)\n+#define I40EVF_FLAG_MQ_CAPABLE\t\t\tBIT(2)\n+#define I40EVF_FLAG_PF_COMMS_FAILED\t\tBIT(3)\n+#define I40EVF_FLAG_RESET_PENDING\t\tBIT(4)\n+#define I40EVF_FLAG_RESET_NEEDED\t\tBIT(5)\n+#define I40EVF_FLAG_WB_ON_ITR_CAPABLE\t\tBIT(6)\n+#define I40EVF_FLAG_OUTER_UDP_CSUM_CAPABLE\tBIT(7)\n+#define I40EVF_FLAG_ADDR_SET_BY_PF\t\tBIT(8)\n+#define I40EVF_FLAG_SERVICE_CLIENT_REQUESTED\tBIT(9)\n+#define I40EVF_FLAG_CLIENT_NEEDS_OPEN\t\tBIT(10)\n+#define I40EVF_FLAG_CLIENT_NEEDS_CLOSE\t\tBIT(11)\n+#define I40EVF_FLAG_CLIENT_NEEDS_L2_PARAMS\tBIT(12)\n+#define I40EVF_FLAG_PROMISC_ON\t\t\tBIT(13)\n+#define I40EVF_FLAG_ALLMULTI_ON\t\t\tBIT(14)\n+#define I40EVF_FLAG_LEGACY_RX\t\t\tBIT(15)\n /* duplicates for common code */\n #define I40E_FLAG_DCB_ENABLED\t\t\t0\n #define I40E_FLAG_RX_CSUM_ENABLED\t\tI40EVF_FLAG_RX_CSUM_ENABLED\n","prefixes":["next","S74-V2","08/10"]}