{"id":2235270,"url":"http://patchwork.ozlabs.org/api/1.2/patches/2235270/?format=json","web_url":"http://patchwork.ozlabs.org/project/uboot/patch/20260508-qcom_spl-v7-4-7d0e22aaaa8f@seznam.cz/","project":{"id":18,"url":"http://patchwork.ozlabs.org/api/1.2/projects/18/?format=json","name":"U-Boot","link_name":"uboot","list_id":"u-boot.lists.denx.de","list_email":"u-boot@lists.denx.de","web_url":null,"scm_url":null,"webscm_url":null,"list_archive_url":"","list_archive_url_format":"","commit_url_format":""},"msgid":"<20260508-qcom_spl-v7-4-7d0e22aaaa8f@seznam.cz>","list_archive_url":null,"date":"2026-05-08T21:45:28","name":"[v7,04/11] mach-snapdragon: boot0.h: split out msm8916_boot0.h","commit_ref":null,"pull_url":null,"state":"new","archived":false,"hash":"1ef6760bea626fd4cb25958921cb71eeb057017e","submitter":{"id":77645,"url":"http://patchwork.ozlabs.org/api/1.2/people/77645/?format=json","name":"Michael Srba","email":"michael.srba@seznam.cz"},"delegate":null,"mbox":"http://patchwork.ozlabs.org/project/uboot/patch/20260508-qcom_spl-v7-4-7d0e22aaaa8f@seznam.cz/mbox/","series":[{"id":503468,"url":"http://patchwork.ozlabs.org/api/1.2/series/503468/?format=json","web_url":"http://patchwork.ozlabs.org/project/uboot/list/?series=503468","date":"2026-05-08T21:45:26","name":"Add SPL support for Qualcomm platforms, starting with sdm845","version":7,"mbox":"http://patchwork.ozlabs.org/series/503468/mbox/"}],"comments":"http://patchwork.ozlabs.org/api/patches/2235270/comments/","check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/2235270/checks/","tags":{},"related":[],"headers":{"Return-Path":"<u-boot-bounces@lists.denx.de>","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n secure) header.d=seznam.cz header.i=@seznam.cz header.a=rsa-sha256\n header.s=szn1 header.b=oh7dXcgQ;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de\n (client-ip=2a01:238:438b:c500:173d:9f52:ddab:ee01; helo=phobos.denx.de;\n envelope-from=u-boot-bounces@lists.denx.de; receiver=patchwork.ozlabs.org)","phobos.denx.de;\n dmarc=pass (p=none dis=none) header.from=seznam.cz","phobos.denx.de;\n spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de","phobos.denx.de;\n\tdkim=pass (2048-bit key;\n secure) header.d=seznam.cz header.i=@seznam.cz header.b=\"oh7dXcgQ\";\n\tdkim-atps=neutral","phobos.denx.de;\n dmarc=pass (p=none dis=none) header.from=seznam.cz","phobos.denx.de;\n spf=pass smtp.mailfrom=michael.srba@seznam.cz"],"Received":["from phobos.denx.de (phobos.denx.de\n [IPv6:2a01:238:438b:c500:173d:9f52:ddab:ee01])\n\t(using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)\n\t key-exchange x25519)\n\t(No client certificate requested)\n\tby legolas.ozlabs.org (Postfix) with ESMTPS id 4gC6hm2YFmz1yK7\n\tfor <incoming@patchwork.ozlabs.org>; Sat, 09 May 2026 10:45:12 +1000 (AEST)","from h2850616.stratoserver.net (localhost [IPv6:::1])\n\tby phobos.denx.de (Postfix) with ESMTP id DE96B84EA0;\n\tSat,  9 May 2026 02:40:38 +0200 (CEST)","by phobos.denx.de (Postfix, from userid 109)\n id 5C8B784CF3; Fri,  8 May 2026 23:46:55 +0200 (CEST)","from mxd-2-a03.seznam.cz (mxd-2-a03.seznam.cz\n [IPv6:2a02:598:64:8a00::1000:a03])\n (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits))\n (No client certificate requested)\n by phobos.denx.de (Postfix) with ESMTPS id 50F2D84CE5\n for <u-boot@lists.denx.de>; Fri,  8 May 2026 23:46:53 +0200 (CEST)","from email.seznam.cz by smtpc-mxd-5f4d8d5f6f-w7th8\n (smtpc-mxd-5f4d8d5f6f-w7th8 [2a02:598:64:8a00::1000:a03])\n id 293762047239366d289eae5a; Fri, 08 May 2026 23:46:22 +0200 (CEST)","from [127.0.0.1] (ip-111-27.static.ccinternet.cz [147.161.27.111])\n by smtpd-relay-6597cc8696-jn5pf (szn-email-smtpd/2.0.72) with ESMTPA\n id 8131a610-9ef4-426c-9096-8c91c2c06884;\n Fri, 08 May 2026 23:45:40 +0200"],"X-Spam-Checker-Version":"SpamAssassin 3.4.2 (2018-09-13) on phobos.denx.de","X-Spam-Level":"","X-Spam-Status":"No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED,\n DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,FREEMAIL_FROM,\n RCVD_IN_DNSWL_BLOCKED,SPF_HELO_NONE,SPF_PASS autolearn=ham\n autolearn_force=no version=3.4.2","DKIM-Signature":"v=1; a=rsa-sha256; c=relaxed/relaxed; d=seznam.cz; s=szn1;\n t=1778276782; bh=W5NulKO+Z/2anTFGDAGvp94V5gzt/NMshD3oUxsn0qo=;\n h=From:Date:Subject:MIME-Version:Content-Type:\n Content-Transfer-Encoding:Message-Id:To:Cc;\n b=oh7dXcgQs/lscGsMFHq6uG3sQEnNjcEJsluULg4vXfvSBGpE6UgZ5lnA7PkDIfW60\n LT6xfCSrP7UZCQSdGDFXTB1EP46GG/uohT19lfVo2jJFbs3U2zQw/pMOcsFaaA32Bw\n imDImrK7SrgIooakKo4pbBnGQ5uzoW9yKjKGBZT1UPDa0eA2U2pDmIQyxxOkhkMYKw\n esSdbJMvGBmgjlYgbPeBB7kTceKOJgGwBCtZf+vMiDwHn9qsg1qCU2LACuM40EEGk9\n RckEnElppAhN8w3peLbpJcQHWGyH9kwcQohiRH5qADGZuWX7SBpa9/iYl151Ud/Krp\n +X/dmfi86kdaQ==","From":"michael.srba@seznam.cz","Date":"Fri, 08 May 2026 23:45:28 +0200","Subject":"[PATCH v7 04/11] mach-snapdragon: boot0.h: split out msm8916_boot0.h","MIME-Version":"1.0","Content-Type":"text/plain; charset=\"utf-8\"","Content-Transfer-Encoding":"7bit","Message-Id":"<20260508-qcom_spl-v7-4-7d0e22aaaa8f@seznam.cz>","References":"<20260508-qcom_spl-v7-0-7d0e22aaaa8f@seznam.cz>","In-Reply-To":"<20260508-qcom_spl-v7-0-7d0e22aaaa8f@seznam.cz>","To":"u-boot@lists.denx.de, Sumit Garg <sumit.garg@kernel.org>,\n u-boot-qcom@groups.io","Cc":"Tom Rini <trini@konsulko.com>,\n Ilias Apalodimas <ilias.apalodimas@linaro.org>,\n Simon Glass <sjg@chromium.org>, Sughosh Ganu <sughosh.ganu@arm.com>,\n Anshul Dalal <anshuld@ti.com>, Peng Fan <peng.fan@nxp.com>,\n Mattijs Korpershoek <mkorpershoek@kernel.org>,\n Quentin Schulz <quentin.schulz@cherry.de>,\n Heinrich Schuchardt <xypron.glpk@gmx.de>, Andrew Davis <afd@ti.com>,\n Hrushikesh Salunke <h-salunke@ti.com>,\n Dario Binacchi <dario.binacchi@amarulasolutions.com>, Ye Li <ye.li@nxp.com>,\n Andre Przywara <andre.przywara@arm.com>,\n Alif Zakuan Yuslaimi <alif.zakuan.yuslaimi@altera.com>,\n Leo Yu-Chi Liang <ycliang@andestech.com>,\n Andrew Goodbody <andrew.goodbody@linaro.org>, Dhruva Gole <d-gole@ti.com>,\n Kaustabh Chakraborty <kauschluss@disroot.org>,\n Jerome Forissier <jerome.forissier@arm.com>,\n Heiko Schocher <hs@nabladev.com>,\n Marek Vasut <marek.vasut+renesas@mailbox.org>,\n Lukasz Majewski <lukma@denx.de>,\n Mateusz Kulikowski <mateusz.kulikowski@gmail.com>,\n Dinesh Maniyam <dinesh.maniyam@altera.com>,\n Neil Armstrong <neil.armstrong@linaro.org>,\n Patrice Chotard <patrice.chotard@foss.st.com>,\n Patrick Delaunay <patrick.delaunay@foss.st.com>,\n Michal Simek <michal.simek@amd.com>, Yao Zi <me@ziyao.cc>,\n Peter Korsgaard <peter@korsgaard.com>,\n Rayagonda Kokatanur <rayagonda.kokatanur@broadcom.com>,\n Casey Connolly <casey.connolly@linaro.org>,\n Tingting Meng <tingting.meng@altera.com>,\n Tien Fong Chee <tien.fong.chee@altera.com>, Alice Guo <alice.guo@nxp.com>,\n George Chan <gchan9527@gmail.com>,\n Balaji Selvanathan <balaji.selvanathan@oss.qualcomm.com>,\n Alexey Charkov <alchark@gmail.com>, Ronald Wahl <ronald.wahl@legrand.com>,\n Michael Trimarchi <michael@amarulasolutions.com>,\n Michael Srba <Michael.Srba@seznam.cz>","X-Mailer":"b4 0.15.1","X-Mailman-Approved-At":"Sat, 09 May 2026 02:40:31 +0200","X-BeenThere":"u-boot@lists.denx.de","X-Mailman-Version":"2.1.39","Precedence":"list","List-Id":"U-Boot discussion <u-boot.lists.denx.de>","List-Unsubscribe":"<https://lists.denx.de/options/u-boot>,\n <mailto:u-boot-request@lists.denx.de?subject=unsubscribe>","List-Archive":"<https://lists.denx.de/pipermail/u-boot/>","List-Post":"<mailto:u-boot@lists.denx.de>","List-Help":"<mailto:u-boot-request@lists.denx.de?subject=help>","List-Subscribe":"<https://lists.denx.de/listinfo/u-boot>,\n <mailto:u-boot-request@lists.denx.de?subject=subscribe>","Errors-To":"u-boot-bounces@lists.denx.de","Sender":"\"U-Boot\" <u-boot-bounces@lists.denx.de>","X-Virus-Scanned":"clamav-milter 0.103.8 at phobos.denx.de","X-Virus-Status":"Clean"},"content":"From: Michael Srba <Michael.Srba@seznam.cz>\n\nPrepare for supporting alternative boot0.h per-SoC by splitting out\nthe existing msm8916-specific code.\n\nThere is now a selection mechanism to choose a specific boot0.h\nin the Kconfig. BOOT0_MSM8916_PSCI_WORKAROUND is the only option\nright now, but more can be added. The toplevel boot0.h additionally\nenables conditionally performing the include only in u-boot proper,\nor only in SPL.\n\nSigned-off-by: Michael Srba <Michael.Srba@seznam.cz>\nReviewed-by: Simon Glass <sjg@chromium.org>\n---\n arch/arm/mach-snapdragon/Kconfig                   | 16 ++++++\n arch/arm/mach-snapdragon/include/mach/boot0.h      | 60 +++-------------------\n .../mach-snapdragon/include/mach/msm8916_boot0.h   | 54 +++++++++++++++++++\n configs/dragonboard410c_defconfig                  |  1 +\n configs/hmibsc_defconfig                           |  1 +\n 5 files changed, 80 insertions(+), 52 deletions(-)","diff":"diff --git a/arch/arm/mach-snapdragon/Kconfig b/arch/arm/mach-snapdragon/Kconfig\nindex d3de8693b5a..f863daf6bb9 100644\n--- a/arch/arm/mach-snapdragon/Kconfig\n+++ b/arch/arm/mach-snapdragon/Kconfig\n@@ -42,4 +42,20 @@ config SYS_CONFIG_NAME\n \t  Based on this option include/configs/<CONFIG_SYS_CONFIG_NAME>.h header\n \t  will be used for board configuration.\n \n+choice\n+\tprompt \"Qualcomm boot0.h workaround\"\n+\toptional\n+\thelp\n+\t  While U-Boot on Qualcomm platforms doesn't generally need compile-time\n+\t  adjustments based on the target SoC, workarounds in boot0.h can't\n+\t  practically detect the SoC at runtime. Enable one of these workarounds\n+\t  if you know you need it.\n+\n+config BOOT0_MSM8916_PSCI_WORKAROUND\n+\tbool \"boot0.h workaround for buggy PSCI on the msm8916 SoC\"\n+\thelp\n+\t  Select this if you are building U-Boot proper for an msm8916 board that\n+\t  uses the buggy PSCI implementation.\n+endchoice\n+\n endif\ndiff --git a/arch/arm/mach-snapdragon/include/mach/boot0.h b/arch/arm/mach-snapdragon/include/mach/boot0.h\nindex 953cccad790..b3c76d6d97d 100644\n--- a/arch/arm/mach-snapdragon/include/mach/boot0.h\n+++ b/arch/arm/mach-snapdragon/include/mach/boot0.h\n@@ -1,54 +1,10 @@\n /* SPDX-License-Identifier: GPL-2.0+ */\n-/*\n- * Workaround for \"PSCI bug\" on DragonBoard 410c\n- * Copyright (C) 2021 Stephan Gerhold <stephan@gerhold.net>\n- *\n- * Syscall parameters taken from Qualcomm's LK fork (scm.h):\n- * Copyright (c) 2011-2015, The Linux Foundation. All rights reserved.\n- *\n- * The PSCI implementation in the TrustZone/tz firmware on DragonBoard 410c has\n- * a bug that starts all other CPU cores in 32-bit mode unless the TZ syscall\n- * that switches from 32-bit to 64-bit mode is executed at least once.\n- *\n- * Normally this happens inside Qualcomm's LK bootloader which runs in 32-bit\n- * mode and uses the TZ syscall to boot a kernel in 64-bit mode. However, if\n- * U-Boot is installed to the \"aboot\" partition (replacing LK) the switch to\n- * 64-bit mode never happens since U-Boot is already running in 64-bit mode.\n- *\n- * A workaround for this \"PSCI bug\" is to execute the TZ syscall when entering\n- * U-Boot. That way PSCI is made aware of the 64-bit switch and starts all other\n- * CPU cores in 64-bit mode as well.\n- */\n-#include <linux/arm-smccc.h>\n-\n-#define ARM_SMCCC_SIP32_FAST_CALL \\\n-\tARM_SMCCC_CALL_VAL(ARM_SMCCC_FAST_CALL, ARM_SMCCC_SMC_32, ARM_SMCCC_OWNER_SIP, 0)\n-\n-\t/*\n-\t * U-Boot might be started in EL2 or EL3 with custom firmware.\n-\t * In that case, we assume that the workaround is not necessary or is\n-\t * handled already by the alternative firmware. Using the syscall in EL2\n-\t * would demote U-Boot to EL1; in EL3 it would probably just crash.\n-\t */\n-\tmrs\tx0, CurrentEL\n-\tcmp\tx0, #(1 << 2)\t/* EL1 */\n-\tbne\treset\n-\n-\t/* Prepare TZ syscall parameters */\n-\tmov\tx0, #ARM_SMCCC_SIP32_FAST_CALL\n-\tmovk\tx0, #0x10f\t/* SCM_SVC_MILESTONE_CMD_ID */\n-\tmov\tx1, #0x12\t/* MAKE_SCM_ARGS(0x2, SMC_PARAM_TYPE_BUFFER_READ) */\n-\tadr\tx2, el1_system_param\n-\tmov\tx3, el1_system_param_end - el1_system_param\n-\n-\t/* Switch PSCI to 64-bit mode. Resets CPU and returns at el1_elr */\n-\tsmc\t#0\n-\n-\t/* Something went wrong, perhaps PSCI is already in 64-bit mode? */\n+#if defined(CONFIG_SPL_BUILD)\n \tb\treset\n-\n-\t.align\t3\n-el1_system_param:\n-\t.quad\t0, 0, 0, 0, 0, 0, 0, 0, 0\t/* el1_x0-x8 */\n-\t.quad\treset\t\t\t\t/* el1_elr */\n-el1_system_param_end:\n+#else\n+#if defined(CONFIG_BOOT0_MSM8916_PSCI_WORKAROUND)\n+#include \"msm8916_boot0.h\"\n+#else\n+\tb\treset\n+#endif\n+#endif\ndiff --git a/arch/arm/mach-snapdragon/include/mach/msm8916_boot0.h b/arch/arm/mach-snapdragon/include/mach/msm8916_boot0.h\nnew file mode 100644\nindex 00000000000..953cccad790\n--- /dev/null\n+++ b/arch/arm/mach-snapdragon/include/mach/msm8916_boot0.h\n@@ -0,0 +1,54 @@\n+/* SPDX-License-Identifier: GPL-2.0+ */\n+/*\n+ * Workaround for \"PSCI bug\" on DragonBoard 410c\n+ * Copyright (C) 2021 Stephan Gerhold <stephan@gerhold.net>\n+ *\n+ * Syscall parameters taken from Qualcomm's LK fork (scm.h):\n+ * Copyright (c) 2011-2015, The Linux Foundation. All rights reserved.\n+ *\n+ * The PSCI implementation in the TrustZone/tz firmware on DragonBoard 410c has\n+ * a bug that starts all other CPU cores in 32-bit mode unless the TZ syscall\n+ * that switches from 32-bit to 64-bit mode is executed at least once.\n+ *\n+ * Normally this happens inside Qualcomm's LK bootloader which runs in 32-bit\n+ * mode and uses the TZ syscall to boot a kernel in 64-bit mode. However, if\n+ * U-Boot is installed to the \"aboot\" partition (replacing LK) the switch to\n+ * 64-bit mode never happens since U-Boot is already running in 64-bit mode.\n+ *\n+ * A workaround for this \"PSCI bug\" is to execute the TZ syscall when entering\n+ * U-Boot. That way PSCI is made aware of the 64-bit switch and starts all other\n+ * CPU cores in 64-bit mode as well.\n+ */\n+#include <linux/arm-smccc.h>\n+\n+#define ARM_SMCCC_SIP32_FAST_CALL \\\n+\tARM_SMCCC_CALL_VAL(ARM_SMCCC_FAST_CALL, ARM_SMCCC_SMC_32, ARM_SMCCC_OWNER_SIP, 0)\n+\n+\t/*\n+\t * U-Boot might be started in EL2 or EL3 with custom firmware.\n+\t * In that case, we assume that the workaround is not necessary or is\n+\t * handled already by the alternative firmware. Using the syscall in EL2\n+\t * would demote U-Boot to EL1; in EL3 it would probably just crash.\n+\t */\n+\tmrs\tx0, CurrentEL\n+\tcmp\tx0, #(1 << 2)\t/* EL1 */\n+\tbne\treset\n+\n+\t/* Prepare TZ syscall parameters */\n+\tmov\tx0, #ARM_SMCCC_SIP32_FAST_CALL\n+\tmovk\tx0, #0x10f\t/* SCM_SVC_MILESTONE_CMD_ID */\n+\tmov\tx1, #0x12\t/* MAKE_SCM_ARGS(0x2, SMC_PARAM_TYPE_BUFFER_READ) */\n+\tadr\tx2, el1_system_param\n+\tmov\tx3, el1_system_param_end - el1_system_param\n+\n+\t/* Switch PSCI to 64-bit mode. Resets CPU and returns at el1_elr */\n+\tsmc\t#0\n+\n+\t/* Something went wrong, perhaps PSCI is already in 64-bit mode? */\n+\tb\treset\n+\n+\t.align\t3\n+el1_system_param:\n+\t.quad\t0, 0, 0, 0, 0, 0, 0, 0, 0\t/* el1_x0-x8 */\n+\t.quad\treset\t\t\t\t/* el1_elr */\n+el1_system_param_end:\ndiff --git a/configs/dragonboard410c_defconfig b/configs/dragonboard410c_defconfig\nindex 51ad265688c..645f0816701 100644\n--- a/configs/dragonboard410c_defconfig\n+++ b/configs/dragonboard410c_defconfig\n@@ -11,6 +11,7 @@ CONFIG_ENV_OFFSET=0x0\n CONFIG_DEFAULT_DEVICE_TREE=\"qcom/apq8016-sbc\"\n CONFIG_OF_LIBFDT_OVERLAY=y\n CONFIG_SYS_LOAD_ADDR=0x80080000\n+CONFIG_BOOT0_MSM8916_PSCI_WORKAROUND=y\n CONFIG_IDENT_STRING=\"\\nQualcomm-DragonBoard 410C\"\n CONFIG_REMAKE_ELF=y\n CONFIG_BUTTON_CMD=y\ndiff --git a/configs/hmibsc_defconfig b/configs/hmibsc_defconfig\nindex 1e3d744193d..358b13aac77 100644\n--- a/configs/hmibsc_defconfig\n+++ b/configs/hmibsc_defconfig\n@@ -12,6 +12,7 @@ CONFIG_ENV_OFFSET=0x0\n CONFIG_DEFAULT_DEVICE_TREE=\"apq8016-schneider-hmibsc\"\n CONFIG_OF_LIBFDT_OVERLAY=y\n CONFIG_SYS_LOAD_ADDR=0x80080000\n+CONFIG_BOOT0_MSM8916_PSCI_WORKAROUND=y\n CONFIG_IDENT_STRING=\"\\nSchneider Electric-HMIBSC\"\n CONFIG_REMAKE_ELF=y\n # CONFIG_ANDROID_BOOT_IMAGE is not set\n","prefixes":["v7","04/11"]}