{"id":2235168,"url":"http://patchwork.ozlabs.org/api/1.2/patches/2235168/?format=json","web_url":"http://patchwork.ozlabs.org/project/qemu-devel/patch/20260508183717.193630-2-tdave@nvidia.com/","project":{"id":14,"url":"http://patchwork.ozlabs.org/api/1.2/projects/14/?format=json","name":"QEMU Development","link_name":"qemu-devel","list_id":"qemu-devel.nongnu.org","list_email":"qemu-devel@nongnu.org","web_url":"","scm_url":"","webscm_url":"","list_archive_url":"","list_archive_url_format":"","commit_url_format":""},"msgid":"<20260508183717.193630-2-tdave@nvidia.com>","list_archive_url":null,"date":"2026-05-08T18:37:10","name":"[RFC,1/8] hw/pci: add fixed-bars property to allow fixed BAR addresses","commit_ref":null,"pull_url":null,"state":"new","archived":false,"hash":"1e2fc4e6e8b1ee9fbd916c0e1f6afef61beb3816","submitter":{"id":89928,"url":"http://patchwork.ozlabs.org/api/1.2/people/89928/?format=json","name":"Tushar Dave","email":"tdave@nvidia.com"},"delegate":null,"mbox":"http://patchwork.ozlabs.org/project/qemu-devel/patch/20260508183717.193630-2-tdave@nvidia.com/mbox/","series":[{"id":503429,"url":"http://patchwork.ozlabs.org/api/1.2/series/503429/?format=json","web_url":"http://patchwork.ozlabs.org/project/qemu-devel/list/?series=503429","date":"2026-05-08T18:37:09","name":"hw/arm/virt, hw/pci: PCI pre-enumeration and fixed BAR allocation","version":1,"mbox":"http://patchwork.ozlabs.org/series/503429/mbox/"}],"comments":"http://patchwork.ozlabs.org/api/patches/2235168/comments/","check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/2235168/checks/","tags":{},"related":[],"headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=Nvidia.com header.i=@Nvidia.com header.a=rsa-sha256\n header.s=selector2 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b=gszBdSVTpMaxoxdwTiSq6obN3yvUfnJgL0y5yfBQa2TLLjxpGyFZjnOzStycrK6u1WQY33atEqA1WCtGJKA19PJDXWRuZmfokJh+wMZq/KgDPMUGUNH8SJlgMoh5aXKNfEGzEwvtehNyuZHx88ohFHdAvscnL6MPYiSr2ijYanykyOuL4bk6gFoPj8f5kSePtKDeq12PayE64jmd6B7k37DxwOt3erxq/y2JUAWCIdRvgvQpa7892e/Z65F1A4KTD3w4eTjaVAV4jRy6WjtBXA+6MHDdm7uFFrjhD3JMOUZ6eCfE1WUlV46CayNd65gA/K0u2TDqIdUNZW1rn/zMsA==","From":"Tushar Dave ","To":"qemu-devel@nongnu.org","Cc":"alwilliamson@nvidia.com, jgg@nvidia.com, skolothumtho@nvidia.com,\n qemu-arm@nongnu.org, peter.maydell@linaro.org, mst@redhat.com,\n marcel.apfelbaum@gmail.com, devel@edk2.groups.io","Subject":"[RFC PATCH 1/8] hw/pci: add fixed-bars property to allow fixed BAR\n addresses","Date":"Fri, 8 May 2026 13:37:10 -0500","Message-Id":"<20260508183717.193630-2-tdave@nvidia.com>","X-Mailer":"git-send-email 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367e1f7f-9c98-4194-e3b4-08dead30e349","X-MS-Exchange-CrossTenant-AuthSource":"BY5PR12MB4179.namprd12.prod.outlook.com","X-MS-Exchange-CrossTenant-AuthAs":"Internal","X-MS-Exchange-CrossTenant-OriginalArrivalTime":"08 May 2026 18:37:41.7928 (UTC)","X-MS-Exchange-CrossTenant-FromEntityHeader":"Hosted","X-MS-Exchange-CrossTenant-Id":"43083d15-7273-40c1-b7db-39efd9ccc17a","X-MS-Exchange-CrossTenant-MailboxType":"HOSTED","X-MS-Exchange-CrossTenant-UserPrincipalName":"\n mdjBOkoyMNRU2udJg+30J4MYTBrDMQ+ORe98hlReOP7hXjEt4lJRB58m0U3kyfHGzxGxy9qeMzI3oNsDjwVbgw==","X-MS-Exchange-Transport-CrossTenantHeadersStamped":"CH3PR12MB8482","Received-SPF":"permerror client-ip=2a01:111:f403:c111::5;\n envelope-from=tdave@nvidia.com;\n helo=DM1PR04CU001.outbound.protection.outlook.com","X-Spam_score_int":"-14","X-Spam_score":"-1.5","X-Spam_bar":"-","X-Spam_report":"(-1.5 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.44,\n DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1,\n FORGED_SPF_HELO=1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_PASS=-0.001,\n SPF_NONE=0.001 autolearn=no autolearn_force=no","X-Spam_action":"no action","X-BeenThere":"qemu-devel@nongnu.org","X-Mailman-Version":"2.1.29","Precedence":"list","List-Id":"qemu development ","List-Unsubscribe":",\n ","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n ","Errors-To":"qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org","Sender":"qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org"},"content":"Introduce a per-device fixed-bars property that allows users to provide\nfixed PCI BAR addresses for PCI endpoint devices.\n\nThe fixed-bars property cannot be supported on hot-plugged PCI devices.\nPCI BARs for the hot-plugged device are programmed by the guest at the\ntime the device appears.\n\nProperty format:\n- Comma-separated list of BAR entries, each as:\n barN@[,barM@]*\n\n- Example:\n -device vfio-pci,...,fixed-bars=bar2@0x6b8000000000\n\n- Multiple BARs:\n -device vfio-pci,host=...,id=dev0\n -set dev0.fixed-bars=bar0@0x400000000000,bar4@0x410000000000\n\nSigned-off-by: Tushar Dave \n---\n hw/pci/pci.c | 108 ++++++++++++++++++++++++++++++++++++\n include/hw/pci/pci_device.h | 10 ++++\n 2 files changed, 118 insertions(+)","diff":"diff --git a/hw/pci/pci.c b/hw/pci/pci.c\nindex 2c3657d00d..054fc2c0fa 100644\n--- a/hw/pci/pci.c\n+++ b/hw/pci/pci.c\n@@ -50,6 +50,7 @@\n #include \"hw/core/boards.h\"\n #include \"hw/nvram/fw_cfg.h\"\n #include \"qapi/error.h\"\n+#include \"qapi/util.h\"\n #include \"qemu/cutils.h\"\n #include \"pci-internal.h\"\n \n@@ -81,6 +82,7 @@ static const Property pci_props[] = {\n DEFINE_PROP_STRING(\"romfile\", PCIDevice, romfile),\n DEFINE_PROP_UINT32(\"romsize\", PCIDevice, romsize, UINT32_MAX),\n DEFINE_PROP_INT32(\"rombar\", PCIDevice, rom_bar, -1),\n+ DEFINE_PROP_STRING(\"fixed-bars\", PCIDevice, fixed_bars),\n DEFINE_PROP_BIT(\"multifunction\", PCIDevice, cap_present,\n QEMU_PCI_CAP_MULTIFUNCTION_BITNR, false),\n DEFINE_PROP_BIT(\"x-pcie-lnksta-dllla\", PCIDevice, cap_present,\n@@ -218,6 +220,103 @@ static void pci_bus_unrealize(BusState *qbus)\n vmstate_unregister(NULL, &vmstate_pcibus, bus);\n }\n \n+#define FIXED_BARS_ERR \"fixed-bars: expected barN@[,barM@]*; \"\n+\n+static int pci_parse_bar_token(const char *tok, Error **errp)\n+{\n+ int v = qapi_enum_parse(&OffAutoPCIBAR_lookup, tok, -1, errp);\n+\n+ if (v < 0) {\n+ return -1;\n+ }\n+ if (v < OFF_AUTO_PCIBAR_BAR0) {\n+ error_setg(errp, FIXED_BARS_ERR \"invalid BAR '%s', expected bar0..bar5\", tok);\n+ return -1;\n+ }\n+ return v - OFF_AUTO_PCIBAR_BAR0;\n+}\n+\n+/*\n+ * Parse fixed-bars=barN@[,barM@]*\n+ * BAR type, size, and alignment validation is deferred to the allocator,\n+ * which has the full device context needed to perform those checks.\n+ * On error, sets *@errp.\n+ */\n+static void pci_parse_fixed_bars(PCIDevice *pci_dev, Error **errp)\n+{\n+ Error *local_err = NULL;\n+ char **entries = NULL;\n+ char **parts = NULL;\n+ const char *endp;\n+ char **e;\n+ uint64_t bar_addr;\n+ int index;\n+ int i, ret;\n+\n+ if (!pci_dev->fixed_bars || !*pci_dev->fixed_bars) {\n+ return;\n+ }\n+ if (DEVICE(pci_dev)->hotplugged) {\n+ error_setg(&local_err,\n+ \"fixed-bars is not supported on hot-plugged PCI devices\");\n+ goto out;\n+ }\n+\n+ entries = g_strsplit(pci_dev->fixed_bars, \",\", -1);\n+ for (e = entries; e && *e; e++) {\n+ const char *entry = g_strstrip(*e);\n+ if (*entry == '\\0') {\n+ error_setg(&local_err, FIXED_BARS_ERR \"empty field in list\");\n+ goto out;\n+ }\n+\n+ parts = g_strsplit(entry, \"@\", 2);\n+ if (!parts[0] || !parts[1]) {\n+ error_setg(&local_err, FIXED_BARS_ERR \"not '%s'\", entry);\n+ goto out;\n+ }\n+\n+ index = pci_parse_bar_token(parts[0], &local_err);\n+ if (index < 0) {\n+ goto out;\n+ }\n+\n+ ret = qemu_strtou64(parts[1], &endp, 0, &bar_addr);\n+ if (ret) {\n+ error_setg(&local_err, FIXED_BARS_ERR \"unparseable address in '%s'\",\n+ entry);\n+ goto out;\n+ }\n+ if (*endp != '\\0') {\n+ error_setg(&local_err, FIXED_BARS_ERR \"trailing data after address in '%s'\",\n+ entry);\n+ goto out;\n+ }\n+ g_clear_pointer(&parts, g_strfreev);\n+\n+ if (!pci_dev->fixed_bar_addrs) {\n+ pci_dev->fixed_bar_addrs = g_new(pcibus_t, PCI_NUM_REGIONS - 1);\n+ for (i = 0; i < PCI_NUM_REGIONS - 1; i++) {\n+ pci_dev->fixed_bar_addrs[i] = PCI_BAR_UNMAPPED;\n+ }\n+ }\n+ if (pci_dev->fixed_bar_addrs[index] != PCI_BAR_UNMAPPED) {\n+ error_setg(&local_err, FIXED_BARS_ERR \"bar%d specified more than once\",\n+ index);\n+ goto out;\n+ }\n+ pci_dev->fixed_bar_addrs[index] = (pcibus_t)bar_addr;\n+ }\n+\n+out:\n+ g_clear_pointer(&parts, g_strfreev);\n+ g_strfreev(entries);\n+ if (local_err) {\n+ g_clear_pointer(&pci_dev->fixed_bar_addrs, g_free);\n+ error_propagate(errp, local_err);\n+ }\n+}\n+\n static int pcibus_num(PCIBus *bus)\n {\n if (pci_bus_is_root(bus)) {\n@@ -1473,6 +1572,8 @@ static void pci_qdev_unrealize(DeviceState *dev)\n pci_del_option_rom(pci_dev);\n pcie_sriov_unregister_device(pci_dev);\n \n+ g_clear_pointer(&pci_dev->fixed_bar_addrs, g_free);\n+\n if (pc->exit) {\n pc->exit(pci_dev);\n }\n@@ -2369,6 +2470,13 @@ static void pci_qdev_realize(DeviceState *qdev, Error **errp)\n is_default_rom = true;\n }\n \n+ pci_parse_fixed_bars(pci_dev, &local_err);\n+ if (local_err) {\n+ error_propagate(errp, local_err);\n+ pci_qdev_unrealize(DEVICE(pci_dev));\n+ return;\n+ }\n+\n pci_add_option_rom(pci_dev, is_default_rom, &local_err);\n if (local_err) {\n error_propagate(errp, local_err);\ndiff --git a/include/hw/pci/pci_device.h b/include/hw/pci/pci_device.h\nindex 5cac6e1688..3e46876985 100644\n--- a/include/hw/pci/pci_device.h\n+++ b/include/hw/pci/pci_device.h\n@@ -179,6 +179,16 @@ struct PCIDevice {\n char *failover_pair_id;\n uint32_t acpi_index;\n \n+ /*\n+ * When fixed-bars property is in use, fixed_bar_addrs is non-NULL\n+ * and has PCI_NUM_REGIONS - 1 elements (bar0..bar5); each slot is\n+ * either PCI_BAR_UNMAPPED (no fixed address for that BAR) or the\n+ * fixed address for that BAR. NULL if the property is unused/empty\n+ * or the map is not yet allocated.\n+ */\n+ char *fixed_bars;\n+ pcibus_t *fixed_bar_addrs;\n+\n /*\n * Indirect DMA region bounce buffer size as configured for the device. This\n * is a configuration parameter that is reflected into bus_master_as when\n","prefixes":["RFC","1/8"]}