{"id":2235156,"url":"http://patchwork.ozlabs.org/api/1.2/patches/2235156/?format=json","web_url":"http://patchwork.ozlabs.org/project/qemu-devel/patch/20260508-jmac-gpctest-v1-3-e57e42c87e1e@linaro.org/","project":{"id":14,"url":"http://patchwork.ozlabs.org/api/1.2/projects/14/?format=json","name":"QEMU Development","link_name":"qemu-devel","list_id":"qemu-devel.nongnu.org","list_email":"qemu-devel@nongnu.org","web_url":"","scm_url":"","webscm_url":"","list_archive_url":"","list_archive_url_format":"","commit_url_format":""},"msgid":"<20260508-jmac-gpctest-v1-3-e57e42c87e1e@linaro.org>","list_archive_url":null,"date":"2026-05-08T17:20:14","name":"[3/3] gpc-test.c: Basic test for granule protection check.","commit_ref":null,"pull_url":null,"state":"new","archived":false,"hash":"819ebbe9a2caeef9c15f34584e5f4047e6e5ac95","submitter":{"id":92076,"url":"http://patchwork.ozlabs.org/api/1.2/people/92076/?format=json","name":"Jim MacArthur","email":"jim.macarthur@linaro.org"},"delegate":null,"mbox":"http://patchwork.ozlabs.org/project/qemu-devel/patch/20260508-jmac-gpctest-v1-3-e57e42c87e1e@linaro.org/mbox/","series":[{"id":503424,"url":"http://patchwork.ozlabs.org/api/1.2/series/503424/?format=json","web_url":"http://patchwork.ozlabs.org/project/qemu-devel/list/?series=503424","date":"2026-05-08T17:20:13","name":"RFC: Testing exceptions in tests/tcg/aarch64","version":1,"mbox":"http://patchwork.ozlabs.org/series/503424/mbox/"}],"comments":"http://patchwork.ozlabs.org/api/patches/2235156/comments/","check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/2235156/checks/","tags":{},"related":[],"headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=linaro.org header.i=@linaro.org header.a=rsa-sha256\n header.s=google header.b=MJXHKi7E;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org\n (client-ip=209.51.188.17; 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charset=\"utf-8\"","Content-Transfer-Encoding":"7bit","Message-Id":"<20260508-jmac-gpctest-v1-3-e57e42c87e1e@linaro.org>","References":"<20260508-jmac-gpctest-v1-0-e57e42c87e1e@linaro.org>","In-Reply-To":"<20260508-jmac-gpctest-v1-0-e57e42c87e1e@linaro.org>","To":"qemu-devel@nongnu.org","Cc":"Peter Maydell , qemu-arm@nongnu.org,\n Jim MacArthur ","X-Mailer":"b4 0.13.0","Received-SPF":"pass client-ip=2a00:1450:4864:20::330;\n envelope-from=jim.macarthur@linaro.org; helo=mail-wm1-x330.google.com","X-Spam_score_int":"-20","X-Spam_score":"-2.1","X-Spam_bar":"--","X-Spam_report":"(-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1,\n DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1,\n RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001,\n SPF_PASS=-0.001 autolearn=ham autolearn_force=no","X-Spam_action":"no action","X-BeenThere":"qemu-devel@nongnu.org","X-Mailman-Version":"2.1.29","Precedence":"list","List-Id":"qemu development ","List-Unsubscribe":",\n ","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n ","Errors-To":"qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org","Sender":"qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org"},"content":"* Sets up granule protection tablers\n* Installs the alternative vector table\n* Enables GPC\n* Performs memory accesses in the protected region to\n check for allowed and disallowed reads.\n\nSigned-off-by: Jim MacArthur \n---\n tests/tcg/aarch64/Makefile.softmmu-target | 5 ++\n tests/tcg/aarch64/system/gpc-test.c | 125 ++++++++++++++++++++++++++++++\n 2 files changed, 130 insertions(+)","diff":"diff --git a/tests/tcg/aarch64/Makefile.softmmu-target b/tests/tcg/aarch64/Makefile.softmmu-target\nindex 60c65f4969..90630e95dc 100644\n--- a/tests/tcg/aarch64/Makefile.softmmu-target\n+++ b/tests/tcg/aarch64/Makefile.softmmu-target\n@@ -71,6 +71,11 @@ QEMU_EL2_MACHINE=-machine virt,virtualization=on,gic-version=2 -cpu cortex-a57 -\n QEMU_EL2_BASE_ARGS=-semihosting-config enable=on,target=native,chardev=output,arg=\"2\"\n run-vtimer: QEMU_OPTS=$(QEMU_EL2_MACHINE) $(QEMU_EL2_BASE_ARGS) -kernel\n \n+# gpc-test needs EL3 and RME\n+QEMU_EL3_MACHINE=-machine virt,virtualization=on,secure=on,gic-version=3 -cpu max,x-rme=on\n+QEMU_EL3_BASE_ARGS=-semihosting-config enable=on,target=native,chardev=output,arg=\"3\"\n+run-gpc-test: QEMU_OPTS=$(QEMU_EL3_MACHINE) $(QEMU_EL3_BASE_ARGS) -kernel\n+\n # Simple Record/Replay Test\n .PHONY: memory-record\n run-memory-record: memory-record memory\ndiff --git a/tests/tcg/aarch64/system/gpc-test.c b/tests/tcg/aarch64/system/gpc-test.c\nnew file mode 100644\nindex 0000000000..fae754a56c\n--- /dev/null\n+++ b/tests/tcg/aarch64/system/gpc-test.c\n@@ -0,0 +1,125 @@\n+/* SPDX-License-Identifier: GPL-2.0-or-later */\n+/*\n+ *\n+ *\n+ * Copyright (c) 2026 Linaro Ltd\n+ *\n+ */\n+\n+#include \n+#include \n+#include \n+\n+#define ID_AA64PFR0_EL1 \"S3_0_C0_C4_0\"\n+\n+#define GPCCR_EL3 \"S3_6_C2_C1_6\"\n+#define GPTBR_EL3 \"S3_6_C2_C1_4\"\n+\n+#define VBAR_EL3 \"S3_6_C12_C0_0\"\n+\n+#define get_sys_reg(register_name, dest) \\\n+ asm(\"mrs %[reg], \" register_name \"\\n\\t\" : [reg] \"=r\" (dest))\n+#define set_sys_reg(register_name, value) \\\n+ asm(\"msr \" register_name \", %[reg]\\n\\r\" : : [reg] \"r\" (value))\n+\n+extern void alt_vector_table(void); /* From altvec.S */\n+extern volatile uint64_t exception_log[]; /* From altvec.S */\n+extern uint64_t realms_gpt0[]; /* From boot.S */\n+extern uint64_t realms_gpt1[]; /* From boot.s */\n+\n+const uint32_t gpc_granule_size = 4096;\n+const uint32_t gpis_per_64_bits = 16;\n+\n+int main(uint64_t sp)\n+{\n+ uint64_t out;\n+ uint64_t pfr0;\n+ uint64_t gpt_base;\n+ uint64_t rme_status;\n+ uint64_t currentel_raw;\n+ uint64_t currentel;\n+ uint64_t gpt_table0_addr = (uint64_t) realms_gpt0;\n+ uint64_t gpt_table1_addr = (uint64_t) realms_gpt1;\n+\n+ /* Mask is FNG1, FNG0, and A2 */\n+ const uint64_t feature_mask = (1ULL << 18 | 1ULL << 17 | 1ULL << 16);\n+ const uint64_t in = feature_mask;\n+\n+ get_sys_reg(\"CurrentEL\", currentel_raw);\n+ currentel = (currentel_raw >> 2) & 0x3;\n+\n+ if (currentel < 3) {\n+ ml_printf(\"FAIL: Test must be run at EL3 (it is %d)\\n\", currentel);\n+ return 1;\n+ }\n+\n+ get_sys_reg(ID_AA64PFR0_EL1, pfr0);\n+\n+ /* rme_status is 1 for RME, 2 for RME + GPC2, 3 for RME+GPC3 */\n+ rme_status = (pfr0 >> 52) & 0xF;\n+ ml_printf(\"RME is %ld\\n\", rme_status);\n+ if (rme_status < 1) {\n+ ml_printf(\"SKIP: System does not support GPC (RME=%ld)\\n\", rme_status);\n+ return 0;\n+ }\n+\n+ /* Configure the level 0 table for the first 4GB of memory */\n+ realms_gpt0[0] = gpt_table1_addr | 0x3; /* Covers GB 0; table descriptor */\n+ realms_gpt0[1] = 0xf1; /* Covers GB 1; full access */\n+ realms_gpt0[2] = 0xf1; /* Covers GB 2; full access */\n+ realms_gpt0[3] = 0xf1; /* Covers GB 3; full access */\n+\n+ /* Install new vector table */\n+ set_sys_reg(VBAR_EL3, alt_vector_table);\n+\n+ /* Pick a random location to read inside the first 1GB. */\n+ uint64_t fault_location = 0x10202008;\n+ uint32_t gpi_index = fault_location / gpc_granule_size;\n+ realms_gpt1[gpi_index / gpis_per_64_bits] = 0;\n+\n+ gpt_base = gpt_table0_addr >> 12;\n+ set_sys_reg(GPTBR_EL3, gpt_base);\n+\n+ /*\n+ * Default values:\n+ * PPS=0: GPC table 0 protects 4GB.\n+ * RLPAD=0: Realm physical address spaces are normal\n+ * NSPAD=0: Non-secure physical address spaces are normal\n+ * SPAD=0: Secure physical address spaces are normal\n+ * IRGN=0: Inner non-cacheable\n+ * ORGN=0: Outer non-cacheable\n+ * PGS=0: Physical granule size is 4KB.\n+ * GPCP=0: All GPC faults reported\n+ * TBGPCP=0: Trace buffer rejects trace\n+ * L0GPTSZ=0: Each entry in table 0 protects 1GB.\n+ * APPSAA=0: Accesses above 4GB must be to Non-secure PAs\n+ * GPCBW=0: Bypass windows disabled.\n+ * NA6, NA7, NSP, SA, NSO are all reserved values for GPI.\n+ */\n+ uint64_t gpccr = 0;\n+\n+ /* Switch on granule protection check */\n+ gpccr |= 1 << 16; /* GPC enabled. */\n+ gpccr |= 0b10 << 12; /* SH = Outer shareable */\n+ set_sys_reg(GPCCR_EL3, gpccr);\n+\n+ /* Access some memory outside the GPC forbidden region */\n+ uint64_t x = *(unsigned int *) (fault_location + 4096 * 16);\n+ ml_printf(\"Fault address: %lx\\n\", exception_log[0]);\n+ if (exception_log[0] != 0) {\n+ ml_printf(\"FAIL: Memory access was blocked by GPC, \"\n+ \"and should not have been\\n\");\n+ return 1;\n+ }\n+\n+ /* Access the GPC forbidden region */\n+ x = *(unsigned int *) fault_location;\n+\n+ ml_printf(\"Fault address: %lx\\n\", exception_log[0]);\n+ if (exception_log[0] != fault_location) {\n+ ml_printf(\"FAIL: Memory access was not blocked by GPC, \"\n+ \"and should have been\\n\");\n+ return 1;\n+ }\n+ return 0;\n+}\n","prefixes":["3/3"]}