{"id":2235155,"url":"http://patchwork.ozlabs.org/api/1.2/patches/2235155/?format=json","web_url":"http://patchwork.ozlabs.org/project/qemu-devel/patch/20260508-jmac-gpctest-v1-2-e57e42c87e1e@linaro.org/","project":{"id":14,"url":"http://patchwork.ozlabs.org/api/1.2/projects/14/?format=json","name":"QEMU Development","link_name":"qemu-devel","list_id":"qemu-devel.nongnu.org","list_email":"qemu-devel@nongnu.org","web_url":"","scm_url":"","webscm_url":"","list_archive_url":"","list_archive_url_format":"","commit_url_format":""},"msgid":"<20260508-jmac-gpctest-v1-2-e57e42c87e1e@linaro.org>","list_archive_url":null,"date":"2026-05-08T17:20:13","name":"[2/3] altvec.S: Alternative vector table for aarch64 testing","commit_ref":null,"pull_url":null,"state":"new","archived":false,"hash":"853b99171e5d3346a2f1102a9c73284ed8bd50e4","submitter":{"id":92076,"url":"http://patchwork.ozlabs.org/api/1.2/people/92076/?format=json","name":"Jim MacArthur","email":"jim.macarthur@linaro.org"},"delegate":null,"mbox":"http://patchwork.ozlabs.org/project/qemu-devel/patch/20260508-jmac-gpctest-v1-2-e57e42c87e1e@linaro.org/mbox/","series":[{"id":503424,"url":"http://patchwork.ozlabs.org/api/1.2/series/503424/?format=json","web_url":"http://patchwork.ozlabs.org/project/qemu-devel/list/?series=503424","date":"2026-05-08T17:20:13","name":"RFC: Testing exceptions in tests/tcg/aarch64","version":1,"mbox":"http://patchwork.ozlabs.org/series/503424/mbox/"}],"comments":"http://patchwork.ozlabs.org/api/patches/2235155/comments/","check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/2235155/checks/","tags":{},"related":[],"headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=linaro.org header.i=@linaro.org header.a=rsa-sha256\n header.s=google header.b=aM+5BZVB;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org\n (client-ip=209.51.188.17; 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charset=\"utf-8\"","Content-Transfer-Encoding":"7bit","Message-Id":"<20260508-jmac-gpctest-v1-2-e57e42c87e1e@linaro.org>","References":"<20260508-jmac-gpctest-v1-0-e57e42c87e1e@linaro.org>","In-Reply-To":"<20260508-jmac-gpctest-v1-0-e57e42c87e1e@linaro.org>","To":"qemu-devel@nongnu.org","Cc":"Peter Maydell , qemu-arm@nongnu.org,\n Jim MacArthur ","X-Mailer":"b4 0.13.0","Received-SPF":"pass client-ip=2a00:1450:4864:20::330;\n envelope-from=jim.macarthur@linaro.org; helo=mail-wm1-x330.google.com","X-Spam_score_int":"-20","X-Spam_score":"-2.1","X-Spam_bar":"--","X-Spam_report":"(-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1,\n DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1,\n RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001,\n SPF_PASS=-0.001 autolearn=ham autolearn_force=no","X-Spam_action":"no action","X-BeenThere":"qemu-devel@nongnu.org","X-Mailman-Version":"2.1.29","Precedence":"list","List-Id":"qemu development ","List-Unsubscribe":",\n ","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n ","Errors-To":"qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org","Sender":"qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org"},"content":"Sets up a potential replacement vector table which will record\nand ignore certain types of exception. Indicative values are\nrecorded in 'exception_log'. Most exception types are handled\nin the same way as the table in boot.S.\n\nSigned-off-by: Jim MacArthur \n---\n tests/tcg/aarch64/Makefile.softmmu-target | 2 +-\n tests/tcg/aarch64/system/altvec.S | 129 ++++++++++++++++++++++++++++++\n 2 files changed, 130 insertions(+), 1 deletion(-)","diff":"diff --git a/tests/tcg/aarch64/Makefile.softmmu-target b/tests/tcg/aarch64/Makefile.softmmu-target\nindex f7a7d2b800..60c65f4969 100644\n--- a/tests/tcg/aarch64/Makefile.softmmu-target\n+++ b/tests/tcg/aarch64/Makefile.softmmu-target\n@@ -8,7 +8,7 @@ AARCH64_SYSTEM_SRC=$(AARCH64_SRC)/system\n VPATH+=$(AARCH64_SYSTEM_SRC)\n \n # These objects provide the basic boot code and helper functions for all tests\n-CRT_OBJS=boot.o\n+CRT_OBJS=boot.o altvec.o\n \n AARCH64_TEST_C_SRCS=$(wildcard $(AARCH64_SYSTEM_SRC)/*.c)\n AARCH64_TEST_S_SRCS=$(AARCH64_SYSTEM_SRC)/mte.S\ndiff --git a/tests/tcg/aarch64/system/altvec.S b/tests/tcg/aarch64/system/altvec.S\nnew file mode 100644\nindex 0000000000..079846b639\n--- /dev/null\n+++ b/tests/tcg/aarch64/system/altvec.S\n@@ -0,0 +1,129 @@\n+/* SPDX-License-Identifier: GPL-2.0-or-later */\n+/*\n+ * Alternative AArch64 vector table. Can replace the vector table\n+ * in boot.S and record & ignore some exceptions in exception_log.\n+ * Maintains the semihosting error print and exit for most\n+ * exceptions.\n+ *\n+ * Copyright Linaro Ltd 2026\n+ *\n+ */\n+\n+#define semihosting_call hlt 0xf000\n+#define SYS_WRITE0\t0x04\t/* string to debug channel */\n+#define SYS_EXIT\t0x18\n+\t.align\t12\n+\n+\t.macro\tventry\tlabel\n+\t.align\t7\n+\tb\t\\label\n+\t.endm\n+\n+\t.global alt_vector_table\n+alt_vector_table:\n+\t/* Current EL with SP0.\t */\n+\tventry\tcurr_sp0_sync\t\t/* Synchronous\t*/\n+\tventry\tcurr_sp0_irq\t\t/* Irq/vIRQ */\n+\tventry\tcurr_sp0_fiq\t\t/* Fiq/vFIQ */\n+\tventry\tcurr_sp0_serror\t\t/* SError/VSError */\n+\n+\t/* Current EL with SPx.\t */\n+\tventry\tcurr_spx_sync\t\t/* Synchronous\t*/\n+\tventry\tcurr_spx_irq\t\t/* IRQ/vIRQ */\n+\tventry\tcurr_spx_fiq\t\t/* FIQ/vFIQ */\n+\tventry\tcurr_spx_serror\t\t/* SError/VSError */\n+\n+\t/* Lower EL using AArch64. */\n+\tventry\tlower_a64_sync\t\t/* Synchronous\t*/\n+\tventry\tlower_a64_irq\t\t/* IRQ/vIRQ */\n+\tventry\tlower_a64_fiq\t\t/* FIQ/vFIQ */\n+\tventry\tlower_a64_serror\t/* SError/VSError */\n+\n+\t/* Lower EL using AArch32. */\n+\tventry\tlower_a32_sync\t\t/* Synchronous\t*/\n+\tventry\tlower_a32_irq\t\t/* IRQ/vIRQ */\n+\tventry\tlower_a32_fiq\t\t/* FIQ/vFIQ */\n+\tventry\tlower_a32_serror\t/* SError/VSError */\n+\n+\t.text\n+\t.align 4\n+\n+curr_spx_sync:\n+\tsub sp, sp, #16\n+\tstp x0, x1, [sp, #0]\n+\tmrs x0, ESR_EL3\n+\tlsr \tx0, x0, #26\n+\tand \tx0, x0, #0x3f\n+\tcmp \tx0, #37\n+\tbeq \tdata_fault\n+\tcmp \tx0, #30\n+\tbeq \tgpc_fault\n+\tb generic_exception\n+\n+data_fault:\n+\tmrs x0, FAR_EL3\n+\tadrp x1, exception_log\n+\tstr x0, [x1]\n+\tldr x0, =0x1001\n+\tstr x0, [x1, #8]\n+\tb skip_return\n+gpc_fault:\n+\tmrs x0, FAR_EL3\n+\tadrp x1, exception_log\n+\tstr x0, [x1]\n+\tldr x0, =0x1002\n+\tstr x0, [x1, #8]\n+\t/* Fall through */\n+skip_return:\n+\tmrs x0, ELR_EL3\n+\tadd x0, x0, #4 /* Skip faulting instruction */\n+\tmsr ELR_EL3, x0\n+\tldp x0, x1, [sp, #0]\n+\tadd sp, sp, #16\n+\teret\n+curr_sp0_sync:\n+curr_sp0_irq:\n+curr_sp0_fiq:\n+curr_sp0_serror:\n+curr_spx_irq:\n+curr_spx_fiq:\n+curr_spx_serror:\n+lower_a64_sync:\n+lower_a64_irq:\n+lower_a64_fiq:\n+lower_a64_serror:\n+lower_a32_sync:\n+lower_a32_irq:\n+lower_a32_fiq:\n+lower_a32_serror:\n+generic_exception:\n+\tadr\tx1, .unexp_excp\n+exit_msg:\n+\tmov\tx0, SYS_WRITE0\n+\tsemihosting_call\n+\tmov\tx0, 1 /* EXIT_FAILURE */\n+\tbl \t_exit\n+\t/* never returns */\n+print_debug_msg:\n+\tmov\tx0, SYS_WRITE0\n+\tsemihosting_call\n+\tret\n+_exit:\n+\tmov x1, x0\n+\tldr x0, =0x20026 /* ADP_Stopped_ApplicationExit */\n+\tstp x0, x1, [sp, #-16]!\n+\tmov x1, sp\n+\tmov x0, SYS_EXIT\n+\tsemihosting_call\n+\n+\n+\t.section .rodata\n+.unexp_excp:\n+\t.string \"Unexpected exception (via alternative handler).\\n\"\n+\n+\t.data\n+\t.align 8\n+\t.global exception_log\n+exception_log:\n+\t.space 128, 0\n+\n","prefixes":["2/3"]}