{"id":2234734,"url":"http://patchwork.ozlabs.org/api/1.2/patches/2234734/?format=json","web_url":"http://patchwork.ozlabs.org/project/intel-wired-lan/patch/20260508031226.3601800-9-aleksandr.loktionov@intel.com/","project":{"id":46,"url":"http://patchwork.ozlabs.org/api/1.2/projects/46/?format=json","name":"Intel Wired Ethernet development","link_name":"intel-wired-lan","list_id":"intel-wired-lan.osuosl.org","list_email":"intel-wired-lan@osuosl.org","web_url":"","scm_url":"","webscm_url":"","list_archive_url":"","list_archive_url_format":"","commit_url_format":""},"msgid":"<20260508031226.3601800-9-aleksandr.loktionov@intel.com>","list_archive_url":null,"date":"2026-05-08T03:12:26","name":"[iwl-next,8/8] ixgbe: add IXGBE_ITR_ADAPTIVE_MASK_USECS constant","commit_ref":null,"pull_url":null,"state":"new","archived":false,"hash":"eed1652f109e6cdd9ea190bf2e83b59aedd35167","submitter":{"id":75597,"url":"http://patchwork.ozlabs.org/api/1.2/people/75597/?format=json","name":"Loktionov, Aleksandr","email":"aleksandr.loktionov@intel.com"},"delegate":null,"mbox":"http://patchwork.ozlabs.org/project/intel-wired-lan/patch/20260508031226.3601800-9-aleksandr.loktionov@intel.com/mbox/","series":[{"id":503311,"url":"http://patchwork.ozlabs.org/api/1.2/series/503311/?format=json","web_url":"http://patchwork.ozlabs.org/project/intel-wired-lan/list/?series=503311","date":"2026-05-08T03:12:18","name":"ixgbe: small cleanups and improvements","version":1,"mbox":"http://patchwork.ozlabs.org/series/503311/mbox/"}],"comments":"http://patchwork.ozlabs.org/api/patches/2234734/comments/","check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/2234734/checks/","tags":{},"related":[],"headers":{"Return-Path":"","X-Original-To":["incoming@patchwork.ozlabs.org","intel-wired-lan@lists.osuosl.org"],"Delivered-To":["patchwork-incoming@legolas.ozlabs.org","intel-wired-lan@lists.osuosl.org"],"Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=osuosl.org header.i=@osuosl.org header.a=rsa-sha256\n header.s=default header.b=i5FTsm34;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=osuosl.org\n (client-ip=2605:bc80:3010::137; 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a=\"79027536\"","E=Sophos;i=\"6.23,222,1770624000\"; d=\"scan'208\";a=\"79027536\"","E=Sophos;i=\"6.23,222,1770624000\"; d=\"scan'208\";a=\"241623223\""],"X-ExtLoop1":"1","From":"Aleksandr Loktionov ","To":"intel-wired-lan@lists.osuosl.org, anthony.l.nguyen@intel.com,\n aleksandr.loktionov@intel.com","Cc":"netdev@vger.kernel.org","Date":"Fri, 8 May 2026 05:12:26 +0200","Message-ID":"<20260508031226.3601800-9-aleksandr.loktionov@intel.com>","X-Mailer":"git-send-email 2.52.0","In-Reply-To":"<20260508031226.3601800-1-aleksandr.loktionov@intel.com>","References":"<20260508031226.3601800-1-aleksandr.loktionov@intel.com>","MIME-Version":"1.0","Content-Transfer-Encoding":"8bit","X-Mailman-Original-DKIM-Signature":"v=1; a=rsa-sha256; c=relaxed/simple;\n d=intel.com; i=@intel.com; q=dns/txt; s=Intel;\n t=1778209970; x=1809745970;\n h=from:to:cc:subject:date:message-id:in-reply-to:\n references:mime-version:content-transfer-encoding;\n bh=h0VtJiL0CwKRWOzEUXZhkGSdQQXv3Rw/cI6v5v5qFec=;\n b=YT/8NelFWg/AamKGh9yu4fgqCXFxLneURcdN2SFOj+iV60oh2nrNsh4l\n K/t0hZ6QwasZoKlIjnq0+aYRW5xiBsWPhuU3Vs3d7r7PszzsQuaxCewt+\n cnPkfN0tGXk7p5NMLuHfkIqQcZ5hkCnzitudsY65Td+Vy/ABr14B1nj8g\n /GxB1RkpSZaym+73FFaEVGqNvVzMcfQ/oD0c9JBszb1LM6+YP74WYR6h+\n 2qqdaZwtdy7dbFRUa7i9rr7lHa/LNYwylglvYVIIQUmXg2TLNOeRALfSn\n Hr8wWt5CwF/algSdZgxW51uekTGJIptqpxWQXoptoUz46+6AX170GgFv4\n g==;","X-Mailman-Original-Authentication-Results":["smtp3.osuosl.org;\n dmarc=pass (p=none dis=none)\n header.from=intel.com","smtp3.osuosl.org;\n dkim=pass (2048-bit key,\n unprotected) header.d=intel.com header.i=@intel.com header.a=rsa-sha256\n header.s=Intel header.b=YT/8NelF"],"Subject":"[Intel-wired-lan] [PATCH iwl-next 8/8] ixgbe: add\n IXGBE_ITR_ADAPTIVE_MASK_USECS constant","X-BeenThere":"intel-wired-lan@osuosl.org","X-Mailman-Version":"2.1.30","Precedence":"list","List-Id":"Intel Wired Ethernet Linux Kernel Driver Development\n ","List-Unsubscribe":",\n ","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n ","Errors-To":"intel-wired-lan-bounces@osuosl.org","Sender":"\"Intel-wired-lan\" "},"content":"From: Alexander Duyck \n\nixgbe_set_itr() clears the mode flag (IXGBE_ITR_ADAPTIVE_LATENCY, bit 7)\nwith the open-coded complement expression ~IXGBE_ITR_ADAPTIVE_LATENCY.\nThis is equivalent to keeping only bits [6:0], i.e. the usecs sub-field.\n\nAdd IXGBE_ITR_ADAPTIVE_MASK_USECS = IXGBE_ITR_ADAPTIVE_LATENCY - 1 =\n0x7F to name this mask explicitly and replace the open-coded AND-NOT\noperation with the cleaner AND form. The two expressions are\narithmetically identical; the change improves readability.\n\nSigned-off-by: Alexander Duyck \nSigned-off-by: Aleksandr Loktionov \n---\n drivers/net/ethernet/intel/ixgbe/ixgbe.h | 1 +\n drivers/net/ethernet/intel/ixgbe/ixgbe_main.c | 2 +-\n 2 files changed, 2 insertions(+), 1 deletion(-)","diff":"diff --git a/drivers/net/ethernet/intel/ixgbe/ixgbe.h b/drivers/net/ethernet/intel/ixgbe/ixgbe.h\nindex cf2df18..20e2a97 100644\n--- a/drivers/net/ethernet/intel/ixgbe/ixgbe.h\n+++ b/drivers/net/ethernet/intel/ixgbe/ixgbe.h\n@@ -478,6 +478,7 @@ static inline unsigned int ixgbe_rx_pg_order(struct ixgbe_ring *ring)\n #define IXGBE_ITR_ADAPTIVE_MAX_USECS\t126\n #define IXGBE_ITR_ADAPTIVE_LATENCY\t0x80\n #define IXGBE_ITR_ADAPTIVE_BULK\t\t0x00\n+#define IXGBE_ITR_ADAPTIVE_MASK_USECS\t(IXGBE_ITR_ADAPTIVE_LATENCY - 1)\n \n struct ixgbe_ring_container {\n \tstruct ixgbe_ring *ring;\t/* pointer to linked list of rings */\ndiff --git a/drivers/net/ethernet/intel/ixgbe/ixgbe_main.c b/drivers/net/ethernet/intel/ixgbe/ixgbe_main.c\nindex ba7b013..be40655 100644\n--- a/drivers/net/ethernet/intel/ixgbe/ixgbe_main.c\n+++ b/drivers/net/ethernet/intel/ixgbe/ixgbe_main.c\n@@ -2959,7 +2959,7 @@ static void ixgbe_set_itr(struct ixgbe_q_vector *q_vector)\n \tnew_itr = min(q_vector->rx.itr, q_vector->tx.itr);\n \n \t/* Clear latency flag if set, shift into correct position */\n-\tnew_itr &= ~IXGBE_ITR_ADAPTIVE_LATENCY;\n+\tnew_itr &= IXGBE_ITR_ADAPTIVE_MASK_USECS;\n \tnew_itr <<= 2;\n \n \tif (new_itr != q_vector->itr) {\n","prefixes":["iwl-next","8/8"]}