{"id":2234656,"url":"http://patchwork.ozlabs.org/api/1.2/patches/2234656/?format=json","web_url":"http://patchwork.ozlabs.org/project/qemu-devel/patch/20260507234413.643512-29-richard.henderson@linaro.org/","project":{"id":14,"url":"http://patchwork.ozlabs.org/api/1.2/projects/14/?format=json","name":"QEMU Development","link_name":"qemu-devel","list_id":"qemu-devel.nongnu.org","list_email":"qemu-devel@nongnu.org","web_url":"","scm_url":"","webscm_url":"","list_archive_url":"","list_archive_url_format":"","commit_url_format":""},"msgid":"<20260507234413.643512-29-richard.henderson@linaro.org>","list_archive_url":null,"date":"2026-05-07T23:43:41","name":"[v4,28/60] target/arm: Implement F1CVT, F1CVTL, F2CVT, F2CVTL for SME","commit_ref":null,"pull_url":null,"state":"new","archived":false,"hash":"3615560a4c80143ba700270820abe70822c62e1a","submitter":{"id":72104,"url":"http://patchwork.ozlabs.org/api/1.2/people/72104/?format=json","name":"Richard Henderson","email":"richard.henderson@linaro.org"},"delegate":null,"mbox":"http://patchwork.ozlabs.org/project/qemu-devel/patch/20260507234413.643512-29-richard.henderson@linaro.org/mbox/","series":[{"id":503296,"url":"http://patchwork.ozlabs.org/api/1.2/series/503296/?format=json","web_url":"http://patchwork.ozlabs.org/project/qemu-devel/list/?series=503296","date":"2026-05-07T23:43:14","name":"target/arm: Implement FEAT_FP8","version":4,"mbox":"http://patchwork.ozlabs.org/series/503296/mbox/"}],"comments":"http://patchwork.ozlabs.org/api/patches/2234656/comments/","check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/2234656/checks/","tags":{},"related":[],"headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=linaro.org header.i=@linaro.org header.a=rsa-sha256\n header.s=google header.b=B9ZnDqqO;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org\n (client-ip=209.51.188.17; helo=lists1p.gnu.org;\n envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org;\n receiver=patchwork.ozlabs.org)"],"Received":["from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17])\n\t(using TLSv1.2 with cipher ECDHE-ECDSA-AES256-GCM-SHA384 (256/256 bits))\n\t(No client certificate requested)\n\tby legolas.ozlabs.org (Postfix) with ESMTPS id 4gBTSn01ZFz1yCg\n\tfor ; Fri, 08 May 2026 09:47:36 +1000 (AEST)","from localhost ([::1] helo=lists1p.gnu.org)\n\tby lists1p.gnu.org with esmtp (Exim 4.90_1)\n\t(envelope-from )\n\tid 1wL8Od-0000X4-1P; Thu, 07 May 2026 19:44:47 -0400","from eggs.gnu.org ([2001:470:142:3::10])\n by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256)\n (Exim 4.90_1) (envelope-from )\n id 1wL8Oa-0000Uy-FE\n for qemu-devel@nongnu.org; Thu, 07 May 2026 19:44:45 -0400","from mail-oi1-x229.google.com ([2607:f8b0:4864:20::229])\n by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128)\n (Exim 4.90_1) (envelope-from )\n id 1wL8OY-0001A8-LR\n for qemu-devel@nongnu.org; Thu, 07 May 2026 19:44:44 -0400","by mail-oi1-x229.google.com with SMTP id\n 5614622812f47-479d68a9063so517282b6e.0\n for ; Thu, 07 May 2026 16:44:42 -0700 (PDT)","from stoup.attlocal.net ([2600:381:c938:6375:9641:bbb2:a93a:bb4c])\n by smtp.gmail.com with ESMTPSA id\n 46e09a7af769-7e367d8feb1sm84320a34.23.2026.05.07.16.44.40\n (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256);\n Thu, 07 May 2026 16:44:41 -0700 (PDT)"],"DKIM-Signature":"v=1; a=rsa-sha256; c=relaxed/relaxed;\n d=linaro.org; s=google; t=1778197481; x=1778802281; darn=nongnu.org;\n h=content-transfer-encoding:mime-version:references:in-reply-to\n :message-id:date:subject:cc:to:from:from:to:cc:subject:date\n :message-id:reply-to;\n bh=M57Im4p8Ek/6ItuYj7c2sfqrPfiuBzTkBGB/xxKHk94=;\n b=B9ZnDqqODEbbx8YqbHjFDvOPaPCVOzKHo+jom3LMXKIiY0D0hJNiNgDdC6uSfLE0z0\n z3w5f/Umh+CQNUT8TNGiT0sqYjS81SqOkork+MSRL9M68B7pJvQpz61nruzMak1gE5/C\n GuXHPTyjmqJYCAroAIpMj6tkJbbcmrIa9fainBNPMUZydJBe5/Jc63Y8taOnf4kbvTi/\n JHEQlco00SbK2hP0K6xbBHZieYGwtewQheQ77x4rFYVVAx+mUDZU2bmxIAnfUBjzkB70\n vBfKSXQCI8S5gbz6AmBM/fHyi9KRtghHTZHKG10ZRbbk2ObNcnKuXuiurOV5+9GJvGbP\n UX8w==","X-Google-DKIM-Signature":"v=1; a=rsa-sha256; c=relaxed/relaxed;\n d=1e100.net; s=20251104; t=1778197481; x=1778802281;\n h=content-transfer-encoding:mime-version:references:in-reply-to\n :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from\n :to:cc:subject:date:message-id:reply-to;\n bh=M57Im4p8Ek/6ItuYj7c2sfqrPfiuBzTkBGB/xxKHk94=;\n b=d3jblxGqJ0OEXT9wXHxJnVr3J/4RweQG4CFkhGUStp2XYWYp+0eE3rK/EkFvyWR7Ji\n xj+3HEyBga/s9alRTx5DGKZE3m9WP4Jx20YlyZZvOrTrsZq5llFlza4Z0SxifsmFZZ+P\n feRqY6x6apPTUM9cEVGKphZN9IoBJi7GTbgYu/oEicp4E2UoIH19HZsDe2CupbTcGIY8\n TePl8Etet/7KRJy7c/Q0yrHfuoC7ITt6tWU4HjSlJC5ctlaLy/T40IxwkTV06UJY1LSm\n fu5mK2LfQhYUlNDAGhpe6voPsAqd65biWUV/13MGAcjhlj2fDKWuD2UoYDlzRiT9pfVy\n wORA==","X-Gm-Message-State":"AOJu0YwSJKxDIUjYajmNXVOItWzR9C3aRHiRcWXpyhrsouBB5Ue3Tf7e\n aahggBBKxd5OQnK0y9/cnprITFmuYi1wOYazn3ghyZqshDUXx1ZfxfTewpcPWBbUKzkMBgV7wL+\n bLpUI","X-Gm-Gg":"AeBDietaTb4Pe4ozrovKnmn6Q68dN1kM5z7SweyM93I3Dq9fBL3wiaO3gxvLalqCqvn\n 0Pwio1KIlb1AwieIxZ3zn81+rbmsytxgKPH4HvjHRXXtiAcpBHEtaAmKxdb+Vf+fwyAbXyGv2/k\n d/fwq0rShmvkXoAkzEQB5UlFI22nv1TluAAUXx0faJHCR880lu58jrEzddzQiW4DWQ33KT0vreT\n kVfaJ+qTH5QizS2LEs4HCPnambHQ+RyvJH6gI/E8ROLBQYqbalPWiYsLjsSdRYl4NfqLgCUDux4\n 1DlhYhiwP/hwHynA6M3EZwkOhXtpn+8aqm9aZKlAPFIp+ZA6jcM/pPiB5CF05N/RBlp+l2rLx8X\n LVcjtCc4KHxbrJ1RMFyW0yRfGgF6NHvNNCpDJHNlQM/s0oPR/IoTFVHf/Iq++c9LQhPds1mAAZK\n Yso6OZn1V3s2z+A4iG72dbCgedi8L2ERhGhIhCVEvThsYO0jQjSjacHUG9","X-Received":"by 2002:a05:6808:1529:b0:47b:c2a2:1c6c with SMTP id\n 5614622812f47-4804222a9a6mr6526910b6e.16.1778197481413;\n Thu, 07 May 2026 16:44:41 -0700 (PDT)","From":"Richard Henderson ","To":"qemu-devel@nongnu.org","Cc":"qemu-arm@nongnu.org","Subject":"[PATCH v4 28/60] target/arm: Implement F1CVT, F1CVTL, F2CVT,\n F2CVTL for SME","Date":"Thu, 7 May 2026 18:43:41 -0500","Message-ID":"<20260507234413.643512-29-richard.henderson@linaro.org>","X-Mailer":"git-send-email 2.43.0","In-Reply-To":"<20260507234413.643512-1-richard.henderson@linaro.org>","References":"<20260507234413.643512-1-richard.henderson@linaro.org>","MIME-Version":"1.0","Content-Transfer-Encoding":"8bit","Received-SPF":"pass client-ip=2607:f8b0:4864:20::229;\n envelope-from=richard.henderson@linaro.org; helo=mail-oi1-x229.google.com","X-Spam_score_int":"-20","X-Spam_score":"-2.1","X-Spam_bar":"--","X-Spam_report":"(-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1,\n DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1,\n RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001,\n SPF_PASS=-0.001 autolearn=ham autolearn_force=no","X-Spam_action":"no action","X-BeenThere":"qemu-devel@nongnu.org","X-Mailman-Version":"2.1.29","Precedence":"list","List-Id":"qemu development ","List-Unsubscribe":",\n ","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n ","Errors-To":"qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org","Sender":"qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org"},"content":"Signed-off-by: Richard Henderson \n---\n target/arm/tcg/helper-fp8-defs.h | 2 ++\n target/arm/tcg/fp8_helper.c | 47 ++++++++++++++++++++++++++++++++\n target/arm/tcg/translate-sme.c | 5 ++++\n target/arm/tcg/sme.decode | 5 ++++\n 4 files changed, 59 insertions(+)","diff":"diff --git a/target/arm/tcg/helper-fp8-defs.h b/target/arm/tcg/helper-fp8-defs.h\nindex 3021dafd44..b5dc2b7064 100644\n--- a/target/arm/tcg/helper-fp8-defs.h\n+++ b/target/arm/tcg/helper-fp8-defs.h\n@@ -10,3 +10,5 @@ DEF_HELPER_FLAGS_4(sme2_bfcvtl_hb, TCG_CALL_NO_RWG, void, ptr, ptr, env, i32)\n \n DEF_HELPER_FLAGS_4(advsimd_fcvtl_hb, TCG_CALL_NO_RWG, void, ptr, ptr, env, i32)\n DEF_HELPER_FLAGS_4(sve2_fcvt_hb, TCG_CALL_NO_RWG, void, ptr, ptr, env, i32)\n+DEF_HELPER_FLAGS_4(sme2_fcvt_hb, TCG_CALL_NO_RWG, void, ptr, ptr, env, i32)\n+DEF_HELPER_FLAGS_4(sme2_fcvtl_hb, TCG_CALL_NO_RWG, void, ptr, ptr, env, i32)\ndiff --git a/target/arm/tcg/fp8_helper.c b/target/arm/tcg/fp8_helper.c\nindex 0e906f2d83..fce02f68fa 100644\n--- a/target/arm/tcg/fp8_helper.c\n+++ b/target/arm/tcg/fp8_helper.c\n@@ -213,6 +213,33 @@ void HELPER(sme2_bfcvt_hb)(void *vd, void *vn, CPUARMState *env, uint32_t desc)\n fp8_finish(env, &ctx);\n }\n \n+void HELPER(sme2_fcvt_hb)(void *vd, void *vn, CPUARMState *env, uint32_t desc)\n+{\n+ FP8Context ctx = fp8_src_start(env, desc, 0xf);\n+ fp8_input_fn *input_fmt = fp8_input_fmt[ctx.f8fmt];\n+ uint8_t *n = vn;\n+ uint16_t *d0 = vd;\n+ uint16_t *d1 = vd + sizeof(ARMVectorReg);\n+ size_t oprsz = simd_oprsz(desc);\n+ size_t nelem = oprsz / 2;\n+ ARMVectorReg scratch;\n+\n+ if (vectors_overlap(vd, 2, vn, 1)) {\n+ n = memcpy(&scratch, vn, oprsz);\n+ }\n+\n+ for (size_t i = 0; i < nelem; ++i) {\n+ d0[H2(i)] = fcvt_fp8_to_f16(n[H1(i)], input_fmt,\n+ ctx.scale, &ctx.stat);\n+ }\n+ for (size_t i = 0; i < nelem; ++i) {\n+ d1[H2(i)] = fcvt_fp8_to_f16(n[H1(i + nelem)], input_fmt,\n+ ctx.scale, &ctx.stat);\n+ }\n+\n+ fp8_finish(env, &ctx);\n+}\n+\n void HELPER(sme2_bfcvtl_hb)(void *vd, void *vn, CPUARMState *env, uint32_t desc)\n {\n FP8Context ctx = fp8_src_start(env, desc, 0x3f);\n@@ -232,3 +259,23 @@ void HELPER(sme2_bfcvtl_hb)(void *vd, void *vn, CPUARMState *env, uint32_t desc)\n \n fp8_finish(env, &ctx);\n }\n+\n+void HELPER(sme2_fcvtl_hb)(void *vd, void *vn, CPUARMState *env, uint32_t desc)\n+{\n+ FP8Context ctx = fp8_src_start(env, desc, 0xf);\n+ fp8_input_fn *input_fmt = fp8_input_fmt[ctx.f8fmt];\n+ uint8_t *n = vn;\n+ uint16_t *d0 = vd;\n+ uint16_t *d1 = vd + sizeof(ARMVectorReg);\n+ size_t oprsz = simd_oprsz(desc);\n+ size_t nelem = oprsz / 2;\n+\n+ for (size_t i = 0; i < nelem; ++i) {\n+ uint8_t e0 = n[H1(2 * i + 0)];\n+ uint8_t e1 = n[H1(2 * i + 1)];\n+ d0[H2(i)] = fcvt_fp8_to_f16(e0, input_fmt, ctx.scale, &ctx.stat);\n+ d1[H2(i)] = fcvt_fp8_to_f16(e1, input_fmt, ctx.scale, &ctx.stat);\n+ }\n+\n+ fp8_finish(env, &ctx);\n+}\ndiff --git a/target/arm/tcg/translate-sme.c b/target/arm/tcg/translate-sme.c\nindex 2841b2b8cb..0cbad3e006 100644\n--- a/target/arm/tcg/translate-sme.c\n+++ b/target/arm/tcg/translate-sme.c\n@@ -1546,6 +1546,11 @@ static bool do_f8cvt(DisasContext *s, arg_zz_n *a,\n return true;\n }\n \n+TRANS_FEAT(F1CVT, aa64_sme2_f8cvt, do_f8cvt, a, gen_helper_sme2_fcvt_hb, 0)\n+TRANS_FEAT(F2CVT, aa64_sme2_f8cvt, do_f8cvt, a, gen_helper_sme2_fcvt_hb, 1)\n+TRANS_FEAT(F1CVTL, aa64_sme2_f8cvt, do_f8cvt, a, gen_helper_sme2_fcvtl_hb, 0)\n+TRANS_FEAT(F2CVTL, aa64_sme2_f8cvt, do_f8cvt, a, gen_helper_sme2_fcvtl_hb, 1)\n+\n TRANS_FEAT(BF1CVT, aa64_sme2_f8cvt, do_f8cvt, a, gen_helper_sme2_bfcvt_hb, 0)\n TRANS_FEAT(BF2CVT, aa64_sme2_f8cvt, do_f8cvt, a, gen_helper_sme2_bfcvt_hb, 1)\n TRANS_FEAT(BF1CVTL, aa64_sme2_f8cvt, do_f8cvt, a, gen_helper_sme2_bfcvtl_hb, 0)\ndiff --git a/target/arm/tcg/sme.decode b/target/arm/tcg/sme.decode\nindex df9586c1a5..d6192eb59d 100644\n--- a/target/arm/tcg/sme.decode\n+++ b/target/arm/tcg/sme.decode\n@@ -853,6 +853,11 @@ UUNPK_4bh 11000001 011 10101 111000 ....0 ...01 @zz_4x2_n1\n UUNPK_4hs 11000001 101 10101 111000 ....0 ...01 @zz_4x2_n1\n UUNPK_4sd 11000001 111 10101 111000 ....0 ...01 @zz_4x2_n1\n \n+F1CVT 11000001 001 00110 111000 ..... ....0 @zz_2x1\n+F2CVT 11000001 101 00110 111000 ..... ....0 @zz_2x1\n+F1CVTL 11000001 001 00110 111000 ..... ....1 @zz_2x1\n+F2CVTL 11000001 101 00110 111000 ..... ....1 @zz_2x1\n+\n BF1CVT 11000001 011 00110 111000 ..... ....0 @zz_2x1\n BF2CVT 11000001 111 00110 111000 ..... ....0 @zz_2x1\n BF1CVTL 11000001 011 00110 111000 ..... ....1 @zz_2x1\n","prefixes":["v4","28/60"]}