{"id":2234621,"url":"http://patchwork.ozlabs.org/api/1.2/patches/2234621/?format=json","web_url":"http://patchwork.ozlabs.org/project/qemu-devel/patch/20260507221717.486023-18-richard.henderson@linaro.org/","project":{"id":14,"url":"http://patchwork.ozlabs.org/api/1.2/projects/14/?format=json","name":"QEMU Development","link_name":"qemu-devel","list_id":"qemu-devel.nongnu.org","list_email":"qemu-devel@nongnu.org","web_url":"","scm_url":"","webscm_url":"","list_archive_url":"","list_archive_url_format":"","commit_url_format":""},"msgid":"<20260507221717.486023-18-richard.henderson@linaro.org>","list_archive_url":null,"date":"2026-05-07T22:17:16","name":"[17/18] fpu: Add accessors for rebias_{underflow,overflow}","commit_ref":null,"pull_url":null,"state":"new","archived":false,"hash":"fcdfbfe99bb9a1e3cc88790f22af6fac74724dce","submitter":{"id":72104,"url":"http://patchwork.ozlabs.org/api/1.2/people/72104/?format=json","name":"Richard Henderson","email":"richard.henderson@linaro.org"},"delegate":null,"mbox":"http://patchwork.ozlabs.org/project/qemu-devel/patch/20260507221717.486023-18-richard.henderson@linaro.org/mbox/","series":[{"id":503289,"url":"http://patchwork.ozlabs.org/api/1.2/series/503289/?format=json","web_url":"http://patchwork.ozlabs.org/project/qemu-devel/list/?series=503289","date":"2026-05-07T22:16:59","name":"fpu: Compress float_status","version":1,"mbox":"http://patchwork.ozlabs.org/series/503289/mbox/"}],"comments":"http://patchwork.ozlabs.org/api/patches/2234621/comments/","check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/2234621/checks/","tags":{},"related":[],"headers":{"Return-Path":"<qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org>","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=linaro.org header.i=@linaro.org header.a=rsa-sha256\n header.s=google header.b=Uu8Y43q2;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org\n (client-ip=209.51.188.17; helo=lists1p.gnu.org;\n envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org;\n receiver=patchwork.ozlabs.org)"],"Received":["from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17])\n\t(using TLSv1.2 with cipher ECDHE-ECDSA-AES256-GCM-SHA384 (256/256 bits))\n\t(No client certificate requested)\n\tby legolas.ozlabs.org (Postfix) with ESMTPS id 4gBRW76pKHz1yCg\n\tfor <incoming@patchwork.ozlabs.org>; Fri, 08 May 2026 08:19:31 +1000 (AEST)","from localhost ([::1] helo=lists1p.gnu.org)\n\tby lists1p.gnu.org with esmtp (Exim 4.90_1)\n\t(envelope-from <qemu-devel-bounces@nongnu.org>)\n\tid 1wL72Q-0000uq-2W; Thu, 07 May 2026 18:17:46 -0400","from eggs.gnu.org ([2001:470:142:3::10])\n by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256)\n (Exim 4.90_1) (envelope-from <richard.henderson@linaro.org>)\n id 1wL72O-0000u5-Rl\n for qemu-devel@nongnu.org; Thu, 07 May 2026 18:17:44 -0400","from mail-oa1-x34.google.com ([2001:4860:4864:20::34])\n by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128)\n (Exim 4.90_1) (envelope-from <richard.henderson@linaro.org>)\n id 1wL72M-0003G2-E8\n for qemu-devel@nongnu.org; Thu, 07 May 2026 18:17:44 -0400","by mail-oa1-x34.google.com with SMTP id\n 586e51a60fabf-408778a8ec4so807660fac.0\n for <qemu-devel@nongnu.org>; Thu, 07 May 2026 15:17:41 -0700 (PDT)","from stoup.attlocal.net ([2600:381:c938:6375:9641:bbb2:a93a:bb4c])\n by smtp.gmail.com with ESMTPSA id\n 586e51a60fabf-435573e7254sm45037fac.14.2026.05.07.15.17.39\n for <qemu-devel@nongnu.org>\n (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256);\n Thu, 07 May 2026 15:17:39 -0700 (PDT)"],"DKIM-Signature":"v=1; a=rsa-sha256; c=relaxed/relaxed;\n d=linaro.org; s=google; t=1778192260; x=1778797060; darn=nongnu.org;\n h=content-transfer-encoding:mime-version:references:in-reply-to\n :message-id:date:subject:to:from:from:to:cc:subject:date:message-id\n :reply-to; bh=DHW/PVSACyLCeJ01Jj+8W8gGU3WJOwf4DpmqjVgtWRw=;\n b=Uu8Y43q25PTCOJEfnHlEAr/04lenDI6HRuTslVhlAfsVRn/LHS247Q3JbVtXOJQJKM\n 2eejI/xtG5vbjCmU+g85ejdXIPbyO6aWE0HxI9aa5l2Qb+rCL0A2PW6QB9xBcoGKtYN/\n i4B5NHIonWRoo9dGZ9CdKxclZTPWWeRXkWqHF8vAe8y6/XwCLPqJcPs2Ke990xdns4i2\n x/1bPIEWpg9bsrp3yy74b9F7jPgaywAfyOA31V3hF7pzD1j9FS5s9DcenrL2YG4PXNqb\n fPX2ZtVhKK8MErGgqkR3tThHiJp6XE2ANNmIxLmu/4BaOslSc0M1iJlE6I9HmfNBgaCO\n Qs7w==","X-Google-DKIM-Signature":"v=1; a=rsa-sha256; c=relaxed/relaxed;\n d=1e100.net; s=20251104; t=1778192260; x=1778797060;\n h=content-transfer-encoding:mime-version:references:in-reply-to\n :message-id:date:subject:to:from:x-gm-gg:x-gm-message-state:from:to\n :cc:subject:date:message-id:reply-to;\n bh=DHW/PVSACyLCeJ01Jj+8W8gGU3WJOwf4DpmqjVgtWRw=;\n b=kmU0X5Qx/VgFFaRbY2SBVzqJWvqarjUaza1aeb+I5Nl2FoL+SVximD4e+M2hX0MYfw\n ZtyCkeCz8D+j+5Sp/FM2tKyG+stDdylP6yTIUFZ4Dsp9wXZ+YiG1LVQlFX0JVcOQOMoK\n RC0FekEq0q93lgb5+nA7iY9nGPMoIB1GNu3GlcXDZy0idSGgXSSLGD0CJ+PuQt9Ko5ER\n KfKrtT2bfPA22gzHl0STUJ+3p/FaS4OzaluykaiCP23+39WtS/qjWZpEX+TnV+8ZyfZF\n 8v3QAoJ/hlK3gCO+jU2SZtKzQW1EFr4PEj0xQ3RK4k7AL6vWiW8oVtczthFDW7GjEI4s\n HSJg==","X-Gm-Message-State":"AOJu0Yw7IF7fajn/MlCsuxCg8fSqEKpZIZyrckaKLYtSGwCZ9BHNvnF0\n pQxMNeB5A0Qi9fOk9vNqpk8F3xdyk8K4NEhx30Va36nY6VvbFPEOFzp+douWiVoQ4GQmkE4bAMT\n IatQu","X-Gm-Gg":"AeBDietiZmR8kI/e09P2m65uZ7DrCYMci3hw1FfAJfPuHpo+28Q6flgBNo/q94d9OZV\n 4ZwBjGyltD7wfEMMqtW1F8UagNvmvjTfztMB0nsEgUW6Dsi23Vh8XS0if1auMEVU/pWGhz+ZuFq\n OpvM8o4CCC5c9ExTWLjs377JEM/q9L8NGeW6kv/pk16swMMMLmb12NeCwbcND8oT0LAFm1aECgm\n n8aYsyCWcouMcA4eEmpKL5qTQV95h99Gn4jyYUF0x2N8u4OXQCXWbKpDnPi7HEb8rFOVNPKvZEW\n SfFX26f/v5k6cJ+mDQDI4h9r2qaMlmJnyfn/c7rsAnhfdHyp9T7vHwyoi5MV/6Qvb9BZJYdHWcV\n Zdk8RVFCvqy71qqfPq2fUiEubR+Zl9ToFxtqvVH12I2N4WGFVVuyi5wMAudDU7ss6ynyVw0sT3E\n hZWTa7IgdJDbemX4zbsKrA289ZOakPddlX/fg6pBJntiUdPgzdGxfZ0jvm3i1/lmOmXSI=","X-Received":"by 2002:a05:6820:1745:b0:694:6acf:a423 with SMTP id\n 006d021491bc7-69998d22f94mr5417823eaf.44.1778192260176;\n Thu, 07 May 2026 15:17:40 -0700 (PDT)","From":"Richard Henderson <richard.henderson@linaro.org>","To":"qemu-devel@nongnu.org","Subject":"[PATCH 17/18] fpu: Add accessors for rebias_{underflow,overflow}","Date":"Thu,  7 May 2026 17:17:16 -0500","Message-ID":"<20260507221717.486023-18-richard.henderson@linaro.org>","X-Mailer":"git-send-email 2.43.0","In-Reply-To":"<20260507221717.486023-1-richard.henderson@linaro.org>","References":"<20260507221717.486023-1-richard.henderson@linaro.org>","MIME-Version":"1.0","Content-Transfer-Encoding":"8bit","Received-SPF":"pass client-ip=2001:4860:4864:20::34;\n envelope-from=richard.henderson@linaro.org; helo=mail-oa1-x34.google.com","X-Spam_score_int":"-20","X-Spam_score":"-2.1","X-Spam_bar":"--","X-Spam_report":"(-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1,\n DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1,\n RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001,\n SPF_PASS=-0.001 autolearn=ham autolearn_force=no","X-Spam_action":"no action","X-BeenThere":"qemu-devel@nongnu.org","X-Mailman-Version":"2.1.29","Precedence":"list","List-Id":"qemu development <qemu-devel.nongnu.org>","List-Unsubscribe":"<https://lists.nongnu.org/mailman/options/qemu-devel>,\n <mailto:qemu-devel-request@nongnu.org?subject=unsubscribe>","List-Archive":"<https://lists.nongnu.org/archive/html/qemu-devel>","List-Post":"<mailto:qemu-devel@nongnu.org>","List-Help":"<mailto:qemu-devel-request@nongnu.org?subject=help>","List-Subscribe":"<https://lists.nongnu.org/mailman/listinfo/qemu-devel>,\n <mailto:qemu-devel-request@nongnu.org?subject=subscribe>","Errors-To":"qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org","Sender":"qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org"},"content":"Signed-off-by: Richard Henderson <richard.henderson@linaro.org>\n---\n include/fpu/softfloat-helpers.h | 10 ++++++++++\n target/ppc/cpu.c                |  4 ++--\n fpu/softfloat-parts.c.inc       |  4 ++--\n fpu/softfloat-specialize.c.inc  | 10 ++++++++++\n 4 files changed, 24 insertions(+), 4 deletions(-)","diff":"diff --git a/include/fpu/softfloat-helpers.h b/include/fpu/softfloat-helpers.h\nindex 49e04ffee9..4791a7fc87 100644\n--- a/include/fpu/softfloat-helpers.h\n+++ b/include/fpu/softfloat-helpers.h\n@@ -131,6 +131,16 @@ static inline void set_snan_rule(FloatSNaNRule val, float_status *status)\n     status->float_snan_rule = val;\n }\n \n+static inline void set_float_rebias_overflow(bool val, float_status *status)\n+{\n+    status->rebias_overflow = val;\n+}\n+\n+static inline void set_float_rebias_underflow(bool val, float_status *status)\n+{\n+    status->rebias_underflow = val;\n+}\n+\n static inline FloatRoundMode get_float_rounding_mode(const float_status *status)\n {\n     return status->float_rounding_mode;\ndiff --git a/target/ppc/cpu.c b/target/ppc/cpu.c\nindex 4d8faaddee..41edb18643 100644\n--- a/target/ppc/cpu.c\n+++ b/target/ppc/cpu.c\n@@ -248,8 +248,8 @@ void ppc_store_fpscr(CPUPPCState *env, target_ulong val)\n         val |= FP_FEX;\n     }\n     env->fpscr = val;\n-    env->fp_status.rebias_overflow  = (FP_OE & env->fpscr) ? true : false;\n-    env->fp_status.rebias_underflow = (FP_UE & env->fpscr) ? true : false;\n+    set_float_rebias_overflow(FP_OE & env->fpscr, &env->fp_status);\n+    set_float_rebias_underflow(FP_UE & env->fpscr, &env->fp_status);\n     if (tcg_enabled()) {\n         fpscr_set_rounding_mode(env);\n     }\ndiff --git a/fpu/softfloat-parts.c.inc b/fpu/softfloat-parts.c.inc\nindex 5598c8b44a..2198841f05 100644\n--- a/fpu/softfloat-parts.c.inc\n+++ b/fpu/softfloat-parts.c.inc\n@@ -368,7 +368,7 @@ static void partsN(uncanon_normal)(FloatPartsN *p, float_status *s,\n             switch (fmt->exp_max_kind) {\n             case float_expmax_ieee:\n                 flags |= float_flag_overflow;\n-                if (s->rebias_overflow) {\n+                if (get_float_rebias_overflow(s)) {\n                     exp -= fmt->exp_re_bias;\n                 } else if (overflow_norm) {\n                     flags |= float_flag_inexact;\n@@ -408,7 +408,7 @@ static void partsN(uncanon_normal)(FloatPartsN *p, float_status *s,\n             }\n         }\n         fracN(shr)(p, frac_shift);\n-    } else if (unlikely(s->rebias_underflow)) {\n+    } else if (unlikely(get_float_rebias_underflow(s))) {\n         flags |= float_flag_underflow;\n         exp += fmt->exp_re_bias;\n         if (p->frac_lo & round_mask) {\ndiff --git a/fpu/softfloat-specialize.c.inc b/fpu/softfloat-specialize.c.inc\nindex fe56cb7c7a..d9bea064e3 100644\n--- a/fpu/softfloat-specialize.c.inc\n+++ b/fpu/softfloat-specialize.c.inc\n@@ -94,6 +94,16 @@ static inline uint8_t get_float_default_nan_pattern(const float_status *status)\n     return status->default_nan_pattern;\n }\n \n+static inline bool get_float_rebias_overflow(const float_status *status)\n+{\n+    return status->rebias_overflow;\n+}\n+\n+static inline bool get_float_rebias_underflow(const float_status *status)\n+{\n+    return status->rebias_underflow;\n+}\n+\n /*----------------------------------------------------------------------------\n | For the deconstructed floating-point with fraction FRAC, return true\n | if the fraction represents a signalling NaN; otherwise false.\n","prefixes":["17/18"]}