{"id":2233055,"url":"http://patchwork.ozlabs.org/api/1.2/patches/2233055/?format=json","web_url":"http://patchwork.ozlabs.org/project/intel-wired-lan/patch/20260505152923.1040589-3-aleksander.lobakin@intel.com/","project":{"id":46,"url":"http://patchwork.ozlabs.org/api/1.2/projects/46/?format=json","name":"Intel Wired Ethernet development","link_name":"intel-wired-lan","list_id":"intel-wired-lan.osuosl.org","list_email":"intel-wired-lan@osuosl.org","web_url":"","scm_url":"","webscm_url":"","list_archive_url":"","list_archive_url_format":"","commit_url_format":""},"msgid":"<20260505152923.1040589-3-aleksander.lobakin@intel.com>","list_archive_url":null,"date":"2026-05-05T15:29:20","name":"[iwl-next,v5,2/5] libeth: handle creating pools with unreadable buffers","commit_ref":null,"pull_url":null,"state":"changes-requested","archived":false,"hash":"ddd1973b9b0a7ad98e0c2c9b4c8d4b4f34c7092b","submitter":{"id":85827,"url":"http://patchwork.ozlabs.org/api/1.2/people/85827/?format=json","name":"Alexander Lobakin","email":"aleksander.lobakin@intel.com"},"delegate":{"id":109701,"url":"http://patchwork.ozlabs.org/api/1.2/users/109701/?format=json","username":"anguy11","first_name":"Anthony","last_name":"Nguyen","email":"anthony.l.nguyen@intel.com"},"mbox":"http://patchwork.ozlabs.org/project/intel-wired-lan/patch/20260505152923.1040589-3-aleksander.lobakin@intel.com/mbox/","series":[{"id":502856,"url":"http://patchwork.ozlabs.org/api/1.2/series/502856/?format=json","web_url":"http://patchwork.ozlabs.org/project/intel-wired-lan/list/?series=502856","date":"2026-05-05T15:29:18","name":"ice: add support for devmem/io_uring Rx and Tx","version":5,"mbox":"http://patchwork.ozlabs.org/series/502856/mbox/"}],"comments":"http://patchwork.ozlabs.org/api/patches/2233055/comments/","check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/2233055/checks/","tags":{},"related":[],"headers":{"Return-Path":"<intel-wired-lan-bounces@osuosl.org>","X-Original-To":["incoming@patchwork.ozlabs.org","intel-wired-lan@lists.osuosl.org"],"Delivered-To":["patchwork-incoming@legolas.ozlabs.org","intel-wired-lan@lists.osuosl.org"],"Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=osuosl.org header.i=@osuosl.org header.a=rsa-sha256\n header.s=default header.b=SGD+84p7;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=osuosl.org\n (client-ip=2605:bc80:3010::137; helo=smtp4.osuosl.org;\n envelope-from=intel-wired-lan-bounces@osuosl.org;\n receiver=patchwork.ozlabs.org)"],"Received":["from smtp4.osuosl.org (smtp4.osuosl.org [IPv6:2605:bc80:3010::137])\n\t(using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)\n\t key-exchange x25519 server-signature ECDSA (secp384r1) server-digest SHA384)\n\t(No client certificate requested)\n\tby legolas.ozlabs.org (Postfix) with ESMTPS id 4g92XT2rknz1yJx\n\tfor <incoming@patchwork.ozlabs.org>; Wed, 06 May 2026 01:30:49 +1000 (AEST)","from localhost (localhost [127.0.0.1])\n\tby smtp4.osuosl.org (Postfix) with ESMTP id 0AE9B40AAA;\n\tTue,  5 May 2026 15:30:48 +0000 (UTC)","from smtp4.osuosl.org ([127.0.0.1])\n by localhost (smtp4.osuosl.org [127.0.0.1]) (amavis, port 10024) with ESMTP\n id ZCpq-U8oK49X; Tue,  5 May 2026 15:30:46 +0000 (UTC)","from lists1.osuosl.org (lists1.osuosl.org [140.211.166.142])\n\tby smtp4.osuosl.org (Postfix) with ESMTP id 8956740AA5;\n\tTue,  5 May 2026 15:30:46 +0000 (UTC)","from smtp3.osuosl.org (smtp3.osuosl.org [IPv6:2605:bc80:3010::136])\n by lists1.osuosl.org (Postfix) with ESMTP id 0F0D72A8\n for <intel-wired-lan@lists.osuosl.org>; Tue,  5 May 2026 15:30:45 +0000 (UTC)","from localhost (localhost [127.0.0.1])\n by smtp3.osuosl.org (Postfix) with ESMTP id 010BA608AF\n for <intel-wired-lan@lists.osuosl.org>; Tue,  5 May 2026 15:30:45 +0000 (UTC)","from smtp3.osuosl.org ([127.0.0.1])\n by localhost (smtp3.osuosl.org [127.0.0.1]) (amavis, port 10024) with ESMTP\n id 5X9HtLw2j6K8 for <intel-wired-lan@lists.osuosl.org>;\n Tue,  5 May 2026 15:30:44 +0000 (UTC)","from mgamail.intel.com (mgamail.intel.com [192.198.163.7])\n by smtp3.osuosl.org (Postfix) with ESMTPS id 0D8BA608B1\n for <intel-wired-lan@lists.osuosl.org>; Tue,  5 May 2026 15:30:43 +0000 (UTC)","from orviesa010.jf.intel.com ([10.64.159.150])\n by fmvoesa101.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384;\n 05 May 2026 08:30:44 -0700","from newjersey.igk.intel.com ([10.102.20.203])\n by orviesa010.jf.intel.com with ESMTP; 05 May 2026 08:30:41 -0700"],"X-Virus-Scanned":["amavis at osuosl.org","amavis at osuosl.org"],"X-Comment":"SPF check N/A for local connections - client-ip=140.211.166.142;\n helo=lists1.osuosl.org; envelope-from=intel-wired-lan-bounces@osuosl.org;\n receiver=<UNKNOWN> ","DKIM-Filter":["OpenDKIM Filter v2.11.0 smtp4.osuosl.org 8956740AA5","OpenDKIM Filter v2.11.0 smtp3.osuosl.org 0D8BA608B1"],"DKIM-Signature":"v=1; a=rsa-sha256; c=relaxed/relaxed; d=osuosl.org;\n\ts=default; t=1777995046;\n\tbh=uPcWbhbaNtnqyA1UnWMob30ULQYz4pPdmZFRgXDam34=;\n\th=From:To:Cc:Date:In-Reply-To:References:Subject:List-Id:\n\t List-Unsubscribe:List-Archive:List-Post:List-Help:List-Subscribe:\n\t From;\n\tb=SGD+84p7w3nJD8JiyNRd8a7uQFU0/61irXYgkOYDb5vRBouW0axfiyenJSlkE3juU\n\t 8ETR9TtdEThgE4t/gg8twOg/AYz8BAyQLe3n7i2yZri1t3soP2Zq+MNDHnVF3csdaB\n\t /zzspooY+UuBph7lfklMLXZtfK9JWa9g/H+AfUUfrqE7pnTtz1Tbwp43Y9bgpV125s\n\t dbFmfnRCDtS27L3wRRKfqwNVqloFXDKkOy3VRpguMBUVIt/dJtbQAvVS7/pQNEtACL\n\t QFg4rfzMSwCeMOpIrlgUOihKOp8PA9FHmpld/rf5DOtN8ZdmK0rueRPMwJbwhuAMS/\n\t K77sR3CpB3d9g==","Received-SPF":"Pass (mailfrom) identity=mailfrom; client-ip=192.198.163.7;\n helo=mgamail.intel.com; envelope-from=aleksander.lobakin@intel.com;\n receiver=<UNKNOWN>","DMARC-Filter":"OpenDMARC Filter v1.4.2 smtp3.osuosl.org 0D8BA608B1","X-CSE-ConnectionGUID":["Uv7zv2OeRN2xPj3Lb6QzGA==","7QXW066YS9ebb1/WFX/Z1Q=="],"X-CSE-MsgGUID":["XnFsSdjxTMOVk1FtSFUcXw==","/k/sMIPdTD+M2/1DK8EUfg=="],"X-IronPort-AV":["E=McAfee;i=\"6800,10657,11777\"; a=\"104317005\"","E=Sophos;i=\"6.23,217,1770624000\"; d=\"scan'208\";a=\"104317005\"","E=Sophos;i=\"6.23,217,1770624000\"; d=\"scan'208\";a=\"234971567\""],"X-ExtLoop1":"1","From":"Alexander Lobakin <aleksander.lobakin@intel.com>","To":"intel-wired-lan@lists.osuosl.org","Cc":"Alexander Lobakin <aleksander.lobakin@intel.com>,\n Tony Nguyen <anthony.l.nguyen@intel.com>,\n Przemek Kitszel <przemyslaw.kitszel@intel.com>,\n Andrew Lunn <andrew+netdev@lunn.ch>,\n \"David S. Miller\" <davem@davemloft.net>,\n Eric Dumazet <edumazet@google.com>, Jakub Kicinski <kuba@kernel.org>,\n Paolo Abeni <pabeni@redhat.com>, Simon Horman <horms@kernel.org>,\n Kohei Enju <kohei@enjuk.jp>, Jacob Keller <jacob.e.keller@intel.com>,\n Aleksandr Loktionov <aleksandr.loktionov@intel.com>,\n nxne.cnse.osdt.itp.upstreaming@intel.com, netdev@vger.kernel.org,\n linux-kernel@vger.kernel.org","Date":"Tue,  5 May 2026 17:29:20 +0200","Message-ID":"<20260505152923.1040589-3-aleksander.lobakin@intel.com>","X-Mailer":"git-send-email 2.54.0","In-Reply-To":"<20260505152923.1040589-1-aleksander.lobakin@intel.com>","References":"<20260505152923.1040589-1-aleksander.lobakin@intel.com>","MIME-Version":"1.0","Content-Transfer-Encoding":"8bit","X-Mailman-Original-DKIM-Signature":"v=1; a=rsa-sha256; c=relaxed/simple;\n d=intel.com; i=@intel.com; q=dns/txt; s=Intel;\n t=1777995044; x=1809531044;\n h=from:to:cc:subject:date:message-id:in-reply-to:\n references:mime-version:content-transfer-encoding;\n bh=tW48HlJuAqt1uoO3c4Wb5mF08n2Ne4gOKzKaMUhMJ3s=;\n b=YFWW1cFNRtegUxM8VRIooSwPwHnmk2ehbcLB1Maz3Qi2jm+EXHST+0Gy\n TVt+B/gSA2Z95SjMuMrtDxJiYtJPpkKQr2z2AGLXOq9InhNVXz4tQVgMW\n QtpvJPUjIEEX88mIavFseweHH77H+jao12bOVYyYfrHLSqi9442HECenX\n YnyV2BqTiu5q8EOCqe8QBe3BAMX9us0D3al653YrjjW023VOdMJqKnBc2\n ZbCG1e0LdzndqnvBW4NYoLNKlN+P/vbsJcpwCpRfPKJQSmiHS5NDPRkKC\n k6nIL6NUA15bbSF5tS05TqcgZs/L0NpUFXQkbtI+xAh9mTNZZBrSGwp+j\n A==;","X-Mailman-Original-Authentication-Results":["smtp3.osuosl.org;\n dmarc=pass (p=none dis=none)\n header.from=intel.com","smtp3.osuosl.org;\n dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com\n header.a=rsa-sha256 header.s=Intel header.b=YFWW1cFN"],"Subject":"[Intel-wired-lan] [PATCH iwl-next v5 2/5] libeth: handle creating\n pools with unreadable buffers","X-BeenThere":"intel-wired-lan@osuosl.org","X-Mailman-Version":"2.1.30","Precedence":"list","List-Id":"Intel Wired Ethernet Linux Kernel Driver Development\n <intel-wired-lan.osuosl.org>","List-Unsubscribe":"<https://lists.osuosl.org/mailman/options/intel-wired-lan>,\n <mailto:intel-wired-lan-request@osuosl.org?subject=unsubscribe>","List-Archive":"<http://lists.osuosl.org/pipermail/intel-wired-lan/>","List-Post":"<mailto:intel-wired-lan@osuosl.org>","List-Help":"<mailto:intel-wired-lan-request@osuosl.org?subject=help>","List-Subscribe":"<https://lists.osuosl.org/mailman/listinfo/intel-wired-lan>,\n <mailto:intel-wired-lan-request@osuosl.org?subject=subscribe>","Errors-To":"intel-wired-lan-bounces@osuosl.org","Sender":"\"Intel-wired-lan\" <intel-wired-lan-bounces@osuosl.org>"},"content":"libeth uses netmems for quite some time already, so in order to\nsupport unreadable frags / memory providers, it only needs to set\nPP_FLAG_ALLOW_UNREADABLE_NETMEM when needed.\nAlso add a couple sanity checks to make sure the driver didn't mess\nup the configuration options and, in case when an MP is installed,\nreturn the truesize always equal to PAGE_SIZE, so that\nlibeth_rx_alloc() will never try to allocate frags. Memory providers\nmanage buffers on their own and expect 1:1 buffer / HW Rx descriptor\nassociation.\n\nBonus: mention in the libeth_sqe_type description that\nLIBETH_SQE_EMPTY should also be used for netmem Tx SQEs -- they\ndon't need DMA unmapping.\n\nReviewed-by: Jacob Keller <jacob.e.keller@intel.com>\nReviewed-by: Aleksandr Loktionov <aleksandr.loktionov@intel.com>\nSigned-off-by: Alexander Lobakin <aleksander.lobakin@intel.com>\n---\n include/net/libeth/tx.h                |  2 +-\n drivers/net/ethernet/intel/libeth/rx.c | 42 ++++++++++++++++++++++++++\n 2 files changed, 43 insertions(+), 1 deletion(-)","diff":"diff --git a/include/net/libeth/tx.h b/include/net/libeth/tx.h\nindex c3db5c6f1641..a66fc2b3a114 100644\n--- a/include/net/libeth/tx.h\n+++ b/include/net/libeth/tx.h\n@@ -12,7 +12,7 @@\n \n /**\n  * enum libeth_sqe_type - type of &libeth_sqe to act on Tx completion\n- * @LIBETH_SQE_EMPTY: unused/empty OR XDP_TX/XSk frame, no action required\n+ * @LIBETH_SQE_EMPTY: empty OR netmem/XDP_TX/XSk frame, no action required\n  * @LIBETH_SQE_CTX: context descriptor with empty SQE, no action required\n  * @LIBETH_SQE_SLAB: kmalloc-allocated buffer, unmap and kfree()\n  * @LIBETH_SQE_FRAG: mapped skb frag, only unmap DMA\ndiff --git a/drivers/net/ethernet/intel/libeth/rx.c b/drivers/net/ethernet/intel/libeth/rx.c\nindex 8874b714cdcc..11e6e8f353ef 100644\n--- a/drivers/net/ethernet/intel/libeth/rx.c\n+++ b/drivers/net/ethernet/intel/libeth/rx.c\n@@ -6,6 +6,7 @@\n #include <linux/export.h>\n \n #include <net/libeth/rx.h>\n+#include <net/netdev_queues.h>\n \n /* Rx buffer management */\n \n@@ -139,9 +140,47 @@ static bool libeth_rx_page_pool_params_zc(struct libeth_fq *fq,\n \tfq->buf_len = clamp(mtu, LIBETH_RX_BUF_STRIDE, max);\n \tfq->truesize = fq->buf_len;\n \n+\t/*\n+\t * Allow frags only for kernel pages. `fq->truesize == pp->max_len`\n+\t * will always fall back to regular page_pool_alloc_netmems()\n+\t * regardless of the MTU / FQ buffer size.\n+\t */\n+\tif (pp->flags & PP_FLAG_ALLOW_UNREADABLE_NETMEM)\n+\t\tfq->truesize = pp->max_len;\n+\n \treturn true;\n }\n \n+/**\n+ * libeth_rx_page_pool_check_unread - check input params for unreadable MPs\n+ * @fq: buffer queue to check\n+ * @pp: &page_pool_params for the queue\n+ *\n+ * Make sure we don't create an invalid pool with full-frame unreadable\n+ * buffers, bidirectional unreadable buffers or so, and configure the\n+ * ZC payload pool accordingly.\n+ *\n+ * Return: true on success, false on invalid input params.\n+ */\n+static bool libeth_rx_page_pool_check_unread(const struct libeth_fq *fq,\n+\t\t\t\t\t     struct page_pool_params *pp)\n+{\n+\tif (!netif_rxq_has_unreadable_mp(pp->netdev, pp->queue_idx))\n+\t\treturn true;\n+\n+\t/* For now, the core stack doesn't allow XDP with unreadable frags */\n+\tif (fq->xdp)\n+\t\treturn false;\n+\n+\t/* It should be either a header pool or a ZC payload pool */\n+\tif (fq->type == LIBETH_FQE_HDR)\n+\t\treturn !fq->hsplit;\n+\n+\tpp->flags |= PP_FLAG_ALLOW_UNREADABLE_NETMEM;\n+\n+\treturn fq->hsplit;\n+}\n+\n /**\n  * libeth_rx_fq_create - create a PP with the default libeth settings\n  * @fq: buffer queue struct to fill\n@@ -165,6 +204,9 @@ int libeth_rx_fq_create(struct libeth_fq *fq, struct napi_struct *napi)\n \tstruct page_pool *pool;\n \tint ret;\n \n+\tif (!libeth_rx_page_pool_check_unread(fq, &pp))\n+\t\treturn -EINVAL;\n+\n \tpp.dma_dir = fq->xdp ? DMA_BIDIRECTIONAL : DMA_FROM_DEVICE;\n \n \tif (!fq->hsplit)\n","prefixes":["iwl-next","v5","2/5"]}