{"id":2232989,"url":"http://patchwork.ozlabs.org/api/1.2/patches/2232989/?format=json","web_url":"http://patchwork.ozlabs.org/project/uboot/patch/2a5fee05be84fa1cb333f3ab3db732311da321cf.1777984225.git.michal.simek@amd.com/","project":{"id":18,"url":"http://patchwork.ozlabs.org/api/1.2/projects/18/?format=json","name":"U-Boot","link_name":"uboot","list_id":"u-boot.lists.denx.de","list_email":"u-boot@lists.denx.de","web_url":null,"scm_url":null,"webscm_url":null,"list_archive_url":"","list_archive_url_format":"","commit_url_format":""},"msgid":"<2a5fee05be84fa1cb333f3ab3db732311da321cf.1777984225.git.michal.simek@amd.com>","list_archive_url":null,"date":"2026-05-05T12:30:29","name":"[v2,1/4] reset: Add reset_reset() and reset_reset_bulk() API","commit_ref":null,"pull_url":null,"state":"new","archived":false,"hash":"adac34a096eea7dab08bc2779972762aa0372fc0","submitter":{"id":84271,"url":"http://patchwork.ozlabs.org/api/1.2/people/84271/?format=json","name":"Michal Simek","email":"michal.simek@amd.com"},"delegate":{"id":3651,"url":"http://patchwork.ozlabs.org/api/1.2/users/3651/?format=json","username":"trini","first_name":"Tom","last_name":"Rini","email":"trini@ti.com"},"mbox":"http://patchwork.ozlabs.org/project/uboot/patch/2a5fee05be84fa1cb333f3ab3db732311da321cf.1777984225.git.michal.simek@amd.com/mbox/","series":[{"id":502832,"url":"http://patchwork.ozlabs.org/api/1.2/series/502832/?format=json","web_url":"http://patchwork.ozlabs.org/project/uboot/list/?series=502832","date":"2026-05-05T12:30:28","name":"reset: Introduce reset_reset.*() API","version":2,"mbox":"http://patchwork.ozlabs.org/series/502832/mbox/"}],"comments":"http://patchwork.ozlabs.org/api/patches/2232989/comments/","check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/2232989/checks/","tags":{},"related":[],"headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (1024-bit key;\n unprotected) header.d=amd.com header.i=@amd.com header.a=rsa-sha256\n header.s=selector1 header.b=wcQEQq87;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de\n (client-ip=85.214.62.61; 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helo=satlexmb07.amd.com; pr=C","None (SATLEXMB04.amd.com: michal.simek@amd.com does not\n designate permitted sender hosts)"],"From":"Michal Simek ","To":", , Simon Glass ","CC":"Tom Rini ","Subject":"[PATCH v2 1/4] reset: Add reset_reset() and reset_reset_bulk() API","Date":"Tue, 5 May 2026 14:30:29 +0200","Message-ID":"\n <2a5fee05be84fa1cb333f3ab3db732311da321cf.1777984225.git.michal.simek@amd.com>","X-Mailer":"git-send-email 2.43.0","In-Reply-To":"","References":"","MIME-Version":"1.0","X-Developer-Signature":"v=1; a=openpgp-sha256; l=5472; i=michal.simek@amd.com;\n h=from:subject:message-id; bh=Ux1gzPlD4qk0LtpfXuVjY+9ENYPKil8nbMuVwqgd1vw=;\n b=owGbwMvMwCG2mv3fB7+vgl8ZT6slMWT+fPTqMdsdjgurg9mYzlXMXT3J1V5aIsn557d/HZEtZ\n 1cuXnhtYkcpC4MYB4OsmCLLdCYdhzXfri0VWx6ZDzOHlQlkCAMXpwBM5IwuI8MLVkFRv1mli3XL\n p/azzr7y7FtK2omGoq5OG6XMpEqlr7MZ/odprfzZO/Gpg8turrW9S9MadYyXl7jLnss71OKlcH8\n /My8A","X-Developer-Key":"i=michal.simek@amd.com; a=openpgp;\n fpr=67350C9BF5CCEE9B5364356A377C7F21FE3D1F91","Content-Transfer-Encoding":"8bit","Content-Type":"text/plain","X-EOPAttributedMessage":"0","X-MS-PublicTrafficType":"Email","X-MS-TrafficTypeDiagnostic":"SJ5PEPF000001F6:EE_|MN2PR12MB4286:EE_","X-MS-Office365-Filtering-Correlation-Id":"3b2e4ba2-f055-4c5c-9f5c-08deaaa2255b","X-MS-Exchange-SenderADCheck":"1","X-MS-Exchange-AntiSpam-Relay":"0","X-Microsoft-Antispam":"BCL:0;\n ARA:13230040|82310400026|376014|1800799024|36860700016|22082099003|18002099003|56012099003;","X-Microsoft-Antispam-Message-Info":"\n 34tSIlsxuPr560wp7umDWPapv8RQ8A1RSUHBAlzQVn+BtE9oOb30mlYOE+PGojEvpEDAZe6HOmA29+gpyHmZRMwiwQALqNFENlmL+JmCZ/CmeygMcW6MQPGRNE8Abdv0pZp8EaoS8nkVcQ/Ln2K3vVefvQboflBslkum1w5cXZRGtaGCfFSSFYbrJRSdug7DlwCzRkP5/xKAkBNfVLRzT0WwKL/x30tEqMAg/qEihaZLJvXwU2xsmSf5NOQcFhEHCsfFu1Cuj8m4O6Bomvl2KURYB75+4jgPmu/IoFWlpQVlns1niGNo/OVAu+Ul1zkRlPeXJc4hhGyFvdHAmTzWJXt8ad+/mxZHN1lei01Zjr+KHBctHJcAyr3dNbADU4TVmKW1/spMfcl6a9npKZsashGayCYLmqyXYNUqkv6TD5HDbFxgvfUbQH7fb8JEW/a+OANCsCzpHlmNSLoEHbHo2wOolAqIQ1xFtjT0HpIlVd7CcEPjmrAfycc7eseJKFwcyeQK9egaXRPg2sFEZ8XirCUQm6gYist9KOOKBr6Ro3ejhGr+AVJuwsNlUkcgJAV48obv7/Rg8GBH8A4GKSxnXBgzwhLzb0PxvXO07ieUrLZabiGK0PmZ6e/EB7ccPUpU1D4Dutak5VDRtH12EvaOOlKROjnLaknFo1WVDTBzqLfsFjyRldH/fXeXxfOqOhbjzLRXrlQm82ataRvRclWnJCsboAyeFXauxwvpYcGOB6w=","X-Forefront-Antispam-Report":"CIP:165.204.84.17; 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Ip=[165.204.84.17];\n Helo=[satlexmb07.amd.com]","X-MS-Exchange-CrossTenant-AuthSource":"\n SJ5PEPF000001F6.namprd05.prod.outlook.com","X-MS-Exchange-CrossTenant-AuthAs":"Anonymous","X-MS-Exchange-CrossTenant-FromEntityHeader":"HybridOnPrem","X-MS-Exchange-Transport-CrossTenantHeadersStamped":"MN2PR12MB4286","X-BeenThere":"u-boot@lists.denx.de","X-Mailman-Version":"2.1.39","Precedence":"list","List-Id":"U-Boot discussion ","List-Unsubscribe":",\n ","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n ","Errors-To":"u-boot-bounces@lists.denx.de","Sender":"\"U-Boot\" ","X-Virus-Scanned":"clamav-milter 0.103.8 at phobos.denx.de","X-Virus-Status":"Clean"},"content":"Add reset_reset() and reset_reset_bulk() functions to the reset\ncontroller API. These functions assert and then deassert reset signals\nin a single call, providing a convenient way to pulse/toggle a reset\nline.\n\nThis mimics the Linux kernel's reset_control_reset() and\nreset_control_bulk_reset() APIs. The new functions are useful for\ndrivers that need to cycle a reset line during initialization or\nerror recovery but with also passing delay parameter.\n\nIf a driver implements the rst_reset op, it will be called directly\nwith the delay parameter. Otherwise, the reset core performs\nreset_assert(), optional udelay(), and reset_deassert() as fallback.\n\nSigned-off-by: Michal Simek \n---\n\nChanges in v2:\n- Add delay_us parameter to specify delay between assert and deassert\n- Pass delay_us to rst_reset op so drivers can use it if needed\n- Return -ENOSYS in stubs when !CONFIG_DM_RESET (like clk.h)\n- Fix line length to stay within 80 characters\n\n drivers/reset/reset-uclass.c | 34 ++++++++++++++++++++++++++++++\n include/reset-uclass.h | 12 +++++++++++\n include/reset.h | 41 ++++++++++++++++++++++++++++++++++++\n 3 files changed, 87 insertions(+)","diff":"diff --git a/drivers/reset/reset-uclass.c b/drivers/reset/reset-uclass.c\nindex fe4cebf54f15..c199e3e5da71 100644\n--- a/drivers/reset/reset-uclass.c\n+++ b/drivers/reset/reset-uclass.c\n@@ -13,6 +13,7 @@\n #include \n #include \n #include \n+#include \n \n static inline struct reset_ops *reset_dev_ops(struct udevice *dev)\n {\n@@ -225,6 +226,39 @@ int reset_deassert_bulk(struct reset_ctl_bulk *bulk)\n \treturn 0;\n }\n \n+int reset_reset(struct reset_ctl *reset_ctl, ulong delay_us)\n+{\n+\tstruct reset_ops *ops = reset_dev_ops(reset_ctl->dev);\n+\tint ret;\n+\n+\tdebug(\"%s(reset_ctl=%p, delay_us=%lu)\\n\", __func__, reset_ctl,\n+\t delay_us);\n+\n+\tif (ops->rst_reset)\n+\t\treturn ops->rst_reset(reset_ctl, delay_us);\n+\n+\tret = reset_assert(reset_ctl);\n+\tif (ret < 0)\n+\t\treturn ret;\n+\n+\tudelay(delay_us);\n+\n+\treturn reset_deassert(reset_ctl);\n+}\n+\n+int reset_reset_bulk(struct reset_ctl_bulk *bulk, ulong delay_us)\n+{\n+\tint i, ret;\n+\n+\tfor (i = 0; i < bulk->count; i++) {\n+\t\tret = reset_reset(&bulk->resets[i], delay_us);\n+\t\tif (ret < 0)\n+\t\t\treturn ret;\n+\t}\n+\n+\treturn 0;\n+}\n+\n int reset_status(struct reset_ctl *reset_ctl)\n {\n \tstruct reset_ops *ops = reset_dev_ops(reset_ctl->dev);\ndiff --git a/include/reset-uclass.h b/include/reset-uclass.h\nindex 9a0696dd1e3b..706fcffd234d 100644\n--- a/include/reset-uclass.h\n+++ b/include/reset-uclass.h\n@@ -76,6 +76,18 @@ struct reset_ops {\n \t * @return 0 if OK, or a negative error code.\n \t */\n \tint (*rst_deassert)(struct reset_ctl *reset_ctl);\n+\t/**\n+\t * rst_reset - Reset a HW module.\n+\t *\n+\t * This optional function triggers a reset pulse on the reset line,\n+\t * asserting and then deasserting the reset signal. If not implemented,\n+\t * the reset core will use rst_assert followed by rst_deassert.\n+\t *\n+\t * @reset_ctl:\tThe reset signal to pulse.\n+\t * @delay_us:\tDelay in microseconds between assert and deassert.\n+\t * @return 0 if OK, or a negative error code.\n+\t */\n+\tint (*rst_reset)(struct reset_ctl *reset_ctl, ulong delay_us);\n \t/**\n \t * rst_status - Check reset signal status.\n \t *\ndiff --git a/include/reset.h b/include/reset.h\nindex 036a786d2ace..a4a6ea962b2b 100644\n--- a/include/reset.h\n+++ b/include/reset.h\n@@ -320,6 +320,37 @@ int reset_deassert(struct reset_ctl *reset_ctl);\n */\n int reset_deassert_bulk(struct reset_ctl_bulk *bulk);\n \n+/**\n+ * reset_reset - Reset a HW module by asserting and deasserting a reset signal.\n+ *\n+ * This function will assert and then deassert the specified reset signal,\n+ * thus resetting the affected HW module. This is a convenience function\n+ * that combines reset_assert() and reset_deassert().\n+ *\n+ * @reset_ctl:\tA reset control struct that was previously successfully\n+ *\t\trequested by reset_get_by_*().\n+ * @delay_us:\tDelay in microseconds between assert and deassert.\n+ *\t\tUse 0 for no delay (or when the driver handles the delay\n+ *\t\tinternally via rst_reset op).\n+ * Return: 0 if OK, or a negative error code.\n+ */\n+int reset_reset(struct reset_ctl *reset_ctl, ulong delay_us);\n+\n+/**\n+ * reset_reset_bulk - Reset all HW modules in a reset control bulk struct.\n+ *\n+ * This function will assert and then deassert all reset signals in the\n+ * specified reset control bulk struct, thus resetting all affected HW modules.\n+ *\n+ * @bulk:\tA reset control bulk struct that was previously successfully\n+ *\t\trequested by reset_get_bulk().\n+ * @delay_us:\tDelay in microseconds between assert and deassert.\n+ *\t\tUse 0 for no delay (or when the driver handles the delay\n+ *\t\tinternally via rst_reset op).\n+ * Return: 0 if OK, or a negative error code.\n+ */\n+int reset_reset_bulk(struct reset_ctl_bulk *bulk, ulong delay_us);\n+\n /**\n * rst_status - Check reset signal status.\n *\n@@ -443,6 +474,16 @@ static inline int reset_deassert_bulk(struct reset_ctl_bulk *bulk)\n \treturn 0;\n }\n \n+static inline int reset_reset(struct reset_ctl *reset_ctl, ulong delay_us)\n+{\n+\treturn -ENOSYS;\n+}\n+\n+static inline int reset_reset_bulk(struct reset_ctl_bulk *bulk, ulong delay_us)\n+{\n+\treturn -ENOSYS;\n+}\n+\n static inline int reset_status(struct reset_ctl *reset_ctl)\n {\n \treturn -ENOTSUPP;\n","prefixes":["v2","1/4"]}