{"id":2232959,"url":"http://patchwork.ozlabs.org/api/1.2/patches/2232959/?format=json","web_url":"http://patchwork.ozlabs.org/project/linux-tegra/patch/20260505105928.38457-4-akhilrajeev@nvidia.com/","project":{"id":21,"url":"http://patchwork.ozlabs.org/api/1.2/projects/21/?format=json","name":"Linux Tegra Development","link_name":"linux-tegra","list_id":"linux-tegra.vger.kernel.org","list_email":"linux-tegra@vger.kernel.org","web_url":null,"scm_url":null,"webscm_url":null,"list_archive_url":"","list_archive_url_format":"","commit_url_format":""},"msgid":"<20260505105928.38457-4-akhilrajeev@nvidia.com>","list_archive_url":null,"date":"2026-05-05T10:59:27","name":"[3/4] i2c: tegra: Update Tegra410 I2C timing parameters","commit_ref":null,"pull_url":null,"state":"new","archived":false,"hash":"b2e71e92b717aaac3fb85b5e85d2005a4c2186cc","submitter":{"id":81965,"url":"http://patchwork.ozlabs.org/api/1.2/people/81965/?format=json","name":"Akhil R","email":"akhilrajeev@nvidia.com"},"delegate":null,"mbox":"http://patchwork.ozlabs.org/project/linux-tegra/patch/20260505105928.38457-4-akhilrajeev@nvidia.com/mbox/","series":[{"id":502821,"url":"http://patchwork.ozlabs.org/api/1.2/series/502821/?format=json","web_url":"http://patchwork.ozlabs.org/project/linux-tegra/list/?series=502821","date":"2026-05-05T10:59:25","name":"i2c: tegra: Improve DMA mapping, latency, and power management","version":1,"mbox":"http://patchwork.ozlabs.org/series/502821/mbox/"}],"comments":"http://patchwork.ozlabs.org/api/patches/2232959/comments/","check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/2232959/checks/","tags":{},"related":[],"headers":{"Return-Path":"\n ","X-Original-To":["incoming@patchwork.ozlabs.org","linux-tegra@vger.kernel.org"],"Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=Nvidia.com header.i=@Nvidia.com header.a=rsa-sha256\n header.s=selector2 header.b=XZBJFouT;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org\n (client-ip=172.105.105.114; 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This adjusts the fast mode and HS mode settings to be compliant\nwith the I2C specification.\n\nFixes: 59717f260183 (\"i2c: tegra: Add support for Tegra410\")\nSigned-off-by: Akhil R \n---\n drivers/i2c/busses/i2c-tegra.c | 8 ++++----\n 1 file changed, 4 insertions(+), 4 deletions(-)","diff":"diff --git a/drivers/i2c/busses/i2c-tegra.c b/drivers/i2c/busses/i2c-tegra.c\nindex 1d274431e209..0c26139b4721 100644\n--- a/drivers/i2c/busses/i2c-tegra.c\n+++ b/drivers/i2c/busses/i2c-tegra.c\n@@ -2137,9 +2137,9 @@ static const struct tegra_i2c_hw_feature tegra264_i2c_hw = {\n static const struct tegra_i2c_hw_feature tegra410_i2c_hw = {\n \t.has_continue_xfer_support = true,\n \t.has_per_pkt_xfer_complete_irq = true,\n-\t.clk_divisor_hs_mode = 1,\n+\t.clk_divisor_hs_mode = 2,\n \t.clk_divisor_std_mode = 0x3f,\n-\t.clk_divisor_fast_mode = 0x2c,\n+\t.clk_divisor_fast_mode = 0x2f,\n \t.clk_divisor_fast_plus_mode = 0x11,\n \t.has_config_load_reg = true,\n \t.has_multi_master_mode = true,\n@@ -2155,8 +2155,8 @@ static const struct tegra_i2c_hw_feature tegra410_i2c_hw = {\n \t.thigh_fast_mode = 0x2,\n \t.tlow_fastplus_mode = 0x2,\n \t.thigh_fastplus_mode = 0x2,\n-\t.tlow_hs_mode = 0x8,\n-\t.thigh_hs_mode = 0x6,\n+\t.tlow_hs_mode = 0x5,\n+\t.thigh_hs_mode = 0x2,\n \t.setup_hold_time_std_mode = 0x08080808,\n \t.setup_hold_time_fast_mode = 0x02020202,\n \t.setup_hold_time_fastplus_mode = 0x02020202,\n","prefixes":["3/4"]}