{"id":2232949,"url":"http://patchwork.ozlabs.org/api/1.2/patches/2232949/?format=json","web_url":"http://patchwork.ozlabs.org/project/linux-pwm/patch/20260505-apple-m3-initial-devicetrees-v2-6-b0c2f3519e0e@jannau.net/","project":{"id":38,"url":"http://patchwork.ozlabs.org/api/1.2/projects/38/?format=json","name":"Linux PWM development","link_name":"linux-pwm","list_id":"linux-pwm.vger.kernel.org","list_email":"linux-pwm@vger.kernel.org","web_url":"","scm_url":"","webscm_url":"","list_archive_url":"","list_archive_url_format":"","commit_url_format":""},"msgid":"<20260505-apple-m3-initial-devicetrees-v2-6-b0c2f3519e0e@jannau.net>","list_archive_url":null,"date":"2026-05-05T11:02:44","name":"[v2,6/6] arm64: dts: apple: Initial t8122 (M3) device trees","commit_ref":null,"pull_url":null,"state":"superseded","archived":false,"hash":"966b828f6572baa7189a107479f09c53d018486b","submitter":{"id":46572,"url":"http://patchwork.ozlabs.org/api/1.2/people/46572/?format=json","name":"Janne Grunau","email":"j@jannau.net"},"delegate":null,"mbox":"http://patchwork.ozlabs.org/project/linux-pwm/patch/20260505-apple-m3-initial-devicetrees-v2-6-b0c2f3519e0e@jannau.net/mbox/","series":[{"id":502819,"url":"http://patchwork.ozlabs.org/api/1.2/series/502819/?format=json","web_url":"http://patchwork.ozlabs.org/project/linux-pwm/list/?series=502819","date":"2026-05-05T11:02:43","name":"Initial Apple silicon M3 device trees and dt-bindings","version":2,"mbox":"http://patchwork.ozlabs.org/series/502819/mbox/"}],"comments":"http://patchwork.ozlabs.org/api/patches/2232949/comments/","check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/2232949/checks/","tags":{},"related":[],"headers":{"Return-Path":"\n ","X-Original-To":["incoming@patchwork.ozlabs.org","linux-pwm@vger.kernel.org"],"Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=jannau.net header.i=@jannau.net header.a=rsa-sha256\n header.s=fm1 header.b=kpROSVQO;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=messagingengine.com header.i=@messagingengine.com\n header.a=rsa-sha256 header.s=fm3 header.b=ZdTPlnFl;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org\n (client-ip=172.105.105.114; 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charset=\"utf-8\"","Content-Transfer-Encoding":"7bit","Message-Id":"\n <20260505-apple-m3-initial-devicetrees-v2-6-b0c2f3519e0e@jannau.net>","References":"\n <20260505-apple-m3-initial-devicetrees-v2-0-b0c2f3519e0e@jannau.net>","In-Reply-To":"\n <20260505-apple-m3-initial-devicetrees-v2-0-b0c2f3519e0e@jannau.net>","To":"Rob Herring , Krzysztof Kozlowski ,\n Conor Dooley ,\n Lorenzo Pieralisi , Sven Peter ,\n Neal Gompa , Wim Van Sebroeck ,\n Guenter Roeck , Mark Kettenis ,\n Sasha Finkelstein ,\n =?utf-8?q?Uwe_Kleine-K=C3=B6nig?= ","Cc":"devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,\n asahi@lists.linux.dev, linux-arm-kernel@lists.infradead.org,\n linux-watchdog@vger.kernel.org, linux-pwm@vger.kernel.org,\n Janne Grunau , Michael Reeves ,\n Joshua Peisach ","X-Mailer":"b4 0.14.3","X-Developer-Signature":"v=1; a=openpgp-sha256; l=53454; i=j@jannau.net;\n s=yk2025; h=from:subject:message-id;\n bh=AvTYTEdlDuNuJwDtuI1GAzyIq+Vi18Ws3y54YYYrIDI=;\n b=owGbwMvMwCW2UNrmdq9+ahrjabUkhsyf5+I33uSuzmc4Y3Dp4PvMVesvNtneVjusPL/y6a6EC\n vOwN/e+dJSyMIhxMciKKbIkab/sYFhdoxhT+yAMZg4rE8gQBi5OAZjI5E+MDBfvph75lBTlqsny\n /tPbBz/O5bw7ZCq06Wr048gzHZvNW08wMnSI7XkzS+5Ou4Na6JLDJ2Zlrkp8JrI5V2DFWae4qMv\n b7DkB","X-Developer-Key":"i=j@jannau.net; a=openpgp;\n fpr=8B336A6BE4E5695E89B8532B81E806F586338419"},"content":"Add minimal device trees for all t8122 based devices. The devices are\n- iMac (24-inch, M3, 2023)\n- MacBook Air (13-inch, M3, 2024)\n- MacBook Air (15-inch, M3, 2024)\n- MacBook Pro (14-inch, M3, 2023)\n\nThe device trees have a minimal set of devices limited to CPU cores,\ninterrupt controller, power states, watchdog, serial, pin controller,\ni2c and the boot framebuffer.\nThe device trees for the notebooks add a PWM controller for the keyboard\nLED illumination.\nThe iMacs and the 14-inch device trees add the i2c based Apple cd321x\nUSB Type-C port controller.\n\nCo-developed-by: Michael Reeves \nSigned-off-by: Michael Reeves \nReviewed-by: Joshua Peisach \nReviewed-by: Neal Gompa \nSigned-off-by: Janne Grunau \n---\n arch/arm64/boot/dts/apple/Makefile | 5 +\n arch/arm64/boot/dts/apple/t8122-j433.dts | 19 +\n arch/arm64/boot/dts/apple/t8122-j434.dts | 19 +\n arch/arm64/boot/dts/apple/t8122-j504.dts | 37 +\n arch/arm64/boot/dts/apple/t8122-j613.dts | 35 +\n arch/arm64/boot/dts/apple/t8122-j615.dts | 35 +\n arch/arm64/boot/dts/apple/t8122-jxxx.dtsi | 48 +\n arch/arm64/boot/dts/apple/t8122-pmgr.dtsi | 1149 ++++++++++++++++++++++++\n arch/arm64/boot/dts/apple/t8122-usbpd-i2c.dtsi | 32 +\n arch/arm64/boot/dts/apple/t8122.dtsi | 444 +++++++++\n 10 files changed, 1823 insertions(+)","diff":"diff --git a/arch/arm64/boot/dts/apple/Makefile b/arch/arm64/boot/dts/apple/Makefile\nindex 4eebcd85c90f..6fc3349a5842 100644\n--- a/arch/arm64/boot/dts/apple/Makefile\n+++ b/arch/arm64/boot/dts/apple/Makefile\n@@ -91,3 +91,8 @@ dtb-$(CONFIG_ARCH_APPLE) += t8112-j413.dtb\n dtb-$(CONFIG_ARCH_APPLE) += t8112-j415.dtb\n dtb-$(CONFIG_ARCH_APPLE) += t8112-j473.dtb\n dtb-$(CONFIG_ARCH_APPLE) += t8112-j493.dtb\n+dtb-$(CONFIG_ARCH_APPLE) += t8122-j433.dtb\n+dtb-$(CONFIG_ARCH_APPLE) += t8122-j434.dtb\n+dtb-$(CONFIG_ARCH_APPLE) += t8122-j504.dtb\n+dtb-$(CONFIG_ARCH_APPLE) += t8122-j613.dtb\n+dtb-$(CONFIG_ARCH_APPLE) += t8122-j615.dtb\ndiff --git a/arch/arm64/boot/dts/apple/t8122-j433.dts b/arch/arm64/boot/dts/apple/t8122-j433.dts\nnew file mode 100644\nindex 000000000000..34205d173a9b\n--- /dev/null\n+++ b/arch/arm64/boot/dts/apple/t8122-j433.dts\n@@ -0,0 +1,19 @@\n+// SPDX-License-Identifier: GPL-2.0+ OR MIT\n+/*\n+ * Apple iMac (24-inch, 2x USB-C, M3, 2023)\n+ *\n+ * target-type: J433\n+ *\n+ * Copyright The Asahi Linux Contributors\n+ */\n+\n+/dts-v1/;\n+\n+#include \"t8122.dtsi\"\n+#include \"t8122-usbpd-i2c.dtsi\"\n+#include \"t8122-jxxx.dtsi\"\n+\n+/ {\n+\tcompatible = \"apple,j433\", \"apple,t8122\", \"apple,arm-platform\";\n+\tmodel = \"Apple iMac (24-inch, 2x USB-C, M3, 2023)\";\n+};\ndiff --git a/arch/arm64/boot/dts/apple/t8122-j434.dts b/arch/arm64/boot/dts/apple/t8122-j434.dts\nnew file mode 100644\nindex 000000000000..ead5afd77efb\n--- /dev/null\n+++ b/arch/arm64/boot/dts/apple/t8122-j434.dts\n@@ -0,0 +1,19 @@\n+// SPDX-License-Identifier: GPL-2.0+ OR MIT\n+/*\n+ * Apple iMac (24-inch, 4x USB-C, M3, 2023)\n+ *\n+ * target-type: J434\n+ *\n+ * Copyright The Asahi Linux Contributors\n+ */\n+\n+/dts-v1/;\n+\n+#include \"t8122.dtsi\"\n+#include \"t8122-usbpd-i2c.dtsi\"\n+#include \"t8122-jxxx.dtsi\"\n+\n+/ {\n+\tcompatible = \"apple,j434\", \"apple,t8122\", \"apple,arm-platform\";\n+\tmodel = \"Apple iMac (24-inch, 4x USB-C, M3, 2023)\";\n+};\ndiff --git a/arch/arm64/boot/dts/apple/t8122-j504.dts b/arch/arm64/boot/dts/apple/t8122-j504.dts\nnew file mode 100644\nindex 000000000000..464491b55b01\n--- /dev/null\n+++ b/arch/arm64/boot/dts/apple/t8122-j504.dts\n@@ -0,0 +1,37 @@\n+// SPDX-License-Identifier: GPL-2.0+ OR MIT\n+/*\n+ * Apple MacBook Pro (14-inch, M3, 2023)\n+ *\n+ * target-type: J504\n+ *\n+ * Copyright The Asahi Linux Contributors\n+ */\n+\n+/dts-v1/;\n+\n+#include \"t8122.dtsi\"\n+#include \"t8122-usbpd-i2c.dtsi\"\n+#include \"t8122-jxxx.dtsi\"\n+#include \n+\n+/ {\n+\tcompatible = \"apple,j504\", \"apple,t8122\", \"apple,arm-platform\";\n+\tmodel = \"Apple MacBook Pro (14-inch, M3, 2023)\";\n+\n+\tled-controller {\n+\t\tcompatible = \"pwm-leds\";\n+\t\tled-0 {\n+\t\t\tpwms = <&fpwm1 0 40000>;\n+\t\t\tlabel = \"kbd_backlight\";\n+\t\t\tfunction = LED_FUNCTION_KBD_BACKLIGHT;\n+\t\t\tcolor = ;\n+\t\t\tmax-brightness = <255>;\n+\t\t\tdefault-state = \"keep\";\n+\t\t};\n+\t};\n+};\n+\n+&fpwm1 {\n+\tstatus = \"okay\";\n+};\n+\ndiff --git a/arch/arm64/boot/dts/apple/t8122-j613.dts b/arch/arm64/boot/dts/apple/t8122-j613.dts\nnew file mode 100644\nindex 000000000000..51894ea705e7\n--- /dev/null\n+++ b/arch/arm64/boot/dts/apple/t8122-j613.dts\n@@ -0,0 +1,35 @@\n+// SPDX-License-Identifier: GPL-2.0+ OR MIT\n+/*\n+ * Apple MacBook Air (13-inch, M3, 2024)\n+ *\n+ * target-type: J613\n+ *\n+ * Copyright The Asahi Linux Contributors\n+ */\n+\n+/dts-v1/;\n+\n+#include \"t8122.dtsi\"\n+#include \"t8122-jxxx.dtsi\"\n+#include \n+\n+/ {\n+\tcompatible = \"apple,j613\", \"apple,t8122\", \"apple,arm-platform\";\n+\tmodel = \"Apple MacBook Air (13-inch, M3, 2024)\";\n+\n+\tled-controller {\n+\t\tcompatible = \"pwm-leds\";\n+\t\tled-0 {\n+\t\t\tpwms = <&fpwm1 0 40000>;\n+\t\t\tlabel = \"kbd_backlight\";\n+\t\t\tfunction = LED_FUNCTION_KBD_BACKLIGHT;\n+\t\t\tcolor = ;\n+\t\t\tmax-brightness = <255>;\n+\t\t\tdefault-state = \"keep\";\n+\t\t};\n+\t};\n+};\n+\n+&fpwm1 {\n+\tstatus = \"okay\";\n+};\ndiff --git a/arch/arm64/boot/dts/apple/t8122-j615.dts b/arch/arm64/boot/dts/apple/t8122-j615.dts\nnew file mode 100644\nindex 000000000000..2a1970c1bc90\n--- /dev/null\n+++ b/arch/arm64/boot/dts/apple/t8122-j615.dts\n@@ -0,0 +1,35 @@\n+// SPDX-License-Identifier: GPL-2.0+ OR MIT\n+/*\n+ * Apple MacBook Air (15-inch, M3, 2024)\n+ *\n+ * target-type: J615\n+ *\n+ * Copyright The Asahi Linux Contributors\n+ */\n+\n+/dts-v1/;\n+\n+#include \"t8122.dtsi\"\n+#include \"t8122-jxxx.dtsi\"\n+#include \n+\n+/ {\n+\tcompatible = \"apple,j615\", \"apple,t8122\", \"apple,arm-platform\";\n+\tmodel = \"Apple MacBook Air (15-inch, M3, 2024)\";\n+\n+\tled-controller {\n+\t\tcompatible = \"pwm-leds\";\n+\t\tled-0 {\n+\t\t\tpwms = <&fpwm1 0 40000>;\n+\t\t\tlabel = \"kbd_backlight\";\n+\t\t\tfunction = LED_FUNCTION_KBD_BACKLIGHT;\n+\t\t\tcolor = ;\n+\t\t\tmax-brightness = <255>;\n+\t\t\tdefault-state = \"keep\";\n+\t\t};\n+\t};\n+};\n+\n+&fpwm1 {\n+\tstatus = \"okay\";\n+};\ndiff --git a/arch/arm64/boot/dts/apple/t8122-jxxx.dtsi b/arch/arm64/boot/dts/apple/t8122-jxxx.dtsi\nnew file mode 100644\nindex 000000000000..dd85f0c9fb1e\n--- /dev/null\n+++ b/arch/arm64/boot/dts/apple/t8122-jxxx.dtsi\n@@ -0,0 +1,48 @@\n+// SPDX-License-Identifier: GPL-2.0+ OR MIT\n+/*\n+ * Apple M3 MacBook Air/Pro and iMac (M3, 2023/2024)\n+ *\n+ * This file contains parts common to all Apple M3 devices using the t8122.\n+ *\n+ * target-type: J433, J434, J504, J613, J615\n+ *\n+ * Copyright The Asahi Linux Contributors\n+ */\n+\n+/ {\n+\taliases {\n+\t\tserial0 = &serial0;\n+\t};\n+\n+\tchosen {\n+\t\t#address-cells = <2>;\n+\t\t#size-cells = <2>;\n+\t\tranges;\n+\n+\t\tstdout-path = \"serial0\";\n+\n+\t\tframebuffer0: framebuffer@0 {\n+\t\t\tcompatible = \"apple,simple-framebuffer\", \"simple-framebuffer\";\n+\t\t\treg = <0 0 0 0>; /* To be filled by loader */\n+\t\t\tpower-domains = <&ps_disp_cpu>, <&ps_dptx_ext_phy>;\n+\t\t\t/* Format properties will be added by loader */\n+\t\t\tstatus = \"disabled\";\n+\t\t};\n+\t};\n+\n+\treserved-memory {\n+\t\t#address-cells = <2>;\n+\t\t#size-cells = <2>;\n+\t\tranges;\n+\t\t/* To be filled by loader */\n+\t};\n+\n+\tmemory@800000000 {\n+\t\tdevice_type = \"memory\";\n+\t\treg = <0x8 0 0x2 0>; /* To be filled by loader */\n+\t};\n+};\n+\n+&serial0 {\n+\tstatus = \"okay\";\n+};\ndiff --git a/arch/arm64/boot/dts/apple/t8122-pmgr.dtsi b/arch/arm64/boot/dts/apple/t8122-pmgr.dtsi\nnew file mode 100644\nindex 000000000000..64093792e0ad\n--- /dev/null\n+++ b/arch/arm64/boot/dts/apple/t8122-pmgr.dtsi\n@@ -0,0 +1,1149 @@\n+// SPDX-License-Identifier: GPL-2.0+ OR MIT\n+/*\n+ * PMGR Power domains for the Apple T8122 \"M3\" SoC\n+ *\n+ * Copyright The Asahi Linux Contributors\n+ */\n+\n+&pmgr {\n+\tps_sbr: power-controller@100 {\n+\t\tcompatible = \"apple,t8122-pmgr-pwrstate\", \"apple,t8103-pmgr-pwrstate\";\n+\t\treg = <0x100 4>;\n+\t\t#power-domain-cells = <0>;\n+\t\t#reset-cells = <0>;\n+\t\tlabel = \"sbr\";\n+\t\tapple,always-on; /* Core device */\n+\t};\n+\n+\tps_msg: power-controller@108 {\n+\t\tcompatible = \"apple,t8122-pmgr-pwrstate\", \"apple,t8103-pmgr-pwrstate\";\n+\t\treg = <0x108 4>;\n+\t\t#power-domain-cells = <0>;\n+\t\t#reset-cells = <0>;\n+\t\tlabel = \"msg\";\n+\t};\n+\n+\tps_aic: power-controller@110 {\n+\t\tcompatible = \"apple,t8122-pmgr-pwrstate\", \"apple,t8103-pmgr-pwrstate\";\n+\t\treg = <0x110 4>;\n+\t\t#power-domain-cells = <0>;\n+\t\t#reset-cells = <0>;\n+\t\tlabel = \"aic\";\n+\t\tapple,always-on; /* Core device */\n+\t};\n+\n+\tps_dwi: power-controller@118 {\n+\t\tcompatible = \"apple,t8122-pmgr-pwrstate\", \"apple,t8103-pmgr-pwrstate\";\n+\t\treg = <0x118 4>;\n+\t\t#power-domain-cells = <0>;\n+\t\t#reset-cells = <0>;\n+\t\tlabel = \"dwi\";\n+\t};\n+\n+\tps_gpio: power-controller@120 {\n+\t\tcompatible = \"apple,t8122-pmgr-pwrstate\", \"apple,t8103-pmgr-pwrstate\";\n+\t\treg = <0x120 4>;\n+\t\t#power-domain-cells = <0>;\n+\t\t#reset-cells = <0>;\n+\t\tlabel = \"gpio\";\n+\t};\n+\n+\tps_pms_busif: power-controller@128 {\n+\t\tcompatible = \"apple,t8122-pmgr-pwrstate\", \"apple,t8103-pmgr-pwrstate\";\n+\t\treg = <0x128 4>;\n+\t\t#power-domain-cells = <0>;\n+\t\t#reset-cells = <0>;\n+\t\tlabel = \"pms_busif\";\n+\t\tapple,always-on; /* Core device */\n+\t};\n+\n+\tps_pms: power-controller@130 {\n+\t\tcompatible = \"apple,t8122-pmgr-pwrstate\", \"apple,t8103-pmgr-pwrstate\";\n+\t\treg = <0x130 4>;\n+\t\t#power-domain-cells = <0>;\n+\t\t#reset-cells = <0>;\n+\t\tlabel = \"pms\";\n+\t\tapple,always-on; /* Core device */\n+\t};\n+\n+\tps_pms_fpwm0: power-controller@138 {\n+\t\tcompatible = \"apple,t8122-pmgr-pwrstate\", \"apple,t8103-pmgr-pwrstate\";\n+\t\treg = <0x138 4>;\n+\t\t#power-domain-cells = <0>;\n+\t\t#reset-cells = <0>;\n+\t\tlabel = \"pms_fpwm0\";\n+\t\tpower-domains = <&ps_pms>;\n+\t};\n+\n+\tps_pms_fpwm1: power-controller@140 {\n+\t\tcompatible = \"apple,t8122-pmgr-pwrstate\", \"apple,t8103-pmgr-pwrstate\";\n+\t\treg = <0x140 4>;\n+\t\t#power-domain-cells = <0>;\n+\t\t#reset-cells = <0>;\n+\t\tlabel = \"pms_fpwm1\";\n+\t\tpower-domains = <&ps_pms>;\n+\t};\n+\n+\tps_pms_fpwm2: power-controller@148 {\n+\t\tcompatible = \"apple,t8122-pmgr-pwrstate\", \"apple,t8103-pmgr-pwrstate\";\n+\t\treg = <0x148 4>;\n+\t\t#power-domain-cells = <0>;\n+\t\t#reset-cells = <0>;\n+\t\tlabel = \"pms_fpwm2\";\n+\t\tpower-domains = <&ps_pms>;\n+\t};\n+\n+\tps_pms_fpwm3: power-controller@150 {\n+\t\tcompatible = \"apple,t8122-pmgr-pwrstate\", \"apple,t8103-pmgr-pwrstate\";\n+\t\treg = <0x150 4>;\n+\t\t#power-domain-cells = <0>;\n+\t\t#reset-cells = <0>;\n+\t\tlabel = \"pms_fpwm3\";\n+\t\tpower-domains = <&ps_pms>;\n+\t};\n+\n+\tps_pms_fpwm4: power-controller@158 {\n+\t\tcompatible = \"apple,t8122-pmgr-pwrstate\", \"apple,t8103-pmgr-pwrstate\";\n+\t\treg = <0x158 4>;\n+\t\t#power-domain-cells = <0>;\n+\t\t#reset-cells = <0>;\n+\t\tlabel = \"pms_fpwm4\";\n+\t\tpower-domains = <&ps_pms>;\n+\t};\n+\n+\tps_pms_c1ppt: power-controller@160 {\n+\t\tcompatible = \"apple,t8122-pmgr-pwrstate\", \"apple,t8103-pmgr-pwrstate\";\n+\t\treg = <0x160 4>;\n+\t\t#power-domain-cells = <0>;\n+\t\t#reset-cells = <0>;\n+\t\tlabel = \"pms_c1ppt\";\n+\t};\n+\n+\tps_soc_rc: power-controller@168 {\n+\t\tcompatible = \"apple,t8122-pmgr-pwrstate\", \"apple,t8103-pmgr-pwrstate\";\n+\t\treg = <0x168 4>;\n+\t\t#power-domain-cells = <0>;\n+\t\t#reset-cells = <0>;\n+\t\tlabel = \"soc_rc\";\n+\t};\n+\n+\tps_soc_dpe: power-controller@170 {\n+\t\tcompatible = \"apple,t8122-pmgr-pwrstate\", \"apple,t8103-pmgr-pwrstate\";\n+\t\treg = <0x170 4>;\n+\t\t#power-domain-cells = <0>;\n+\t\t#reset-cells = <0>;\n+\t\tlabel = \"soc_dpe\";\n+\t\tapple,always-on;\n+\t};\n+\n+\tps_pmgr_soc_ocla: power-controller@178 {\n+\t\tcompatible = \"apple,t8122-pmgr-pwrstate\", \"apple,t8103-pmgr-pwrstate\";\n+\t\treg = <0x178 4>;\n+\t\t#power-domain-cells = <0>;\n+\t\t#reset-cells = <0>;\n+\t\tlabel = \"pmgr_soc_ocla\";\n+\t\tpower-domains = <&ps_pms>;\n+\t};\n+\n+\tps_ispsens0: power-controller@180 {\n+\t\tcompatible = \"apple,t8122-pmgr-pwrstate\", \"apple,t8103-pmgr-pwrstate\";\n+\t\treg = <0x180 4>;\n+\t\t#power-domain-cells = <0>;\n+\t\t#reset-cells = <0>;\n+\t\tlabel = \"ispsens0\";\n+\t};\n+\n+\tps_ispsens1: power-controller@188 {\n+\t\tcompatible = \"apple,t8122-pmgr-pwrstate\", \"apple,t8103-pmgr-pwrstate\";\n+\t\treg = <0x188 4>;\n+\t\t#power-domain-cells = <0>;\n+\t\t#reset-cells = <0>;\n+\t\tlabel = \"ispsens1\";\n+\t};\n+\n+\tps_ispsens2: power-controller@190 {\n+\t\tcompatible = \"apple,t8122-pmgr-pwrstate\", \"apple,t8103-pmgr-pwrstate\";\n+\t\treg = <0x190 4>;\n+\t\t#power-domain-cells = <0>;\n+\t\t#reset-cells = <0>;\n+\t\tlabel = \"ispsens2\";\n+\t};\n+\n+\tps_ispsens3: power-controller@198 {\n+\t\tcompatible = \"apple,t8122-pmgr-pwrstate\", \"apple,t8103-pmgr-pwrstate\";\n+\t\treg = <0x198 4>;\n+\t\t#power-domain-cells = <0>;\n+\t\t#reset-cells = <0>;\n+\t\tlabel = \"ispsens3\";\n+\t};\n+\n+\tps_aft0: power-controller@1a8 {\n+\t\tcompatible = \"apple,t8122-pmgr-pwrstate\", \"apple,t8103-pmgr-pwrstate\";\n+\t\treg = <0x1a8 4>;\n+\t\t#power-domain-cells = <0>;\n+\t\t#reset-cells = <0>;\n+\t\tlabel = \"aft0\";\n+\t};\n+\n+\tps_ioa0: power-controller@1b0 {\n+\t\tcompatible = \"apple,t8122-pmgr-pwrstate\", \"apple,t8103-pmgr-pwrstate\";\n+\t\treg = <0x1b0 4>;\n+\t\t#power-domain-cells = <0>;\n+\t\t#reset-cells = <0>;\n+\t\tlabel = \"ioa0\";\n+\t\tapple,always-on;\n+\t};\n+\n+\tps_ap_tmm: power-controller@1b8 {\n+\t\tcompatible = \"apple,t8122-pmgr-pwrstate\", \"apple,t8103-pmgr-pwrstate\";\n+\t\treg = <0x1b8 4>;\n+\t\t#power-domain-cells = <0>;\n+\t\t#reset-cells = <0>;\n+\t\tlabel = \"ap_tmm\";\n+\t};\n+\n+\tps_disp_sys: power-controller@1d8 {\n+\t\tcompatible = \"apple,t8122-pmgr-pwrstate\", \"apple,t8103-pmgr-pwrstate\";\n+\t\treg = <0x1d8 4>;\n+\t\t#power-domain-cells = <0>;\n+\t\t#reset-cells = <0>;\n+\t\tlabel = \"disp_sys\";\n+\t\tapple,always-on; /* TODO: figure out if we can enable PM here */\n+\t};\n+\n+\tps_gfx: power-controller@1e0 {\n+\t\tcompatible = \"apple,t8122-pmgr-pwrstate\", \"apple,t8103-pmgr-pwrstate\";\n+\t\treg = <0x1e0 4>;\n+\t\t#power-domain-cells = <0>;\n+\t\t#reset-cells = <0>;\n+\t\tlabel = \"gfx\";\n+\t};\n+\n+\tps_isp_sys: power-controller@1e8 {\n+\t\tcompatible = \"apple,t8122-pmgr-pwrstate\", \"apple,t8103-pmgr-pwrstate\";\n+\t\treg = <0x1e8 4>;\n+\t\t#power-domain-cells = <0>;\n+\t\t#reset-cells = <0>;\n+\t\tlabel = \"isp_sys\";\n+\t};\n+\n+\tps_avd_sys: power-controller@1f0 {\n+\t\tcompatible = \"apple,t8122-pmgr-pwrstate\", \"apple,t8103-pmgr-pwrstate\";\n+\t\treg = <0x1f0 4>;\n+\t\t#power-domain-cells = <0>;\n+\t\t#reset-cells = <0>;\n+\t\tlabel = \"avd_sys\";\n+\t};\n+\n+\tps_jpg: power-controller@200 {\n+\t\tcompatible = \"apple,t8122-pmgr-pwrstate\", \"apple,t8103-pmgr-pwrstate\";\n+\t\treg = <0x200 4>;\n+\t\t#power-domain-cells = <0>;\n+\t\t#reset-cells = <0>;\n+\t\tlabel = \"jpg\";\n+\t};\n+\n+\tps_disp_fe: power-controller@208 {\n+\t\tcompatible = \"apple,t8122-pmgr-pwrstate\", \"apple,t8103-pmgr-pwrstate\";\n+\t\treg = <0x208 4>;\n+\t\t#power-domain-cells = <0>;\n+\t\t#reset-cells = <0>;\n+\t\tlabel = \"disp_fe\";\n+\t\tpower-domains = <&ps_disp_sys>;\n+\t\tapple,always-on; /* TODO: figure out if we can enable PM here */\n+\t};\n+\n+\tps_sio_cpu: power-controller@210 {\n+\t\tcompatible = \"apple,t8122-pmgr-pwrstate\", \"apple,t8103-pmgr-pwrstate\";\n+\t\treg = <0x210 4>;\n+\t\t#power-domain-cells = <0>;\n+\t\t#reset-cells = <0>;\n+\t\tlabel = \"sio_cpu\";\n+\t};\n+\n+\tps_fpwm0: power-controller@218 {\n+\t\tcompatible = \"apple,t8122-pmgr-pwrstate\", \"apple,t8103-pmgr-pwrstate\";\n+\t\treg = <0x218 4>;\n+\t\t#power-domain-cells = <0>;\n+\t\t#reset-cells = <0>;\n+\t\tlabel = \"fpwm0\";\n+\t};\n+\n+\tps_fpwm1: power-controller@220 {\n+\t\tcompatible = \"apple,t8122-pmgr-pwrstate\", \"apple,t8103-pmgr-pwrstate\";\n+\t\treg = <0x220 4>;\n+\t\t#power-domain-cells = <0>;\n+\t\t#reset-cells = <0>;\n+\t\tlabel = \"fpwm1\";\n+\t};\n+\n+\tps_fpwm2: power-controller@228 {\n+\t\tcompatible = \"apple,t8122-pmgr-pwrstate\", \"apple,t8103-pmgr-pwrstate\";\n+\t\treg = <0x228 4>;\n+\t\t#power-domain-cells = <0>;\n+\t\t#reset-cells = <0>;\n+\t\tlabel = \"fpwm2\";\n+\t};\n+\n+\tps_i2c0: power-controller@230 {\n+\t\tcompatible = \"apple,t8122-pmgr-pwrstate\", \"apple,t8103-pmgr-pwrstate\";\n+\t\treg = <0x230 4>;\n+\t\t#power-domain-cells = <0>;\n+\t\t#reset-cells = <0>;\n+\t\tlabel = \"i2c0\";\n+\t};\n+\n+\tps_i2c1: power-controller@238 {\n+\t\tcompatible = \"apple,t8122-pmgr-pwrstate\", \"apple,t8103-pmgr-pwrstate\";\n+\t\treg = <0x238 4>;\n+\t\t#power-domain-cells = <0>;\n+\t\t#reset-cells = <0>;\n+\t\tlabel = \"i2c1\";\n+\t};\n+\n+\tps_i2c2: power-controller@240 {\n+\t\tcompatible = \"apple,t8122-pmgr-pwrstate\", \"apple,t8103-pmgr-pwrstate\";\n+\t\treg = <0x240 4>;\n+\t\t#power-domain-cells = <0>;\n+\t\t#reset-cells = <0>;\n+\t\tlabel = \"i2c2\";\n+\t};\n+\n+\tps_i2c3: power-controller@248 {\n+\t\tcompatible = \"apple,t8122-pmgr-pwrstate\", \"apple,t8103-pmgr-pwrstate\";\n+\t\treg = <0x248 4>;\n+\t\t#power-domain-cells = <0>;\n+\t\t#reset-cells = <0>;\n+\t\tlabel = \"i2c3\";\n+\t};\n+\n+\tps_i2c4: power-controller@250 {\n+\t\tcompatible = \"apple,t8122-pmgr-pwrstate\", \"apple,t8103-pmgr-pwrstate\";\n+\t\treg = <0x250 4>;\n+\t\t#power-domain-cells = <0>;\n+\t\t#reset-cells = <0>;\n+\t\tlabel = \"i2c4\";\n+\t};\n+\n+\tps_i2c5: power-controller@258 {\n+\t\tcompatible = \"apple,t8122-pmgr-pwrstate\", \"apple,t8103-pmgr-pwrstate\";\n+\t\treg = <0x258 4>;\n+\t\t#power-domain-cells = <0>;\n+\t\t#reset-cells = <0>;\n+\t\tlabel = \"i2c5\";\n+\t};\n+\n+\tps_i2c6: power-controller@260 {\n+\t\tcompatible = \"apple,t8122-pmgr-pwrstate\", \"apple,t8103-pmgr-pwrstate\";\n+\t\treg = <0x260 4>;\n+\t\t#power-domain-cells = <0>;\n+\t\t#reset-cells = <0>;\n+\t\tlabel = \"i2c6\";\n+\t};\n+\n+\tps_i2c7: power-controller@268 {\n+\t\tcompatible = \"apple,t8122-pmgr-pwrstate\", \"apple,t8103-pmgr-pwrstate\";\n+\t\treg = <0x268 4>;\n+\t\t#power-domain-cells = <0>;\n+\t\t#reset-cells = <0>;\n+\t\tlabel = \"i2c7\";\n+\t};\n+\n+\tps_i2c8: power-controller@270 {\n+\t\tcompatible = \"apple,t8122-pmgr-pwrstate\", \"apple,t8103-pmgr-pwrstate\";\n+\t\treg = <0x270 4>;\n+\t\t#power-domain-cells = <0>;\n+\t\t#reset-cells = <0>;\n+\t\tlabel = \"i2c8\";\n+\t};\n+\n+\tps_spi_p: power-controller@278 {\n+\t\tcompatible = \"apple,t8122-pmgr-pwrstate\", \"apple,t8103-pmgr-pwrstate\";\n+\t\treg = <0x278 4>;\n+\t\t#power-domain-cells = <0>;\n+\t\t#reset-cells = <0>;\n+\t\tlabel = \"spi_p\";\n+\t};\n+\n+\tps_uart_p: power-controller@280 {\n+\t\tcompatible = \"apple,t8122-pmgr-pwrstate\", \"apple,t8103-pmgr-pwrstate\";\n+\t\treg = <0x280 4>;\n+\t\t#power-domain-cells = <0>;\n+\t\t#reset-cells = <0>;\n+\t\tlabel = \"uart_p\";\n+\t};\n+\n+\tps_audio_p: power-controller@288 {\n+\t\tcompatible = \"apple,t8122-pmgr-pwrstate\", \"apple,t8103-pmgr-pwrstate\";\n+\t\treg = <0x288 4>;\n+\t\t#power-domain-cells = <0>;\n+\t\t#reset-cells = <0>;\n+\t\tlabel = \"audio_p\";\n+\t};\n+\n+\tps_aes: power-controller@290 {\n+\t\tcompatible = \"apple,t8122-pmgr-pwrstate\", \"apple,t8103-pmgr-pwrstate\";\n+\t\treg = <0x290 4>;\n+\t\t#power-domain-cells = <0>;\n+\t\t#reset-cells = <0>;\n+\t\tlabel = \"aes\";\n+\t};\n+\n+\tps_spi0: power-controller@298 {\n+\t\tcompatible = \"apple,t8122-pmgr-pwrstate\", \"apple,t8103-pmgr-pwrstate\";\n+\t\treg = <0x298 4>;\n+\t\t#power-domain-cells = <0>;\n+\t\t#reset-cells = <0>;\n+\t\tlabel = \"spi0\";\n+\t\tpower-domains = <&ps_spi_p>;\n+\t};\n+\n+\tps_spi1: power-controller@2a0 {\n+\t\tcompatible = \"apple,t8122-pmgr-pwrstate\", \"apple,t8103-pmgr-pwrstate\";\n+\t\treg = <0x2a0 4>;\n+\t\t#power-domain-cells = <0>;\n+\t\t#reset-cells = <0>;\n+\t\tlabel = \"spi1\";\n+\t\tpower-domains = <&ps_spi_p>;\n+\t};\n+\n+\tps_spi2: power-controller@2a8 {\n+\t\tcompatible = \"apple,t8122-pmgr-pwrstate\", \"apple,t8103-pmgr-pwrstate\";\n+\t\treg = <0x2a8 4>;\n+\t\t#power-domain-cells = <0>;\n+\t\t#reset-cells = <0>;\n+\t\tlabel = \"spi2\";\n+\t\tpower-domains = <&ps_spi_p>;\n+\t};\n+\n+\tps_spi3: power-controller@2b0 {\n+\t\tcompatible = \"apple,t8122-pmgr-pwrstate\", \"apple,t8103-pmgr-pwrstate\";\n+\t\treg = <0x2b0 4>;\n+\t\t#power-domain-cells = <0>;\n+\t\t#reset-cells = <0>;\n+\t\tlabel = \"spi3\";\n+\t\tpower-domains = <&ps_spi_p>;\n+\t};\n+\n+\tps_spi4: power-controller@2b8 {\n+\t\tcompatible = \"apple,t8122-pmgr-pwrstate\", \"apple,t8103-pmgr-pwrstate\";\n+\t\treg = <0x2b8 4>;\n+\t\t#power-domain-cells = <0>;\n+\t\t#reset-cells = <0>;\n+\t\tlabel = \"spi4\";\n+\t\tpower-domains = <&ps_spi_p>;\n+\t};\n+\n+\tps_spi5: power-controller@2c0 {\n+\t\tcompatible = \"apple,t8122-pmgr-pwrstate\", \"apple,t8103-pmgr-pwrstate\";\n+\t\treg = <0x2c0 4>;\n+\t\t#power-domain-cells = <0>;\n+\t\t#reset-cells = <0>;\n+\t\tlabel = \"spi5\";\n+\t\tpower-domains = <&ps_spi_p>;\n+\t};\n+\n+\tps_qspi: power-controller@2c8 {\n+\t\tcompatible = \"apple,t8122-pmgr-pwrstate\", \"apple,t8103-pmgr-pwrstate\";\n+\t\treg = <0x2c8 4>;\n+\t\t#power-domain-cells = <0>;\n+\t\t#reset-cells = <0>;\n+\t\tlabel = \"qspi\";\n+\t\tpower-domains = <&ps_spi_p>;\n+\t};\n+\n+\tps_uart_n: power-controller@2d0 {\n+\t\tcompatible = \"apple,t8122-pmgr-pwrstate\", \"apple,t8103-pmgr-pwrstate\";\n+\t\treg = <0x2d0 4>;\n+\t\t#power-domain-cells = <0>;\n+\t\t#reset-cells = <0>;\n+\t\tlabel = \"uart_n\";\n+\t\tpower-domains = <&ps_uart_p>;\n+\t};\n+\n+\tps_uart0: power-controller@2d8 {\n+\t\tcompatible = \"apple,t8122-pmgr-pwrstate\", \"apple,t8103-pmgr-pwrstate\";\n+\t\treg = <0x2d8 4>;\n+\t\t#power-domain-cells = <0>;\n+\t\t#reset-cells = <0>;\n+\t\tlabel = \"uart0\";\n+\t\tpower-domains = <&ps_uart_p>;\n+\t};\n+\n+\tps_uart1: power-controller@2e0 {\n+\t\tcompatible = \"apple,t8122-pmgr-pwrstate\", \"apple,t8103-pmgr-pwrstate\";\n+\t\treg = <0x2e0 4>;\n+\t\t#power-domain-cells = <0>;\n+\t\t#reset-cells = <0>;\n+\t\tlabel = \"uart1\";\n+\t\tpower-domains = <&ps_uart_p>;\n+\t};\n+\n+\tps_uart2: power-controller@2e8 {\n+\t\tcompatible = \"apple,t8122-pmgr-pwrstate\", \"apple,t8103-pmgr-pwrstate\";\n+\t\treg = <0x2e8 4>;\n+\t\t#power-domain-cells = <0>;\n+\t\t#reset-cells = <0>;\n+\t\tlabel = \"uart2\";\n+\t\tpower-domains = <&ps_uart_p>;\n+\t};\n+\n+\tps_uart3: power-controller@2f0 {\n+\t\tcompatible = \"apple,t8122-pmgr-pwrstate\", \"apple,t8103-pmgr-pwrstate\";\n+\t\treg = <0x2f0 4>;\n+\t\t#power-domain-cells = <0>;\n+\t\t#reset-cells = <0>;\n+\t\tlabel = \"uart3\";\n+\t\tpower-domains = <&ps_uart_p>;\n+\t};\n+\n+\tps_uart4: power-controller@2f8 {\n+\t\tcompatible = \"apple,t8122-pmgr-pwrstate\", \"apple,t8103-pmgr-pwrstate\";\n+\t\treg = <0x2f8 4>;\n+\t\t#power-domain-cells = <0>;\n+\t\t#reset-cells = <0>;\n+\t\tlabel = \"uart4\";\n+\t\tpower-domains = <&ps_uart_p>;\n+\t};\n+\n+\tps_uart5: power-controller@300 {\n+\t\tcompatible = \"apple,t8122-pmgr-pwrstate\", \"apple,t8103-pmgr-pwrstate\";\n+\t\treg = <0x300 4>;\n+\t\t#power-domain-cells = <0>;\n+\t\t#reset-cells = <0>;\n+\t\tlabel = \"uart5\";\n+\t\tpower-domains = <&ps_uart_p>;\n+\t};\n+\n+\tps_uart6: power-controller@308 {\n+\t\tcompatible = \"apple,t8122-pmgr-pwrstate\", \"apple,t8103-pmgr-pwrstate\";\n+\t\treg = <0x308 4>;\n+\t\t#power-domain-cells = <0>;\n+\t\t#reset-cells = <0>;\n+\t\tlabel = \"uart6\";\n+\t\tpower-domains = <&ps_uart_p>;\n+\t};\n+\n+\tps_sio_adma: power-controller@310 {\n+\t\tcompatible = \"apple,t8122-pmgr-pwrstate\", \"apple,t8103-pmgr-pwrstate\";\n+\t\treg = <0x310 4>;\n+\t\t#power-domain-cells = <0>;\n+\t\t#reset-cells = <0>;\n+\t\tlabel = \"sio_adma\";\n+\t\tpower-domains = <&ps_fpwm0>;\n+\t};\n+\n+\tps_dpa0: power-controller@318 {\n+\t\tcompatible = \"apple,t8122-pmgr-pwrstate\", \"apple,t8103-pmgr-pwrstate\";\n+\t\treg = <0x318 4>;\n+\t\t#power-domain-cells = <0>;\n+\t\t#reset-cells = <0>;\n+\t\tlabel = \"dpa0\";\n+\t\tpower-domains = <&ps_audio_p>;\n+\t};\n+\n+\tps_dcs0: power-controller@330 {\n+\t\tcompatible = \"apple,t8122-pmgr-pwrstate\", \"apple,t8103-pmgr-pwrstate\";\n+\t\treg = <0x330 4>;\n+\t\t#power-domain-cells = <0>;\n+\t\t#reset-cells = <0>;\n+\t\tlabel = \"dcs0\";\n+\t\tapple,always-on;\n+\t};\n+\n+\tps_dcs2: power-controller@338 {\n+\t\tcompatible = \"apple,t8122-pmgr-pwrstate\", \"apple,t8103-pmgr-pwrstate\";\n+\t\treg = <0x338 4>;\n+\t\t#power-domain-cells = <0>;\n+\t\t#reset-cells = <0>;\n+\t\tlabel = \"dcs2\";\n+\t\tapple,always-on;\n+\t};\n+\n+\tps_dcs1: power-controller@340 {\n+\t\tcompatible = \"apple,t8122-pmgr-pwrstate\", \"apple,t8103-pmgr-pwrstate\";\n+\t\treg = <0x340 4>;\n+\t\t#power-domain-cells = <0>;\n+\t\t#reset-cells = <0>;\n+\t\tlabel = \"dcs1\";\n+\t\tapple,always-on;\n+\t};\n+\n+\tps_dcs3: power-controller@348 {\n+\t\tcompatible = \"apple,t8122-pmgr-pwrstate\", \"apple,t8103-pmgr-pwrstate\";\n+\t\treg = <0x348 4>;\n+\t\t#power-domain-cells = <0>;\n+\t\t#reset-cells = <0>;\n+\t\tlabel = \"dcs3\";\n+\t\tapple,always-on;\n+\t};\n+\n+\tps_dcs4: power-controller@358 {\n+\t\tcompatible = \"apple,t8122-pmgr-pwrstate\", \"apple,t8103-pmgr-pwrstate\";\n+\t\treg = <0x358 4>;\n+\t\t#power-domain-cells = <0>;\n+\t\t#reset-cells = <0>;\n+\t\tlabel = \"dcs4\";\n+\t\tapple,always-on;\n+\t};\n+\n+\tps_dcs5: power-controller@360 {\n+\t\tcompatible = \"apple,t8122-pmgr-pwrstate\", \"apple,t8103-pmgr-pwrstate\";\n+\t\treg = <0x360 4>;\n+\t\t#power-domain-cells = <0>;\n+\t\t#reset-cells = <0>;\n+\t\tlabel = \"dcs5\";\n+\t\tapple,always-on;\n+\t};\n+\n+\tps_dcs6: power-controller@368 {\n+\t\tcompatible = \"apple,t8122-pmgr-pwrstate\", \"apple,t8103-pmgr-pwrstate\";\n+\t\treg = <0x368 4>;\n+\t\t#power-domain-cells = <0>;\n+\t\t#reset-cells = <0>;\n+\t\tlabel = \"dcs6\";\n+\t\tapple,always-on;\n+\t};\n+\n+\tps_dcs7: power-controller@370 {\n+\t\tcompatible = \"apple,t8122-pmgr-pwrstate\", \"apple,t8103-pmgr-pwrstate\";\n+\t\treg = <0x370 4>;\n+\t\t#power-domain-cells = <0>;\n+\t\t#reset-cells = <0>;\n+\t\tlabel = \"dcs7\";\n+\t\tapple,always-on;\n+\t};\n+\n+\tps_dpa1: power-controller@378 {\n+\t\tcompatible = \"apple,t8122-pmgr-pwrstate\", \"apple,t8103-pmgr-pwrstate\";\n+\t\treg = <0x378 4>;\n+\t\t#power-domain-cells = <0>;\n+\t\t#reset-cells = <0>;\n+\t\tlabel = \"dpa1\";\n+\t\tpower-domains = <&ps_audio_p>;\n+\t};\n+\n+\tps_dpa2: power-controller@380 {\n+\t\tcompatible = \"apple,t8122-pmgr-pwrstate\", \"apple,t8103-pmgr-pwrstate\";\n+\t\treg = <0x380 4>;\n+\t\t#power-domain-cells = <0>;\n+\t\t#reset-cells = <0>;\n+\t\tlabel = \"dpa2\";\n+\t\tpower-domains = <&ps_audio_p>;\n+\t};\n+\n+\tps_dpa3: power-controller@388 {\n+\t\tcompatible = \"apple,t8122-pmgr-pwrstate\", \"apple,t8103-pmgr-pwrstate\";\n+\t\treg = <0x388 4>;\n+\t\t#power-domain-cells = <0>;\n+\t\t#reset-cells = <0>;\n+\t\tlabel = \"dpa3\";\n+\t\tpower-domains = <&ps_audio_p>;\n+\t};\n+\n+\tps_dpa4: power-controller@390 {\n+\t\tcompatible = \"apple,t8122-pmgr-pwrstate\", \"apple,t8103-pmgr-pwrstate\";\n+\t\treg = <0x390 4>;\n+\t\t#power-domain-cells = <0>;\n+\t\t#reset-cells = <0>;\n+\t\tlabel = \"dpa4\";\n+\t\tpower-domains = <&ps_audio_p>;\n+\t};\n+\n+\tps_mca0: power-controller@398 {\n+\t\tcompatible = \"apple,t8122-pmgr-pwrstate\", \"apple,t8103-pmgr-pwrstate\";\n+\t\treg = <0x398 4>;\n+\t\t#power-domain-cells = <0>;\n+\t\t#reset-cells = <0>;\n+\t\tlabel = \"mca0\";\n+\t\tpower-domains = <&ps_sio_adma>, <&ps_audio_p>;\n+\t};\n+\n+\tps_mca1: power-controller@3a0 {\n+\t\tcompatible = \"apple,t8122-pmgr-pwrstate\", \"apple,t8103-pmgr-pwrstate\";\n+\t\treg = <0x3a0 4>;\n+\t\t#power-domain-cells = <0>;\n+\t\t#reset-cells = <0>;\n+\t\tlabel = \"mca1\";\n+\t\tpower-domains = <&ps_sio_adma>, <&ps_audio_p>;\n+\t};\n+\n+\tps_mca2: power-controller@3a8 {\n+\t\tcompatible = \"apple,t8122-pmgr-pwrstate\", \"apple,t8103-pmgr-pwrstate\";\n+\t\treg = <0x3a8 4>;\n+\t\t#power-domain-cells = <0>;\n+\t\t#reset-cells = <0>;\n+\t\tlabel = \"mca2\";\n+\t\tpower-domains = <&ps_sio_adma>, <&ps_audio_p>;\n+\t};\n+\n+\tps_trace_fab: power-controller@3b0 {\n+\t\tcompatible = \"apple,t8122-pmgr-pwrstate\", \"apple,t8103-pmgr-pwrstate\";\n+\t\treg = <0x3b0 4>;\n+\t\t#power-domain-cells = <0>;\n+\t\t#reset-cells = <0>;\n+\t\tlabel = \"trace_fab\";\n+\t};\n+\n+\tps_mca3: power-controller@3b8 {\n+\t\tcompatible = \"apple,t8122-pmgr-pwrstate\", \"apple,t8103-pmgr-pwrstate\";\n+\t\treg = <0x3b8 4>;\n+\t\t#power-domain-cells = <0>;\n+\t\t#reset-cells = <0>;\n+\t\tlabel = \"mca3\";\n+\t\tpower-domains = <&ps_sio_adma>, <&ps_audio_p>;\n+\t};\n+\n+\tps_ioa1: power-controller@3c0 {\n+\t\tcompatible = \"apple,t8122-pmgr-pwrstate\", \"apple,t8103-pmgr-pwrstate\";\n+\t\treg = <0x3c0 4>;\n+\t\t#power-domain-cells = <0>;\n+\t\t#reset-cells = <0>;\n+\t\tlabel = \"ioa1\";\n+\t\tapple,always-on;\n+\t};\n+\n+\tps_apcie: power-controller@3f0 {\n+\t\tcompatible = \"apple,t8122-pmgr-pwrstate\", \"apple,t8103-pmgr-pwrstate\";\n+\t\treg = <0x3f0 4>;\n+\t\t#power-domain-cells = <0>;\n+\t\t#reset-cells = <0>;\n+\t\tlabel = \"apcie\";\n+\t};\n+\n+\tps_ans: power-controller@3f8 {\n+\t\tcompatible = \"apple,t8122-pmgr-pwrstate\", \"apple,t8103-pmgr-pwrstate\";\n+\t\treg = <0x3f8 4>;\n+\t\t#power-domain-cells = <0>;\n+\t\t#reset-cells = <0>;\n+\t\tlabel = \"ans\";\n+\t};\n+\n+\tps_atc0_common: power-controller@400 {\n+\t\tcompatible = \"apple,t8122-pmgr-pwrstate\", \"apple,t8103-pmgr-pwrstate\";\n+\t\treg = <0x400 4>;\n+\t\t#power-domain-cells = <0>;\n+\t\t#reset-cells = <0>;\n+\t\tlabel = \"atc0_common\";\n+\t};\n+\n+\tps_atc1_common: power-controller@408 {\n+\t\tcompatible = \"apple,t8122-pmgr-pwrstate\", \"apple,t8103-pmgr-pwrstate\";\n+\t\treg = <0x408 4>;\n+\t\t#power-domain-cells = <0>;\n+\t\t#reset-cells = <0>;\n+\t\tlabel = \"atc1_common\";\n+\t};\n+\n+\tps_dispext_sys: power-controller@410 {\n+\t\tcompatible = \"apple,t8122-pmgr-pwrstate\", \"apple,t8103-pmgr-pwrstate\";\n+\t\treg = <0x410 4>;\n+\t\t#power-domain-cells = <0>;\n+\t\t#reset-cells = <0>;\n+\t\tlabel = \"dispext_sys\";\n+\t};\n+\n+\tps_venc_sys: power-controller@418 {\n+\t\tcompatible = \"apple,t8122-pmgr-pwrstate\", \"apple,t8103-pmgr-pwrstate\";\n+\t\treg = <0x418 4>;\n+\t\t#power-domain-cells = <0>;\n+\t\t#reset-cells = <0>;\n+\t\tlabel = \"venc_sys\";\n+\t};\n+\n+\tps_scodec: power-controller@420 {\n+\t\tcompatible = \"apple,t8122-pmgr-pwrstate\", \"apple,t8103-pmgr-pwrstate\";\n+\t\treg = <0x420 4>;\n+\t\t#power-domain-cells = <0>;\n+\t\t#reset-cells = <0>;\n+\t\tlabel = \"scodec\";\n+\t};\n+\n+\tps_msr: power-controller@428 {\n+\t\tcompatible = \"apple,t8122-pmgr-pwrstate\", \"apple,t8103-pmgr-pwrstate\";\n+\t\treg = <0x428 4>;\n+\t\t#power-domain-cells = <0>;\n+\t\t#reset-cells = <0>;\n+\t\tlabel = \"msr\";\n+\t\tpower-domains = <&ps_aft0>;\n+\t};\n+\n+\tps_dptx_ext_phy: power-controller@430 {\n+\t\tcompatible = \"apple,t8122-pmgr-pwrstate\", \"apple,t8103-pmgr-pwrstate\";\n+\t\treg = <0x430 4>;\n+\t\t#power-domain-cells = <0>;\n+\t\t#reset-cells = <0>;\n+\t\tlabel = \"dptx_ext_phy\";\n+\t};\n+\n+\tps_ane_sys: power-controller@438 {\n+\t\tcompatible = \"apple,t8122-pmgr-pwrstate\", \"apple,t8103-pmgr-pwrstate\";\n+\t\treg = <0x438 4>;\n+\t\t#power-domain-cells = <0>;\n+\t\t#reset-cells = <0>;\n+\t\tlabel = \"ane_sys\";\n+\t};\n+\n+\tps_apcie_gp: power-controller@440 {\n+\t\tcompatible = \"apple,t8122-pmgr-pwrstate\", \"apple,t8103-pmgr-pwrstate\";\n+\t\treg = <0x440 4>;\n+\t\t#power-domain-cells = <0>;\n+\t\t#reset-cells = <0>;\n+\t\tlabel = \"apcie_gp\";\n+\t\tpower-domains = <&ps_apcie>;\n+\t};\n+\n+\tps_apcie_st: power-controller@448 {\n+\t\tcompatible = \"apple,t8122-pmgr-pwrstate\", \"apple,t8103-pmgr-pwrstate\";\n+\t\treg = <0x448 4>;\n+\t\t#power-domain-cells = <0>;\n+\t\t#reset-cells = <0>;\n+\t\tlabel = \"apcie_st\";\n+\t\tpower-domains = <&ps_ans>, <&ps_apcie>;\n+\t};\n+\n+\tps_pmp: power-controller@450 {\n+\t\tcompatible = \"apple,t8122-pmgr-pwrstate\", \"apple,t8103-pmgr-pwrstate\";\n+\t\treg = <0x450 4>;\n+\t\t#power-domain-cells = <0>;\n+\t\t#reset-cells = <0>;\n+\t\tlabel = \"pmp\";\n+\t\tapple,always-on;\n+\t};\n+\n+\tps_pms_sram: power-controller@458 {\n+\t\tcompatible = \"apple,t8122-pmgr-pwrstate\", \"apple,t8103-pmgr-pwrstate\";\n+\t\treg = <0x458 4>;\n+\t\t#power-domain-cells = <0>;\n+\t\t#reset-cells = <0>;\n+\t\tlabel = \"pms_sram\";\n+\t\tapple,always-on;\n+\t};\n+\n+\tps_atc0_pcie: power-controller@460 {\n+\t\tcompatible = \"apple,t8122-pmgr-pwrstate\", \"apple,t8103-pmgr-pwrstate\";\n+\t\treg = <0x460 4>;\n+\t\t#power-domain-cells = <0>;\n+\t\t#reset-cells = <0>;\n+\t\tlabel = \"atc0_pcie\";\n+\t\tpower-domains = <&ps_atc0_common>;\n+\t};\n+\n+\tps_atc0_cio: power-controller@468 {\n+\t\tcompatible = \"apple,t8122-pmgr-pwrstate\", \"apple,t8103-pmgr-pwrstate\";\n+\t\treg = <0x468 4>;\n+\t\t#power-domain-cells = <0>;\n+\t\t#reset-cells = <0>;\n+\t\tlabel = \"atc0_cio\";\n+\t\tpower-domains = <&ps_atc0_common>;\n+\t};\n+\n+\tps_atc1_pcie: power-controller@470 {\n+\t\tcompatible = \"apple,t8122-pmgr-pwrstate\", \"apple,t8103-pmgr-pwrstate\";\n+\t\treg = <0x470 4>;\n+\t\t#power-domain-cells = <0>;\n+\t\t#reset-cells = <0>;\n+\t\tlabel = \"atc1_pcie\";\n+\t\tpower-domains = <&ps_atc1_common>;\n+\t};\n+\n+\tps_atc1_cio: power-controller@478 {\n+\t\tcompatible = \"apple,t8122-pmgr-pwrstate\", \"apple,t8103-pmgr-pwrstate\";\n+\t\treg = <0x478 4>;\n+\t\t#power-domain-cells = <0>;\n+\t\t#reset-cells = <0>;\n+\t\tlabel = \"atc1_cio\";\n+\t\tpower-domains = <&ps_atc1_common>;\n+\t};\n+\n+\tps_dispext_fe: power-controller@480 {\n+\t\tcompatible = \"apple,t8122-pmgr-pwrstate\", \"apple,t8103-pmgr-pwrstate\";\n+\t\treg = <0x480 4>;\n+\t\t#power-domain-cells = <0>;\n+\t\t#reset-cells = <0>;\n+\t\tlabel = \"dispext_fe\";\n+\t\tpower-domains = <&ps_dispext_sys>;\n+\t};\n+\n+\tps_dispext_cpu: power-controller@488 {\n+\t\tcompatible = \"apple,t8122-pmgr-pwrstate\", \"apple,t8103-pmgr-pwrstate\";\n+\t\treg = <0x488 4>;\n+\t\t#power-domain-cells = <0>;\n+\t\t#reset-cells = <0>;\n+\t\tlabel = \"dispext_cpu\";\n+\t\tpower-domains = <&ps_dispext_fe>;\n+\t\tapple,min-state = <4>;\n+\t};\n+\n+\tps_scodec_stream: power-controller@490 {\n+\t\tcompatible = \"apple,t8122-pmgr-pwrstate\", \"apple,t8103-pmgr-pwrstate\";\n+\t\treg = <0x490 4>;\n+\t\t#power-domain-cells = <0>;\n+\t\t#reset-cells = <0>;\n+\t\tlabel = \"scodec_stream\";\n+\t\tpower-domains = <&ps_scodec>;\n+\t};\n+\n+\tps_msr_ase_core: power-controller@498 {\n+\t\tcompatible = \"apple,t8122-pmgr-pwrstate\", \"apple,t8103-pmgr-pwrstate\";\n+\t\treg = <0x498 4>;\n+\t\t#power-domain-cells = <0>;\n+\t\t#reset-cells = <0>;\n+\t\tlabel = \"msr_ase_core\";\n+\t\tpower-domains = <&ps_msr>;\n+\t};\n+\n+\tps_apcie_phy_sw: power-controller@4a0 {\n+\t\tcompatible = \"apple,t8122-pmgr-pwrstate\", \"apple,t8103-pmgr-pwrstate\";\n+\t\treg = <0x4a0 4>;\n+\t\t#power-domain-cells = <0>;\n+\t\t#reset-cells = <0>;\n+\t\tlabel = \"apcie_phy_sw\";\n+\t\tpower-domains = <&ps_apcie_st>, <&ps_apcie_gp>;\n+\t};\n+\n+\tps_atc0_cio_pcie: power-controller@4a8 {\n+\t\tcompatible = \"apple,t8122-pmgr-pwrstate\", \"apple,t8103-pmgr-pwrstate\";\n+\t\treg = <0x4a8 4>;\n+\t\t#power-domain-cells = <0>;\n+\t\t#reset-cells = <0>;\n+\t\tlabel = \"atc0_cio_pcie\";\n+\t\tpower-domains = <&ps_atc0_cio>;\n+\t};\n+\n+\tps_atc0_cio_usb: power-controller@4b0 {\n+\t\tcompatible = \"apple,t8122-pmgr-pwrstate\", \"apple,t8103-pmgr-pwrstate\";\n+\t\treg = <0x4b0 4>;\n+\t\t#power-domain-cells = <0>;\n+\t\t#reset-cells = <0>;\n+\t\tlabel = \"atc0_cio_usb\";\n+\t\tpower-domains = <&ps_atc0_cio>;\n+\t};\n+\n+\tps_atc1_cio_pcie: power-controller@4b8 {\n+\t\tcompatible = \"apple,t8122-pmgr-pwrstate\", \"apple,t8103-pmgr-pwrstate\";\n+\t\treg = <0x4b8 4>;\n+\t\t#power-domain-cells = <0>;\n+\t\t#reset-cells = <0>;\n+\t\tlabel = \"atc1_cio_pcie\";\n+\t\tpower-domains = <&ps_atc1_cio>;\n+\t};\n+\n+\tps_atc1_cio_usb: power-controller@4c0 {\n+\t\tcompatible = \"apple,t8122-pmgr-pwrstate\", \"apple,t8103-pmgr-pwrstate\";\n+\t\treg = <0x4c0 4>;\n+\t\t#power-domain-cells = <0>;\n+\t\t#reset-cells = <0>;\n+\t\tlabel = \"atc1_cio_usb\";\n+\t\tpower-domains = <&ps_atc1_cio>;\n+\t};\n+\n+\tps_sep: power-controller@c00 {\n+\t\tcompatible = \"apple,t8122-pmgr-pwrstate\", \"apple,t8103-pmgr-pwrstate\";\n+\t\treg = <0xc00 4>;\n+\t\t#power-domain-cells = <0>;\n+\t\t#reset-cells = <0>;\n+\t\tlabel = \"sep\";\n+\t\tapple,always-on;\n+\t};\n+\n+\tps_venc_dma: power-controller@8000 {\n+\t\tcompatible = \"apple,t8122-pmgr-pwrstate\", \"apple,t8103-pmgr-pwrstate\";\n+\t\treg = <0x8000 4>;\n+\t\t#power-domain-cells = <0>;\n+\t\t#reset-cells = <0>;\n+\t\tlabel = \"venc_dma\";\n+\t\tpower-domains = <&ps_venc_sys>;\n+\t};\n+\n+\tps_venc_pipe4: power-controller@8008 {\n+\t\tcompatible = \"apple,t8122-pmgr-pwrstate\", \"apple,t8103-pmgr-pwrstate\";\n+\t\treg = <0x8008 4>;\n+\t\t#power-domain-cells = <0>;\n+\t\t#reset-cells = <0>;\n+\t\tlabel = \"venc_pipe4\";\n+\t\tpower-domains = <&ps_venc_dma>;\n+\t};\n+\n+\tps_venc_pipe5: power-controller@8010 {\n+\t\tcompatible = \"apple,t8122-pmgr-pwrstate\", \"apple,t8103-pmgr-pwrstate\";\n+\t\treg = <0x8010 4>;\n+\t\t#power-domain-cells = <0>;\n+\t\t#reset-cells = <0>;\n+\t\tlabel = \"venc_pipe5\";\n+\t\tpower-domains = <&ps_venc_dma>;\n+\t};\n+\n+\tps_venc_me0: power-controller@8018 {\n+\t\tcompatible = \"apple,t8122-pmgr-pwrstate\", \"apple,t8103-pmgr-pwrstate\";\n+\t\treg = <0x8018 4>;\n+\t\t#power-domain-cells = <0>;\n+\t\t#reset-cells = <0>;\n+\t\tlabel = \"venc_me0\";\n+\t\tpower-domains = <&ps_venc_dma>;\n+\t};\n+\n+\tps_venc_me1: power-controller@8020 {\n+\t\tcompatible = \"apple,t8122-pmgr-pwrstate\", \"apple,t8103-pmgr-pwrstate\";\n+\t\treg = <0x8020 4>;\n+\t\t#power-domain-cells = <0>;\n+\t\t#reset-cells = <0>;\n+\t\tlabel = \"venc_me1\";\n+\t\tpower-domains = <&ps_venc_me0>;\n+\t};\n+\n+\tps_disp_cpu: power-controller@10000 {\n+\t\tcompatible = \"apple,t8122-pmgr-pwrstate\", \"apple,t8103-pmgr-pwrstate\";\n+\t\treg = <0x10000 4>;\n+\t\t#power-domain-cells = <0>;\n+\t\t#reset-cells = <0>;\n+\t\tlabel = \"disp_cpu\";\n+\t\tpower-domains = <&ps_disp_fe>;\n+\t\tapple,min-state = <4>;\n+\t};\n+};\n+\n+&pmgr_mini {\n+\n+\tps_debug_gated: power-controller@0 {\n+\t\tcompatible = \"apple,t8122-pmgr-pwrstate\", \"apple,t8103-pmgr-pwrstate\";\n+\t\treg = <0x0 4>;\n+\t\t#power-domain-cells = <0>;\n+\t\t#reset-cells = <0>;\n+\t\tlabel = \"debug_gated\";\n+\t\tapple,always-on;\n+\t};\n+\n+\tps_nub_spmi0: power-controller@58 {\n+\t\tcompatible = \"apple,t8122-pmgr-pwrstate\", \"apple,t8103-pmgr-pwrstate\";\n+\t\treg = <0x58 4>;\n+\t\t#power-domain-cells = <0>;\n+\t\t#reset-cells = <0>;\n+\t\tlabel = \"nub_spmi0\";\n+\t\tapple,always-on;\n+\t};\n+\n+\tps_nub_spmi1: power-controller@60 {\n+\t\tcompatible = \"apple,t8122-pmgr-pwrstate\", \"apple,t8103-pmgr-pwrstate\";\n+\t\treg = <0x60 4>;\n+\t\t#power-domain-cells = <0>;\n+\t\t#reset-cells = <0>;\n+\t\tlabel = \"nub_spmi1\";\n+\t\tapple,always-on;\n+\t};\n+\n+\tps_nub_spmi2: power-controller@68 {\n+\t\tcompatible = \"apple,t8122-pmgr-pwrstate\", \"apple,t8103-pmgr-pwrstate\";\n+\t\treg = <0x68 4>;\n+\t\t#power-domain-cells = <0>;\n+\t\t#reset-cells = <0>;\n+\t\tlabel = \"nub_spmi2\";\n+\t\tapple,always-on;\n+\t};\n+\n+\tps_nub_spmi_a0: power-controller@70 {\n+\t\tcompatible = \"apple,t8122-pmgr-pwrstate\", \"apple,t8103-pmgr-pwrstate\";\n+\t\treg = <0x70 4>;\n+\t\t#power-domain-cells = <0>;\n+\t\t#reset-cells = <0>;\n+\t\tlabel = \"nub_spmi_a0\";\n+\t\tapple,always-on;\n+\t};\n+\n+\tps_nub_aon: power-controller@78 {\n+\t\tcompatible = \"apple,t8122-pmgr-pwrstate\", \"apple,t8103-pmgr-pwrstate\";\n+\t\treg = <0x78 4>;\n+\t\t#power-domain-cells = <0>;\n+\t\t#reset-cells = <0>;\n+\t\tlabel = \"nub_aon\";\n+\t\tapple,always-on;\n+\t};\n+\n+\tps_nub_spi0: power-controller@80 {\n+\t\tcompatible = \"apple,t8122-pmgr-pwrstate\", \"apple,t8103-pmgr-pwrstate\";\n+\t\treg = <0x80 4>;\n+\t\t#power-domain-cells = <0>;\n+\t\t#reset-cells = <0>;\n+\t\tlabel = \"nub_spi0\";\n+\t\tapple,always-on;\n+\t};\n+\n+\tps_nub_ocla: power-controller@88 {\n+\t\tcompatible = \"apple,t8122-pmgr-pwrstate\", \"apple,t8103-pmgr-pwrstate\";\n+\t\treg = <0x88 4>;\n+\t\t#power-domain-cells = <0>;\n+\t\t#reset-cells = <0>;\n+\t\tlabel = \"nub_ocla\";\n+\t\tapple,always-on;\n+\t};\n+\n+\tps_nub_gpio: power-controller@90 {\n+\t\tcompatible = \"apple,t8122-pmgr-pwrstate\", \"apple,t8103-pmgr-pwrstate\";\n+\t\treg = <0x90 4>;\n+\t\t#power-domain-cells = <0>;\n+\t\t#reset-cells = <0>;\n+\t\tlabel = \"nub_gpio\";\n+\t\tapple,always-on;\n+\t};\n+\n+\tps_nub_fabric: power-controller@98 {\n+\t\tcompatible = \"apple,t8122-pmgr-pwrstate\", \"apple,t8103-pmgr-pwrstate\";\n+\t\treg = <0x98 4>;\n+\t\t#power-domain-cells = <0>;\n+\t\t#reset-cells = <0>;\n+\t\tlabel = \"nub_fabric\";\n+\t\tapple,always-on;\n+\t};\n+\n+\tps_nub_sram: power-controller@a0 {\n+\t\tcompatible = \"apple,t8122-pmgr-pwrstate\", \"apple,t8103-pmgr-pwrstate\";\n+\t\treg = <0xa0 4>;\n+\t\t#power-domain-cells = <0>;\n+\t\t#reset-cells = <0>;\n+\t\tlabel = \"nub_sram\";\n+\t\tapple,always-on;\n+\t};\n+\n+\tps_debug_switch: power-controller@a8 {\n+\t\tcompatible = \"apple,t8122-pmgr-pwrstate\", \"apple,t8103-pmgr-pwrstate\";\n+\t\treg = <0xa8 4>;\n+\t\t#power-domain-cells = <0>;\n+\t\t#reset-cells = <0>;\n+\t\tlabel = \"debug_switch\";\n+\t\tapple,always-on;\n+\t};\n+\n+\tps_atc0_usb_aon: power-controller@b0 {\n+\t\tcompatible = \"apple,t8122-pmgr-pwrstate\", \"apple,t8103-pmgr-pwrstate\";\n+\t\treg = <0xb0 4>;\n+\t\t#power-domain-cells = <0>;\n+\t\t#reset-cells = <0>;\n+\t\tlabel = \"atc0_usb_aon\";\n+\t};\n+\n+\tps_atc1_usb_aon: power-controller@b8 {\n+\t\tcompatible = \"apple,t8122-pmgr-pwrstate\", \"apple,t8103-pmgr-pwrstate\";\n+\t\treg = <0xb8 4>;\n+\t\t#power-domain-cells = <0>;\n+\t\t#reset-cells = <0>;\n+\t\tlabel = \"atc1_usb_aon\";\n+\t};\n+\n+\tps_atc0_usb: power-controller@c0 {\n+\t\tcompatible = \"apple,t8122-pmgr-pwrstate\", \"apple,t8103-pmgr-pwrstate\";\n+\t\treg = <0xc0 4>;\n+\t\t#power-domain-cells = <0>;\n+\t\t#reset-cells = <0>;\n+\t\tlabel = \"atc0_usb\";\n+\t\tpower-domains = <&ps_atc0_usb_aon>, <&ps_atc0_common>;\n+\t};\n+\n+\tps_atc1_usb: power-controller@c8 {\n+\t\tcompatible = \"apple,t8122-pmgr-pwrstate\", \"apple,t8103-pmgr-pwrstate\";\n+\t\treg = <0xc8 4>;\n+\t\t#power-domain-cells = <0>;\n+\t\t#reset-cells = <0>;\n+\t\tlabel = \"atc1_usb\";\n+\t\tpower-domains = <&ps_atc1_usb_aon>, <&ps_atc1_common>;\n+\t};\n+};\ndiff --git a/arch/arm64/boot/dts/apple/t8122-usbpd-i2c.dtsi b/arch/arm64/boot/dts/apple/t8122-usbpd-i2c.dtsi\nnew file mode 100644\nindex 000000000000..112c5199cabd\n--- /dev/null\n+++ b/arch/arm64/boot/dts/apple/t8122-usbpd-i2c.dtsi\n@@ -0,0 +1,32 @@\n+// SPDX-License-Identifier: GPL-2.0+ OR MIT\n+/*\n+ * Apple M3 MacBook Pro and iMac (M3, 2023) I2C based USB PD controller nodes\n+ *\n+ * This file contains nodes for t8122 devices using I2C based cd321x USB Type-C\n+ * port controllers. The are used in the M3 MacBook Pro and iMacs but not in the\n+ * M3 Macbook Airs.\n+ *\n+ * target-type: J433, J434, J504\n+ *\n+ * Copyright The Asahi Linux Contributors\n+ */\n+\n+&i2c0 {\n+\tstatus = \"okay\";\n+\n+\thpm0: usb-pd@38 {\n+\t\tcompatible = \"apple,cd321x\";\n+\t\treg = <0x38>;\n+\t\tinterrupt-parent = <&pinctrl_ap>;\n+\t\tinterrupts = <8 IRQ_TYPE_LEVEL_LOW>;\n+\t\tinterrupt-names = \"irq\";\n+\t};\n+\n+\thpm1: usb-pd@3f {\n+\t\tcompatible = \"apple,cd321x\";\n+\t\treg = <0x3f>;\n+\t\tinterrupt-parent = <&pinctrl_ap>;\n+\t\tinterrupts = <8 IRQ_TYPE_LEVEL_LOW>;\n+\t\tinterrupt-names = \"irq\";\n+\t};\n+};\ndiff --git a/arch/arm64/boot/dts/apple/t8122.dtsi b/arch/arm64/boot/dts/apple/t8122.dtsi\nnew file mode 100644\nindex 000000000000..2a042b6fbebc\n--- /dev/null\n+++ b/arch/arm64/boot/dts/apple/t8122.dtsi\n@@ -0,0 +1,444 @@\n+// SPDX-License-Identifier: GPL-2.0+ OR MIT\n+/*\n+ * Apple T8122 \"M3\" SoC\n+ *\n+ * Other names: H15G\n+ *\n+ * Copyright The Asahi Linux Contributors\n+ */\n+\n+#include \n+#include \n+#include \n+#include \n+#include \n+#include \n+\n+/ {\n+\tcompatible = \"apple,t8122\", \"apple,arm-platform\";\n+\n+\t#address-cells = <2>;\n+\t#size-cells = <2>;\n+\n+\tcpus {\n+\t\t#address-cells = <2>;\n+\t\t#size-cells = <0>;\n+\n+\t\tcpu-map {\n+\t\t\tcluster0 {\n+\t\t\t\tcore0 {\n+\t\t\t\t\tcpu = <&cpu_e0>;\n+\t\t\t\t};\n+\t\t\t\tcore1 {\n+\t\t\t\t\tcpu = <&cpu_e1>;\n+\t\t\t\t};\n+\t\t\t\tcore2 {\n+\t\t\t\t\tcpu = <&cpu_e2>;\n+\t\t\t\t};\n+\t\t\t\tcore3 {\n+\t\t\t\t\tcpu = <&cpu_e3>;\n+\t\t\t\t};\n+\t\t\t};\n+\n+\t\t\tcluster1 {\n+\t\t\t\tcore0 {\n+\t\t\t\t\tcpu = <&cpu_p0>;\n+\t\t\t\t};\n+\t\t\t\tcore1 {\n+\t\t\t\t\tcpu = <&cpu_p1>;\n+\t\t\t\t};\n+\t\t\t\tcore2 {\n+\t\t\t\t\tcpu = <&cpu_p2>;\n+\t\t\t\t};\n+\t\t\t\tcore3 {\n+\t\t\t\t\tcpu = <&cpu_p3>;\n+\t\t\t\t};\n+\t\t\t};\n+\t\t};\n+\n+\t\tcpu_e0: cpu@0 {\n+\t\t\tcompatible = \"apple,sawtooth\";\n+\t\t\tdevice_type = \"cpu\";\n+\t\t\treg = <0x0 0x0>;\n+\t\t\tenable-method = \"spin-table\";\n+\t\t\tcpu-release-addr = <0 0>; /* To be filled by loader */\n+\t\t\tnext-level-cache = <&l2_cache_0>;\n+\t\t\ti-cache-size = <0x20000>;\n+\t\t\td-cache-size = <0x10000>;\n+\t\t};\n+\n+\t\tcpu_e1: cpu@1 {\n+\t\t\tcompatible = \"apple,sawtooth\";\n+\t\t\tdevice_type = \"cpu\";\n+\t\t\treg = <0x0 0x1>;\n+\t\t\tenable-method = \"spin-table\";\n+\t\t\tcpu-release-addr = <0 0>; /* To be filled by loader */\n+\t\t\tnext-level-cache = <&l2_cache_0>;\n+\t\t\ti-cache-size = <0x20000>;\n+\t\t\td-cache-size = <0x10000>;\n+\t\t};\n+\n+\t\tcpu_e2: cpu@2 {\n+\t\t\tcompatible = \"apple,sawtooth\";\n+\t\t\tdevice_type = \"cpu\";\n+\t\t\treg = <0x0 0x2>;\n+\t\t\tenable-method = \"spin-table\";\n+\t\t\tcpu-release-addr = <0 0>; /* To be filled by loader */\n+\t\t\tnext-level-cache = <&l2_cache_0>;\n+\t\t\ti-cache-size = <0x20000>;\n+\t\t\td-cache-size = <0x10000>;\n+\t\t};\n+\n+\t\tcpu_e3: cpu@3 {\n+\t\t\tcompatible = \"apple,sawtooth\";\n+\t\t\tdevice_type = \"cpu\";\n+\t\t\treg = <0x0 0x3>;\n+\t\t\tenable-method = \"spin-table\";\n+\t\t\tcpu-release-addr = <0 0>; /* To be filled by loader */\n+\t\t\tnext-level-cache = <&l2_cache_0>;\n+\t\t\ti-cache-size = <0x20000>;\n+\t\t\td-cache-size = <0x10000>;\n+\t\t};\n+\n+\t\tcpu_p0: cpu@10100 {\n+\t\t\tcompatible = \"apple,everest\";\n+\t\t\tdevice_type = \"cpu\";\n+\t\t\treg = <0x0 0x10100>;\n+\t\t\tenable-method = \"spin-table\";\n+\t\t\tcpu-release-addr = <0 0>; /* To be filled by loader */\n+\t\t\tnext-level-cache = <&l2_cache_1>;\n+\t\t\ti-cache-size = <0x30000>;\n+\t\t\td-cache-size = <0x20000>;\n+\t\t};\n+\n+\t\tcpu_p1: cpu@10101 {\n+\t\t\tcompatible = \"apple,everest\";\n+\t\t\tdevice_type = \"cpu\";\n+\t\t\treg = <0x0 0x10101>;\n+\t\t\tenable-method = \"spin-table\";\n+\t\t\tcpu-release-addr = <0 0>; /* To be filled by loader */\n+\t\t\tnext-level-cache = <&l2_cache_1>;\n+\t\t\ti-cache-size = <0x30000>;\n+\t\t\td-cache-size = <0x20000>;\n+\t\t};\n+\n+\t\tcpu_p2: cpu@10102 {\n+\t\t\tcompatible = \"apple,everest\";\n+\t\t\tdevice_type = \"cpu\";\n+\t\t\treg = <0x0 0x10102>;\n+\t\t\tenable-method = \"spin-table\";\n+\t\t\tcpu-release-addr = <0 0>; /* To be filled by loader */\n+\t\t\tnext-level-cache = <&l2_cache_1>;\n+\t\t\ti-cache-size = <0x30000>;\n+\t\t\td-cache-size = <0x20000>;\n+\t\t};\n+\n+\t\tcpu_p3: cpu@10103 {\n+\t\t\tcompatible = \"apple,everest\";\n+\t\t\tdevice_type = \"cpu\";\n+\t\t\treg = <0x0 0x10103>;\n+\t\t\tenable-method = \"spin-table\";\n+\t\t\tcpu-release-addr = <0 0>; /* To be filled by loader */\n+\t\t\tnext-level-cache = <&l2_cache_1>;\n+\t\t\ti-cache-size = <0x30000>;\n+\t\t\td-cache-size = <0x20000>;\n+\t\t};\n+\n+\t\tl2_cache_0: l2-cache-0 {\n+\t\t\tcompatible = \"cache\";\n+\t\t\tcache-level = <2>;\n+\t\t\tcache-unified;\n+\t\t\tcache-size = <0x400000>;\n+\t\t};\n+\n+\t\tl2_cache_1: l2-cache-1 {\n+\t\t\tcompatible = \"cache\";\n+\t\t\tcache-level = <2>;\n+\t\t\tcache-unified;\n+\t\t\tcache-size = <0x1000000>;\n+\t\t};\n+\t};\n+\n+\ttimer {\n+\t\tcompatible = \"arm,armv8-timer\";\n+\t\tinterrupt-parent = <&aic>;\n+\t\tinterrupt-names = \"phys\", \"virt\", \"hyp-phys\", \"hyp-virt\";\n+\t\tinterrupts = ,\n+\t\t\t ,\n+\t\t\t ,\n+\t\t\t ;\n+\t};\n+\n+\tclkref: clock-ref {\n+\t\tcompatible = \"fixed-clock\";\n+\t\t#clock-cells = <0>;\n+\t\tclock-frequency = <24000000>;\n+\t\tclock-output-names = \"clkref\";\n+\t};\n+\n+\tsoc {\n+\t\tcompatible = \"simple-bus\";\n+\t\t#address-cells = <2>;\n+\t\t#size-cells = <2>;\n+\n+\t\tranges;\n+\t\tnonposted-mmio;\n+\t\t/* Required to get >32-bit DMA via DARTs */\n+\t\tdma-ranges = <0 0 0 0 0xffffffff 0xffffc000>;\n+\n+\t\ti2c0: i2c@235010000 {\n+\t\t\tcompatible = \"apple,t8122-i2c\", \"apple,t8103-i2c\";\n+\t\t\treg = <0x2 0x35010000 0x0 0x4000>;\n+\t\t\tclocks = <&clkref>;\n+\t\t\tinterrupt-parent = <&aic>;\n+\t\t\tinterrupts = ;\n+\t\t\tpinctrl-0 = <&i2c0_pins>;\n+\t\t\tpinctrl-names = \"default\";\n+\t\t\t#address-cells = <0x1>;\n+\t\t\t#size-cells = <0x0>;\n+\t\t\tpower-domains = <&ps_i2c0>;\n+\t\t\tstatus = \"disabled\";\n+\t\t};\n+\n+\t\ti2c1: i2c@235014000 {\n+\t\t\tcompatible = \"apple,t8122-i2c\", \"apple,t8103-i2c\";\n+\t\t\treg = <0x2 0x35014000 0x0 0x4000>;\n+\t\t\tclocks = <&clkref>;\n+\t\t\tinterrupt-parent = <&aic>;\n+\t\t\tinterrupts = ;\n+\t\t\tpinctrl-0 = <&i2c1_pins>;\n+\t\t\tpinctrl-names = \"default\";\n+\t\t\t#address-cells = <0x1>;\n+\t\t\t#size-cells = <0x0>;\n+\t\t\tpower-domains = <&ps_i2c1>;\n+\t\t\tstatus = \"disabled\";\n+\t\t};\n+\n+\t\ti2c2: i2c@235018000 {\n+\t\t\tcompatible = \"apple,t8122-i2c\", \"apple,t8103-i2c\";\n+\t\t\treg = <0x2 0x35018000 0x0 0x4000>;\n+\t\t\tclocks = <&clkref>;\n+\t\t\tinterrupt-parent = <&aic>;\n+\t\t\tinterrupts = ;\n+\t\t\tpinctrl-0 = <&i2c2_pins>;\n+\t\t\tpinctrl-names = \"default\";\n+\t\t\t#address-cells = <0x1>;\n+\t\t\t#size-cells = <0x0>;\n+\t\t\tpower-domains = <&ps_i2c2>;\n+\t\t\tstatus = \"disabled\";\n+\t\t};\n+\n+\t\ti2c3: i2c@23501c000 {\n+\t\t\tcompatible = \"apple,t8122-i2c\", \"apple,t8103-i2c\";\n+\t\t\treg = <0x2 0x3501c000 0x0 0x4000>;\n+\t\t\tclocks = <&clkref>;\n+\t\t\tinterrupt-parent = <&aic>;\n+\t\t\tinterrupts = ;\n+\t\t\tpinctrl-0 = <&i2c3_pins>;\n+\t\t\tpinctrl-names = \"default\";\n+\t\t\t#address-cells = <0x1>;\n+\t\t\t#size-cells = <0x0>;\n+\t\t\tpower-domains = <&ps_i2c3>;\n+\t\t\tstatus = \"disabled\";\n+\t\t};\n+\n+\t\ti2c4: i2c@235020000 {\n+\t\t\tcompatible = \"apple,t8122-i2c\", \"apple,t8103-i2c\";\n+\t\t\treg = <0x2 0x35020000 0x0 0x4000>;\n+\t\t\tclocks = <&clkref>;\n+\t\t\tinterrupt-parent = <&aic>;\n+\t\t\tinterrupts = ;\n+\t\t\tpinctrl-0 = <&i2c4_pins>;\n+\t\t\tpinctrl-names = \"default\";\n+\t\t\t#address-cells = <0x1>;\n+\t\t\t#size-cells = <0x0>;\n+\t\t\tpower-domains = <&ps_i2c4>;\n+\t\t\tstatus = \"disabled\";\n+\t\t};\n+\n+\t\tfpwm1: pwm@2a1044000 {\n+\t\t\tcompatible = \"apple,t8122-fpwm\", \"apple,s5l-fpwm\";\n+\t\t\treg = <0x2 0xa1044000 0x0 0x4000>;\n+\t\t\tpower-domains = <&ps_fpwm1>;\n+\t\t\tclocks = <&clkref>;\n+\t\t\t#pwm-cells = <2>;\n+\t\t\tstatus = \"disabled\";\n+\t\t};\n+\n+\t\tserial0: serial@2a1200000 {\n+\t\t\tcompatible = \"apple,s5l-uart\";\n+\t\t\treg = <0x2 0xa1200000 0x0 0x1000>;\n+\t\t\treg-io-width = <4>;\n+\t\t\tinterrupt-parent = <&aic>;\n+\t\t\tinterrupts = ;\n+\t\t\t/*\n+\t\t\t * TODO: figure out the clocking properly, there may\n+\t\t\t * be a third selectable clock.\n+\t\t\t */\n+\t\t\tclocks = <&clkref>, <&clkref>;\n+\t\t\tclock-names = \"uart\", \"clk_uart_baud0\";\n+\t\t\tpower-domains = <&ps_uart0>;\n+\t\t\tstatus = \"disabled\";\n+\t\t};\n+\n+\t\taic: interrupt-controller@2d1000000 {\n+\t\t\tcompatible = \"apple,t8122-aic3\";\n+\t\t\t#interrupt-cells = <3>;\n+\t\t\tinterrupt-controller;\n+\t\t\treg = <0x2 0xd1000000 0x0 0x184000>,\n+\t\t\t\t<0x2 0xd1040000 0x0 0x4>;\n+\t\t\treg-names = \"core\", \"event\";\n+\t\t\tpower-domains = <&ps_aic>;\n+\n+\t\t\taffinities {\n+\t\t\t\te-core-pmu-affinity {\n+\t\t\t\t\tapple,fiq-index = ;\n+\t\t\t\t\tcpus = <&cpu_e0 &cpu_e1 &cpu_e2 &cpu_e3>;\n+\t\t\t\t};\n+\n+\t\t\t\tp-core-pmu-affinity {\n+\t\t\t\t\tapple,fiq-index = ;\n+\t\t\t\t\tcpus = <&cpu_p0 &cpu_p1 &cpu_p2 &cpu_p3>;\n+\t\t\t\t};\n+\t\t\t};\n+\t\t};\n+\n+\t\tpmgr: power-management@2d0700000 {\n+\t\t\tcompatible = \"apple,t8122-pmgr\", \"apple,t8103-pmgr\", \"syscon\", \"simple-mfd\";\n+\t\t\t#address-cells = <1>;\n+\t\t\t#size-cells = <1>;\n+\t\t\treg = <0x2 0xd0700000 0 0x10000>;\n+\t\t\t/* child nodes are added in t8122-pmgr.dtsi */\n+\t\t};\n+\n+\t\tpinctrl_ap: pinctrl@2c7100000 {\n+\t\t\tcompatible = \"apple,t8122-pinctrl\", \"apple,t8103-pinctrl\";\n+\t\t\treg = <0x2 0xc7100000 0x0 0x100000>;\n+\t\t\tpower-domains = <&ps_gpio>;\n+\n+\t\t\tgpio-controller;\n+\t\t\t#gpio-cells = <2>;\n+\t\t\tgpio-ranges = <&pinctrl_ap 0 0 224>;\n+\t\t\tapple,npins = <224>;\n+\n+\t\t\tinterrupt-controller;\n+\t\t\t#interrupt-cells = <2>;\n+\t\t\tinterrupt-parent = <&aic>;\n+\t\t\tinterrupts = ,\n+\t\t\t\t ,\n+\t\t\t\t ,\n+\t\t\t\t ,\n+\t\t\t\t ,\n+\t\t\t\t ,\n+\t\t\t\t ;\n+\n+\t\t\ti2c0_pins: i2c0-pins {\n+\t\t\t\tpinmux = ,\n+\t\t\t\t\t ;\n+\t\t\t};\n+\n+\t\t\ti2c1_pins: i2c1-pins {\n+\t\t\t\tpinmux = ,\n+\t\t\t\t\t ;\n+\t\t\t};\n+\n+\t\t\ti2c2_pins: i2c2-pins {\n+\t\t\t\tpinmux = ,\n+\t\t\t\t\t ;\n+\t\t\t};\n+\n+\t\t\ti2c3_pins: i2c3-pins {\n+\t\t\t\tpinmux = ,\n+\t\t\t\t\t ;\n+\t\t\t};\n+\n+\t\t\ti2c4_pins: i2c4-pins {\n+\t\t\t\tpinmux = ,\n+\t\t\t\t\t ;\n+\t\t\t};\n+\n+\t\t};\n+\n+\t\tpinctrl_nub: pinctrl@2e41f0000 {\n+\t\t\tcompatible = \"apple,t8122-pinctrl\", \"apple,t8103-pinctrl\";\n+\t\t\treg = <0x2 0xe41f0000 0x0 0x4000>;\n+\t\t\tpower-domains = <&ps_nub_gpio>;\n+\n+\t\t\tgpio-controller;\n+\t\t\t#gpio-cells = <2>;\n+\t\t\tgpio-ranges = <&pinctrl_nub 0 0 32>;\n+\t\t\tapple,npins = <32>;\n+\n+\t\t\tinterrupt-controller;\n+\t\t\t#interrupt-cells = <2>;\n+\t\t\tinterrupt-parent = <&aic>;\n+\t\t\tinterrupts = ,\n+\t\t\t\t ,\n+\t\t\t\t ,\n+\t\t\t\t ,\n+\t\t\t\t ,\n+\t\t\t\t ,\n+\t\t\t\t ;\n+\t\t};\n+\n+\t\tpmgr_mini: power-management@2e4280000 {\n+\t\t\tcompatible = \"apple,t8122-pmgr\", \"apple,t8103-pmgr\", \"syscon\", \"simple-mfd\";\n+\t\t\t#address-cells = <1>;\n+\t\t\t#size-cells = <1>;\n+\t\t\treg = <0x2 0xe4280000 0 0x4000>;\n+\t\t\t/* child nodes are added in t8122-pmgr.dtsi */\n+\t\t};\n+\n+\t\twdt: watchdog@2e42b0000 {\n+\t\t\tcompatible = \"apple,t8122-wdt\", \"apple,t8103-wdt\";\n+\t\t\treg = <0x2 0xe42b0000 0x0 0x4000>;\n+\t\t\tclocks = <&clkref>;\n+\t\t\tinterrupt-parent = <&aic>;\n+\t\t\tinterrupts = ;\n+\t\t};\n+\n+\t\tpinctrl_smc: pinctrl@2ec820000 {\n+\t\t\tcompatible = \"apple,t8122-pinctrl\", \"apple,t8103-pinctrl\";\n+\t\t\treg = <0x2 0xec820000 0x0 0x4000>;\n+\n+\t\t\tgpio-controller;\n+\t\t\t#gpio-cells = <2>;\n+\t\t\tgpio-ranges = <&pinctrl_smc 0 0 18>;\n+\t\t\tapple,npins = <18>;\n+\n+\t\t\tinterrupt-controller;\n+\t\t\t#interrupt-cells = <2>;\n+\t\t\tinterrupt-parent = <&aic>;\n+\t\t\tinterrupts = ,\n+\t\t\t\t ,\n+\t\t\t\t ,\n+\t\t\t\t ,\n+\t\t\t\t ,\n+\t\t\t\t ,\n+\t\t\t\t ;\n+\t\t};\n+\n+\t\tpinctrl_aop: pinctrl@2f4824000 {\n+\t\t\tcompatible = \"apple,t8122-pinctrl\", \"apple,t8103-pinctrl\";\n+\t\t\treg = <0x2 0xf4824000 0x0 0x4000>;\n+\n+\t\t\tgpio-controller;\n+\t\t\t#gpio-cells = <2>;\n+\t\t\tgpio-ranges = <&pinctrl_aop 0 0 54>;\n+\t\t\tapple,npins = <54>;\n+\n+\t\t\tinterrupt-controller;\n+\t\t\t#interrupt-cells = <2>;\n+\t\t\tinterrupt-parent = <&aic>;\n+\t\t\tinterrupts = ,\n+\t\t\t\t ,\n+\t\t\t\t ,\n+\t\t\t\t ,\n+\t\t\t\t ,\n+\t\t\t\t ,\n+\t\t\t\t ;\n+\t\t};\n+\t};\n+};\n+\n+#include \"t8122-pmgr.dtsi\"\n","prefixes":["v2","6/6"]}