{"id":2231990,"url":"http://patchwork.ozlabs.org/api/1.2/patches/2231990/?format=json","web_url":"http://patchwork.ozlabs.org/project/gcc/patch/20260501213120.324542-4-xry111@xry111.site/","project":{"id":17,"url":"http://patchwork.ozlabs.org/api/1.2/projects/17/?format=json","name":"GNU Compiler Collection","link_name":"gcc","list_id":"gcc-patches.gcc.gnu.org","list_email":"gcc-patches@gcc.gnu.org","web_url":null,"scm_url":null,"webscm_url":null,"list_archive_url":"","list_archive_url_format":"","commit_url_format":""},"msgid":"<20260501213120.324542-4-xry111@xry111.site>","list_archive_url":null,"date":"2026-05-01T21:31:19","name":"[3/4] i386: testsuite: fix shift-gf2p8affine-2.c failure on non-AVX512 CPU","commit_ref":null,"pull_url":null,"state":"new","archived":false,"hash":"146c0360cff70c30ef031164167cc90c07c5f29b","submitter":{"id":84026,"url":"http://patchwork.ozlabs.org/api/1.2/people/84026/?format=json","name":"Xi Ruoyao","email":"xry111@xry111.site"},"delegate":null,"mbox":"http://patchwork.ozlabs.org/project/gcc/patch/20260501213120.324542-4-xry111@xry111.site/mbox/","series":[{"id":502499,"url":"http://patchwork.ozlabs.org/api/1.2/series/502499/?format=json","web_url":"http://patchwork.ozlabs.org/project/gcc/list/?series=502499","date":"2026-05-01T21:31:20","name":"Test suite fixes","version":1,"mbox":"http://patchwork.ozlabs.org/series/502499/mbox/"}],"comments":"http://patchwork.ozlabs.org/api/patches/2231990/comments/","check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/2231990/checks/","tags":{},"related":[],"headers":{"Return-Path":"","X-Original-To":["incoming@patchwork.ozlabs.org","gcc-patches@gcc.gnu.org"],"Delivered-To":["patchwork-incoming@legolas.ozlabs.org","gcc-patches@gcc.gnu.org"],"Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (1024-bit key;\n unprotected) header.d=xry111.site header.i=@xry111.site header.a=rsa-sha256\n header.s=default header.b=OVAsJ9Lf;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=gcc.gnu.org\n (client-ip=2620:52:6:3111::32; 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a=rsa-sha256; d=sourceware.org; s=key;\n t=1777671111; c=relaxed/simple;\n bh=BLbXnEsBFfvyIUzXfhkEsx1c2rrpDtQ3xTChP1tAYsI=;\n h=DKIM-Signature:From:To:Subject:Date:Message-ID:MIME-Version;\n b=JkN78ixeg9y8vah52P7VrVpz9Nder0BwUACS+Pc10duCcBDEqVsi4H2sHoTeh6CJLapCcFcgieqLu3iqTpGRo+upvjQawGGDGBW+PxpMxY0GLuYzVTne/TOAxpEZsNLFtV6cgAWyD0drzKjo50Yqu13ArQ+gBlL6tKtLkgZ1pLY=","ARC-Authentication-Results":"i=1; server2.sourceware.org","DKIM-Signature":"v=1; a=rsa-sha256; c=relaxed/relaxed; d=xry111.site;\n s=default; t=1777671110;\n bh=ltTk4sGBz6bE+YajIiGR+yUPAr10kQhbzY1S00wrGSU=;\n h=From:To:Cc:Subject:Date:In-Reply-To:References:From;\n b=OVAsJ9Lfcu3NpO2rGnLGZXBraFegNWZZECVXa9kCLNlPV/NfqdH4KxWmMSHRiz5W3\n z7ZNIDIGCnghRF+cSqdp0tikAiIYDtMcEbd96oR65VE6HIAqer2VGxk6MkwNylKg07\n 6GXEn4x//6e0Y6Ems1XsSwyxDgPLOUewbuPYWhxw=","From":"Xi Ruoyao ","To":"gcc-patches@gcc.gnu.org","Cc":"Richard Sandiford ,\n \"H . J . Lu\" , Xi Ruoyao ","Subject":"[PATCH 3/4] i386: testsuite: fix shift-gf2p8affine-2.c failure on\n non-AVX512 CPU","Date":"Sat, 2 May 2026 05:31:19 +0800","Message-ID":"<20260501213120.324542-4-xry111@xry111.site>","X-Mailer":"git-send-email 2.54.0","In-Reply-To":"<20260501213120.324542-1-xry111@xry111.site>","References":"<20260501213120.324542-1-xry111@xry111.site>","MIME-Version":"1.0","Content-Transfer-Encoding":"8bit","X-BeenThere":"gcc-patches@gcc.gnu.org","X-Mailman-Version":"2.1.30","Precedence":"list","List-Id":"Gcc-patches mailing list ","List-Unsubscribe":",\n ","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n ","Errors-To":"gcc-patches-bounces~incoming=patchwork.ozlabs.org@gcc.gnu.org"},"content":"Enabling AVX512 via command line causes the compiler to generate AVX512\ninstructions even before the runtime CPU feature check, causing the test\nto SIGILL if the CPU lacks AVX512.\n\nSo enable AVX512 via function attribute instead and only call that\nfunction after the CPU feature check.\n\ngcc/testsuite/\n\n\t* gcc.target/i386/shift-gf2p8affine-2.c (dg-options): Remove\n\tflags for AVX512.\n\t(main): Move the test logic to test() and only call it if the\n\tCPU supports AVX512.\n\t(test): New, with [[gnu::target()]] to enable AVX512.\n---\n .../gcc.target/i386/shift-gf2p8affine-2.c | 25 +++++++++++++------\n 1 file changed, 18 insertions(+), 7 deletions(-)","diff":"diff --git a/gcc/testsuite/gcc.target/i386/shift-gf2p8affine-2.c b/gcc/testsuite/gcc.target/i386/shift-gf2p8affine-2.c\nindex ef088ab0b95..2c119c3de58 100644\n--- a/gcc/testsuite/gcc.target/i386/shift-gf2p8affine-2.c\n+++ b/gcc/testsuite/gcc.target/i386/shift-gf2p8affine-2.c\n@@ -1,5 +1,5 @@\n /* { dg-do run } */\n-/* { dg-options \"-mgfni -mavx512vl -mavx512bw -mavx512f -O3 -Wno-shift-count-negative -march=x86-64 -mtune=generic\" } */\n+/* { dg-options \"-O3 -Wno-shift-count-negative -march=x86-64 -mtune=generic\" } */\n /* { dg-require-effective-target gfni } */\n /* { dg-require-effective-target avx512vl } */\n /* { dg-require-effective-target avx512bw } */\n@@ -151,12 +151,9 @@ FUNC (N5)\n func##N##ref (array2, len);\t\t\t\t\\\n if (memcmp (array, array2, len)) __builtin_abort ()\n \n-int main ()\n+[[gnu::target (\"gfni,avx512vl,avx512bw,avx512f\")]]\n+void test ()\n {\n- __builtin_cpu_init ();\n- if (!__builtin_cpu_supports (\"gfni\"))\n- return 0;\n-\n const unsigned long len = 256;\n char array[len], array2[len];\n unsigned char filler = FILLER;\n@@ -195,6 +192,20 @@ int main ()\n TEST (N5, sbyteshiftr);\n TEST (N5, ubyteror);\n TEST (N5, ubyterol);\n+}\n+\n+int\n+main ()\n+{\n+ __builtin_cpu_init ();\n+ if (!__builtin_cpu_supports (\"gfni\"))\n+ return 0;\n+ if (!__builtin_cpu_supports (\"avx512vl\"))\n+ return 0;\n+ if (!__builtin_cpu_supports (\"avx512bw\"))\n+ return 0;\n+ if (!__builtin_cpu_supports (\"avx512f\"))\n+ return 0;\n \n- return 0;\n+ test ();\n }\n","prefixes":["3/4"]}