{"id":2231950,"url":"http://patchwork.ozlabs.org/api/1.2/patches/2231950/?format=json","web_url":"http://patchwork.ozlabs.org/project/linux-pci/patch/20260501161010.71688-2-18255117159@163.com/","project":{"id":28,"url":"http://patchwork.ozlabs.org/api/1.2/projects/28/?format=json","name":"Linux PCI development","link_name":"linux-pci","list_id":"linux-pci.vger.kernel.org","list_email":"linux-pci@vger.kernel.org","web_url":null,"scm_url":null,"webscm_url":null,"list_archive_url":"","list_archive_url_format":"","commit_url_format":""},"msgid":"<20260501161010.71688-2-18255117159@163.com>","list_archive_url":null,"date":"2026-05-01T16:10:07","name":"[1/4] PCI: dra7xx: Use common mode field in struct dw_pcie","commit_ref":null,"pull_url":null,"state":"new","archived":false,"hash":"7cece3ea796d56b47993867c5cd71424000fc6db","submitter":{"id":89937,"url":"http://patchwork.ozlabs.org/api/1.2/people/89937/?format=json","name":"Hans Zhang","email":"18255117159@163.com"},"delegate":null,"mbox":"http://patchwork.ozlabs.org/project/linux-pci/patch/20260501161010.71688-2-18255117159@163.com/mbox/","series":[{"id":502479,"url":"http://patchwork.ozlabs.org/api/1.2/series/502479/?format=json","web_url":"http://patchwork.ozlabs.org/project/linux-pci/list/?series=502479","date":"2026-05-01T16:10:06","name":"PCI: dwc: designware-plat: Use common mode field in struct dw_pcie","version":1,"mbox":"http://patchwork.ozlabs.org/series/502479/mbox/"}],"comments":"http://patchwork.ozlabs.org/api/patches/2231950/comments/","check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/2231950/checks/","tags":{},"related":[],"headers":{"Return-Path":"\n ","X-Original-To":["incoming@patchwork.ozlabs.org","linux-pci@vger.kernel.org"],"Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (1024-bit key;\n unprotected) header.d=163.com header.i=@163.com header.a=rsa-sha256\n header.s=s110527 header.b=UHqoEiuE;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org\n (client-ip=2600:3c0a:e001:db::12fc:5321; helo=sea.lore.kernel.org;\n envelope-from=linux-pci+bounces-53587-incoming=patchwork.ozlabs.org@vger.kernel.org;\n receiver=patchwork.ozlabs.org)","smtp.subspace.kernel.org;\n\tdkim=pass (1024-bit key) header.d=163.com header.i=@163.com\n header.b=\"UHqoEiuE\"","smtp.subspace.kernel.org;\n arc=none smtp.client-ip=220.197.31.4","smtp.subspace.kernel.org;\n dmarc=pass (p=none dis=none) header.from=163.com","smtp.subspace.kernel.org;\n spf=pass smtp.mailfrom=163.com"],"Received":["from sea.lore.kernel.org (sea.lore.kernel.org\n [IPv6:2600:3c0a:e001:db::12fc:5321])\n\t(using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)\n\t key-exchange x25519 server-signature ECDSA (secp384r1) server-digest SHA384)\n\t(No client certificate requested)\n\tby legolas.ozlabs.org (Postfix) with ESMTPS id 4g6bd93MMNz1xqf\n\tfor ; Sat, 02 May 2026 02:11:25 +1000 (AEST)","from smtp.subspace.kernel.org (conduit.subspace.kernel.org\n [100.90.174.1])\n\tby sea.lore.kernel.org (Postfix) with ESMTP id 35644300EF40\n\tfor ; Fri, 1 May 2026 16:11:10 +0000 (UTC)","from localhost.localdomain (localhost.localdomain [127.0.0.1])\n\tby smtp.subspace.kernel.org (Postfix) with ESMTP id C55AB3FA5EC;\n\tFri, 1 May 2026 16:11:05 +0000 (UTC)","from m16.mail.163.com (m16.mail.163.com [220.197.31.4])\n\t(using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits))\n\t(No client certificate requested)\n\tby smtp.subspace.kernel.org (Postfix) with ESMTPS id 931D63F076C;\n\tFri, 1 May 2026 16:10:50 +0000 (UTC)","from zhb.. (unknown [])\n\tby gzga-smtp-mtada-g1-4 (Coremail) with SMTP id\n _____wDnj5Fk0PRprTQgCw--.53438S3;\n\tSat, 02 May 2026 00:10:14 +0800 (CST)"],"ARC-Seal":"i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116;\n\tt=1777651863; cv=none;\n b=h2TPwMNc6gFwa8UL3G6tv67f2224ahydwDLrUP/wHPkJy2zX6/08mQecZsXzROgBfpIQ8llQLJsDS+t2MK90WeeErNlA5XdkQn30MebPrCLM46hwXM7B4Q64WglBRUNwAhJktWmx2ENbVTITj9FXpita1WOM8aEiVDg7W8dfNo4=","ARC-Message-Signature":"i=1; a=rsa-sha256; d=subspace.kernel.org;\n\ts=arc-20240116; t=1777651863; c=relaxed/simple;\n\tbh=8k+27dFEfk9gvTOLyx3sRRHfGTcjySdSAWkUG6LSWcs=;\n\th=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References:\n\t MIME-Version;\n b=fj26HAYurbyk5UFlwqdYl3QM9QpXyuOlC6N6caJDXpFyax2buootoWZhtIqiyc1s7xHTgpMhgin+rGV1re+gATQhknev9L7Wto8QqiM5ENm2isF7Kn2FYCAiiHjOjvES9BPJVHC5gOaRbHlrrASK3S9G17F1sT/rUGZJQ45fuNw=","ARC-Authentication-Results":"i=1; smtp.subspace.kernel.org;\n dmarc=pass (p=none dis=none) header.from=163.com;\n spf=pass smtp.mailfrom=163.com;\n dkim=pass (1024-bit key) header.d=163.com header.i=@163.com\n header.b=UHqoEiuE; arc=none smtp.client-ip=220.197.31.4","DKIM-Signature":"v=1; a=rsa-sha256; c=relaxed/relaxed; d=163.com;\n\ts=s110527; h=From:To:Subject:Date:Message-Id:MIME-Version; bh=iO\n\tUEMne7+s7Kfd5u4r0P7fMHEsYx2/gNI7ikiiDLoOg=; b=UHqoEiuEwLA5zVenqU\n\tpz+9iRF3g6EDDW+L0LS4e74nIEvuG0zhYDjn24w1m//6Ej8sz5B0xWH3XcR+nG0z\n\tztv+nIhTsZ2ADyk3x3nIcqtEOxaT785ZNtHgayyRpO1+37Xtrjh/XU4Drj5iXJQg\n\t+QJ1pQHbGcha23ULZrxQbv6pM=","From":"Hans Zhang <18255117159@163.com>","To":"lpieralisi@kernel.org,\n\tkwilczynski@kernel.org,\n\tbhelgaas@google.com,\n\tjingoohan1@gmail.com,\n\tmani@kernel.org,\n\tvigneshr@ti.com","Cc":"xrobh@kernel.org,\n\tlinux-pci@vger.kernel.org,\n\tlinux-kernel@vger.kernel.org,\n\tHans Zhang <18255117159@163.com>","Subject":"[PATCH 1/4] PCI: dra7xx: Use common mode field in struct dw_pcie","Date":"Sat, 2 May 2026 00:10:07 +0800","Message-Id":"<20260501161010.71688-2-18255117159@163.com>","X-Mailer":"git-send-email 2.34.1","In-Reply-To":"<20260501161010.71688-1-18255117159@163.com>","References":"<20260501161010.71688-1-18255117159@163.com>","Precedence":"bulk","X-Mailing-List":"linux-pci@vger.kernel.org","List-Id":"","List-Subscribe":"","List-Unsubscribe":"","MIME-Version":"1.0","Content-Transfer-Encoding":"8bit","X-CM-TRANSID":"_____wDnj5Fk0PRprTQgCw--.53438S3","X-Coremail-Antispam":"1Uf129KBjvJXoW7ur15Ar15AF15XFW7Cw1xZrb_yoW8tr1Dpw\n\t43AFWayF4rX3W5uF1fAF1qg3WSqF9ava48JrsrCw4xtasxCrn8JF4rA34j93yfKFW8uryU\n\tt3Wrtr4xX3WaqFUanT9S1TB71UUUUU7qnTZGkaVYY2UrUUUUjbIjqfuFe4nvWSU5nxnvy2\n\t9KBjDUYxBIdaVFxhVjvjDU0xZFpf9x0z_Ma0DUUUUU=","X-CM-SenderInfo":"rpryjkyvrrlimvzbiqqrwthudrp/xtbC7AfkiGn00GeBEQAA39"},"content":"Remove the redundant mode field from struct dra7xx_pcie and use the\nexisting mode field in struct dw_pcie instead.\n\nThis avoids duplication and prevents potential inconsistencies between\nthe two mode fields.\n\nSigned-off-by: Hans Zhang <18255117159@163.com>\n---\n drivers/pci/controller/dwc/pci-dra7xx.c | 11 +++++------\n 1 file changed, 5 insertions(+), 6 deletions(-)","diff":"diff --git a/drivers/pci/controller/dwc/pci-dra7xx.c b/drivers/pci/controller/dwc/pci-dra7xx.c\nindex cd904659c321..88b4c486ea66 100644\n--- a/drivers/pci/controller/dwc/pci-dra7xx.c\n+++ b/drivers/pci/controller/dwc/pci-dra7xx.c\n@@ -92,7 +92,6 @@ struct dra7xx_pcie {\n \tstruct phy\t\t**phy;\n \tstruct irq_domain\t*irq_domain;\n \tstruct clk *clk;\n-\tenum dw_pcie_device_mode mode;\n };\n \n struct dra7xx_pcie_of_data {\n@@ -328,7 +327,7 @@ static irqreturn_t dra7xx_pcie_irq_handler(int irq, void *arg)\n \t\tdev_dbg(dev, \"Link Request Reset\\n\");\n \n \tif (reg & LINK_UP_EVT) {\n-\t\tif (dra7xx->mode == DW_PCIE_EP_TYPE)\n+\t\tif (dra7xx->pci->mode == DW_PCIE_EP_TYPE)\n \t\t\tdw_pcie_ep_linkup(ep);\n \t\tdev_dbg(dev, \"Link-up state change\\n\");\n \t}\n@@ -828,7 +827,7 @@ static int dra7xx_pcie_probe(struct platform_device *pdev)\n \tdefault:\n \t\tdev_err(dev, \"INVALID device type %d\\n\", mode);\n \t}\n-\tdra7xx->mode = mode;\n+\tdra7xx->pci->mode = mode;\n \n \tret = devm_request_threaded_irq(dev, irq, NULL, dra7xx_pcie_irq_handler,\n \t\t\t\t\tIRQF_SHARED | IRQF_ONESHOT,\n@@ -841,7 +840,7 @@ static int dra7xx_pcie_probe(struct platform_device *pdev)\n \treturn 0;\n \n err_deinit:\n-\tif (dra7xx->mode == DW_PCIE_RC_TYPE)\n+\tif (dra7xx->pci->mode == DW_PCIE_RC_TYPE)\n \t\tdw_pcie_host_deinit(&dra7xx->pci->pp);\n \telse\n \t\tdw_pcie_ep_deinit(&dra7xx->pci->ep);\n@@ -865,7 +864,7 @@ static int dra7xx_pcie_suspend(struct device *dev)\n \tstruct dw_pcie *pci = dra7xx->pci;\n \tu32 val;\n \n-\tif (dra7xx->mode != DW_PCIE_RC_TYPE)\n+\tif (pci->mode != DW_PCIE_RC_TYPE)\n \t\treturn 0;\n \n \t/* clear MSE */\n@@ -882,7 +881,7 @@ static int dra7xx_pcie_resume(struct device *dev)\n \tstruct dw_pcie *pci = dra7xx->pci;\n \tu32 val;\n \n-\tif (dra7xx->mode != DW_PCIE_RC_TYPE)\n+\tif (pci->mode != DW_PCIE_RC_TYPE)\n \t\treturn 0;\n \n \t/* set MSE */\n","prefixes":["1/4"]}