{"id":2230944,"url":"http://patchwork.ozlabs.org/api/1.2/patches/2230944/?format=json","web_url":"http://patchwork.ozlabs.org/project/uboot/patch/20260430084414.1354490-18-richard.genoud@bootlin.com/","project":{"id":18,"url":"http://patchwork.ozlabs.org/api/1.2/projects/18/?format=json","name":"U-Boot","link_name":"uboot","list_id":"u-boot.lists.denx.de","list_email":"u-boot@lists.denx.de","web_url":null,"scm_url":null,"webscm_url":null,"list_archive_url":"","list_archive_url_format":"","commit_url_format":""},"msgid":"<20260430084414.1354490-18-richard.genoud@bootlin.com>","list_archive_url":null,"date":"2026-04-30T08:44:10","name":"[17/20] board: evm: Enable de-isolation of IOs at resume for j7200 and j784s4","commit_ref":null,"pull_url":null,"state":"new","archived":false,"hash":"bd674888f9d146ff6dab5a070d1eb77cfc948179","submitter":{"id":88519,"url":"http://patchwork.ozlabs.org/api/1.2/people/88519/?format=json","name":"Richard Genoud (TI)","email":"richard.genoud@bootlin.com"},"delegate":{"id":3651,"url":"http://patchwork.ozlabs.org/api/1.2/users/3651/?format=json","username":"trini","first_name":"Tom","last_name":"Rini","email":"trini@ti.com"},"mbox":"http://patchwork.ozlabs.org/project/uboot/patch/20260430084414.1354490-18-richard.genoud@bootlin.com/mbox/","series":[{"id":502237,"url":"http://patchwork.ozlabs.org/api/1.2/series/502237/?format=json","web_url":"http://patchwork.ozlabs.org/project/uboot/list/?series=502237","date":"2026-04-30T08:43:53","name":"Introduce resume for J7xx SoCs","version":1,"mbox":"http://patchwork.ozlabs.org/series/502237/mbox/"}],"comments":"http://patchwork.ozlabs.org/api/patches/2230944/comments/","check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/2230944/checks/","tags":{},"related":[],"headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=bootlin.com header.i=@bootlin.com header.a=rsa-sha256\n header.s=dkim header.b=UL5oAra2;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de\n (client-ip=85.214.62.61; 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a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=dkim;\n t=1777538711; h=from:subject:date:message-id:to:cc:mime-version:\n content-transfer-encoding:in-reply-to:references;\n bh=4gHhbwbWyaY5AAPlO2PDTM3Rc79WvTr6O2lZ09lykFI=;\n b=UL5oAra2d2iO7u++r2bOFD8Wt+1IhQa7aC6rZhubfNGZMcDDOqv2SNyXoCFOSts7uo2Ypl\n 47UeCisS4rqHhSB78fv/qJEmfPuPQv66BItB38FKRqACKRX7bi31dhYcuK28M4qRKSjvff\n Xy3afhILFkSwJGJEqzCxgQlBh+wfcjRXPaHIQHQ+9qsl9BsR9PWcLFeSLZRJbaQRSyUx37\n qhn5LJaaSJ/DFTu49mSLUTol0f+K8B3v6uw4eNb3r7AbkLSpkz3Uc5QJZmS7z8jNqrfXOk\n lY1aRXX4bxTSEcHJST/9DFMLSSOiOi55PaYzV0LxmWVBILmjFUI8KA5fytyglA==","From":"\"Richard Genoud (TI)\" ","To":"Tom Rini , Manorit Chawdhry ,\n Apurva Nandan , \"Andrew F . Davis\" ,\n Vignesh Raghavendra , Bryan Brattlof ,\n Vaishnav Achath , Jayesh Choudhary ,\n Simon Glass , Alper Nebi Yasak ","Cc":"Markus Schneider-Pargmann ,\n Udit Kumar ,\n Abhash Kumar ,\n Thomas Richard ,\n Gregory CLEMENT ,\n Thomas Petazzoni ,\n Richard Genoud , u-boot@lists.denx.de","Subject":"[PATCH 17/20] board: evm: Enable de-isolation of IOs at resume for\n j7200 and j784s4","Date":"Thu, 30 Apr 2026 10:44:10 +0200","Message-ID":"<20260430084414.1354490-18-richard.genoud@bootlin.com>","X-Mailer":"git-send-email 2.47.3","In-Reply-To":"<20260430084414.1354490-1-richard.genoud@bootlin.com>","References":"<20260430084414.1354490-1-richard.genoud@bootlin.com>","MIME-Version":"1.0","Content-Transfer-Encoding":"8bit","X-Last-TLS-Session-Version":"TLSv1.3","X-BeenThere":"u-boot@lists.denx.de","X-Mailman-Version":"2.1.39","Precedence":"list","List-Id":"U-Boot discussion ","List-Unsubscribe":",\n ","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n ","Errors-To":"u-boot-bounces@lists.denx.de","Sender":"\"U-Boot\" ","X-Virus-Scanned":"clamav-milter 0.103.8 at phobos.denx.de","X-Virus-Status":"Clean"},"content":"From: Abhash Kumar Jha \n\nWhen resuming from IO_ONLY_PLUS_DDR low power mode, the IOs are\nisolated. Remove that isolation in resume sequence.\n\nOn j7200, The canuart IOs are isolated whereas on j784s4, the\nmcu_general IOs are isolated.\n\nSigned-off-by: Abhash Kumar Jha \n---\n .../arm/mach-k3/include/mach/j721e_hardware.h | 11 +++++++\n .../mach-k3/include/mach/j784s4_hardware.h | 10 +++++++\n board/ti/j721e/evm.c | 29 ++++++++++++++++++\n board/ti/j784s4/evm.c | 30 +++++++++++++++++++\n 4 files changed, 80 insertions(+)","diff":"diff --git a/arch/arm/mach-k3/include/mach/j721e_hardware.h b/arch/arm/mach-k3/include/mach/j721e_hardware.h\nindex 5bef309af0a4..587dd10eb1ea 100644\n--- a/arch/arm/mach-k3/include/mach/j721e_hardware.h\n+++ b/arch/arm/mach-k3/include/mach/j721e_hardware.h\n@@ -15,6 +15,17 @@\n #define MCU_CTRL_MMR0_BASE\t\t\t\t0x40f00000\n #define CTRL_MMR0_BASE\t\t\t\t\t0x00100000\n \n+#define PMCTRL_IO_1\t\t\t\t\t\t(DMSC_PWRCTRL_BASE + 0x88)\n+#define DMSC_PWRCTRL_BASE\t\t\t\t0x44130000\n+#define CANUART_WAKE_CTRL\t\t\t\t0x18300\n+#define CANUART_WAKE_STAT0\t\t\t\t0x18308\n+#define CANUART_WAKE_STAT1\t\t\t\t0x1830C\n+\n+#define IO_ISO_MAGIC_VAL\t\t\t0x55555554\n+#define IO_ISO_STATUS\t\t\t\tBIT(25)\n+#define CANUART_WAKE_STAT1_CANUART_IO_MODE\tBIT(0)\n+#define DEISOLATION_TIMEOUT_MS\t\t\t10\n+\n #define CTRLMMR_MAIN_DEVSTAT\t\t\t\t(CTRL_MMR0_BASE + 0x30)\n #define MAIN_DEVSTAT_BOOT_MODE_B_MASK\t\tBIT(0)\n #define MAIN_DEVSTAT_BOOT_MODE_B_SHIFT\t\t0\ndiff --git a/arch/arm/mach-k3/include/mach/j784s4_hardware.h b/arch/arm/mach-k3/include/mach/j784s4_hardware.h\nindex 29a894baed34..dd51473419dd 100644\n--- a/arch/arm/mach-k3/include/mach/j784s4_hardware.h\n+++ b/arch/arm/mach-k3/include/mach/j784s4_hardware.h\n@@ -15,6 +15,16 @@\n #define MCU_CTRL_MMR0_BASE\t\t\t\t0x40f00000\n #define CTRL_MMR0_BASE\t\t\t\t\t0x00100000\n \n+#define PMCTRL_IO_0\t\t\t\t\t0x14084\n+#define MCU_GEN_WAKE_CTRL\t\t\t\t0x18310\n+#define MCU_GEN_WAKE_STAT0\t\t\t\t0x18318\n+#define MCU_GEN_WAKE_STAT1\t\t\t\t0x1831C\n+\n+#define IO_ISO_MAGIC_VAL\t\t\t\t0x55555554\n+#define IO_ISO_STATUS\t\t\t\t\tBIT(25)\n+#define MCU_GEN_WAKE_STAT1_MCU_GEN_IO_MODE\t\tBIT(0)\n+#define DEISOLATION_TIMEOUT_MS\t\t\t\t10\n+\n #define CTRLMMR_MAIN_DEVSTAT\t\t\t\t(CTRL_MMR0_BASE + 0x30)\n #define MAIN_DEVSTAT_BOOT_MODE_B_MASK\t\t\tBIT(0)\n #define MAIN_DEVSTAT_BOOT_MODE_B_SHIFT\t\t\t0\ndiff --git a/board/ti/j721e/evm.c b/board/ti/j721e/evm.c\nindex 67ff13828514..41eea1bdea95 100644\n--- a/board/ti/j721e/evm.c\n+++ b/board/ti/j721e/evm.c\n@@ -18,6 +18,7 @@\n #include \n #include \n #include \n+#include \n \n #include \"../common/board_detect.h\"\n #include \"../common/fdt_ops.h\"\n@@ -473,14 +474,42 @@ err_free_gpio:\n \n #if (IS_ENABLED(CONFIG_SPL_BUILD) && IS_ENABLED(CONFIG_TARGET_J7200_R5_EVM))\n \n+static void clear_isolation(void)\n+{\n+\tint ret;\n+\tconst void *wait_reg = (const void *)(WKUP_CTRL_MMR0_BASE + CANUART_WAKE_STAT1);\n+\n+\t/* un-set the magic word for canuart IOs */\n+\twritel(IO_ISO_MAGIC_VAL, WKUP_CTRL_MMR0_BASE + CANUART_WAKE_CTRL);\n+\twritel((IO_ISO_MAGIC_VAL + 0x1), WKUP_CTRL_MMR0_BASE + CANUART_WAKE_CTRL);\n+\twritel(IO_ISO_MAGIC_VAL, WKUP_CTRL_MMR0_BASE + CANUART_WAKE_CTRL);\n+\n+\t/* wait for CANUART_IO_MODE bit to be cleared */\n+\tret = wait_for_bit_32(wait_reg,\n+\t\t\t CANUART_WAKE_STAT1_CANUART_IO_MODE,\n+\t\t\t false,\n+\t\t\t DEISOLATION_TIMEOUT_MS,\n+\t\t\t false);\n+\tif (ret < 0)\n+\t\tpr_err(\"Deisolation timeout\");\n+}\n+\n bool j7xx_board_is_resuming(void)\n {\n \tstruct udevice *pmica;\n+\tu32 pmctrl_val = readl(PMCTRL_IO_1);\n \tint ret;\n \n \tif (gd_k3_resuming() != K3_RESUME_STATE_UNKNOWN)\n \t\tgoto end;\n \n+\tif ((pmctrl_val & IO_ISO_STATUS) == IO_ISO_STATUS) {\n+\t\tclear_isolation();\n+\t\tgd_set_k3_resuming(K3_RESUME_STATE_RESUMING);\n+\t\tdebug(\"Resuming from IO_DDR mode\\n\");\n+\t\tgoto end;\n+\t}\n+\n \tret = uclass_get_device_by_name(UCLASS_PMIC,\n \t\t\t\t\t\"pmic@48\", &pmica);\n \tif (ret) {\ndiff --git a/board/ti/j784s4/evm.c b/board/ti/j784s4/evm.c\nindex 57c2f7018323..eef56556a33c 100644\n--- a/board/ti/j784s4/evm.c\n+++ b/board/ti/j784s4/evm.c\n@@ -13,8 +13,10 @@\n #include \n #include \n #include \n+#include \n #include \"../common/fdt_ops.h\"\n #include \"../common/k3-lpm.h\"\n+#include \"../common.h\"\n \n DECLARE_GLOBAL_DATA_PTR;\n \n@@ -66,15 +68,43 @@ int board_late_init(void)\n #if (IS_ENABLED(CONFIG_SPL_BUILD) && (IS_ENABLED(CONFIG_TARGET_J784S4_R5_EVM) || \\\n \t\t\t\t IS_ENABLED(CONFIG_TARGET_J742S2_R5_EVM)))\n \n+static void clear_isolation(void)\n+{\n+\tint ret;\n+\tconst void *wait_reg = (const void *)(WKUP_CTRL_MMR0_BASE + MCU_GEN_WAKE_STAT1);\n+\n+\t/* un-set the magic word for MCU_GENERAL IOs */\n+\twritel(IO_ISO_MAGIC_VAL, WKUP_CTRL_MMR0_BASE + MCU_GEN_WAKE_CTRL);\n+\twritel((IO_ISO_MAGIC_VAL + 0x1), WKUP_CTRL_MMR0_BASE + MCU_GEN_WAKE_CTRL);\n+\twritel(IO_ISO_MAGIC_VAL, WKUP_CTRL_MMR0_BASE + MCU_GEN_WAKE_CTRL);\n+\n+\t/* wait for MCU_GEN_IO_MODE bit to be cleared */\n+\tret = wait_for_bit_32(wait_reg,\n+\t\t\t MCU_GEN_WAKE_STAT1_MCU_GEN_IO_MODE,\n+\t\t\t false,\n+\t\t\t DEISOLATION_TIMEOUT_MS,\n+\t\t\t false);\n+\tif (ret < 0)\n+\t\tpr_err(\"Deisolation timeout\");\n+}\n+\n /* in board_init_f(), there's no BSS, so we can't use global/static variables */\n bool j7xx_board_is_resuming(void)\n {\n \tstruct udevice *pmic;\n+\tu32 pmctrl_val = readl(WKUP_CTRL_MMR0_BASE + PMCTRL_IO_0);\n \tint err;\n \n \tif (gd_k3_resuming() != K3_RESUME_STATE_UNKNOWN)\n \t\tgoto end;\n \n+\tif ((pmctrl_val & IO_ISO_STATUS) == IO_ISO_STATUS) {\n+\t\tclear_isolation();\n+\t\tgd_set_k3_resuming(K3_RESUME_STATE_RESUMING);\n+\t\tdebug(\"board is resuming from IO_DDR mode\\n\");\n+\t\tgoto end;\n+\t}\n+\n \terr = uclass_get_device_by_name(UCLASS_PMIC,\n \t\t\t\t\t\"pmic@48\", &pmic);\n \tif (err) {\n","prefixes":["17/20"]}