{"id":2230936,"url":"http://patchwork.ozlabs.org/api/1.2/patches/2230936/?format=json","web_url":"http://patchwork.ozlabs.org/project/uboot/patch/20260430084414.1354490-10-richard.genoud@bootlin.com/","project":{"id":18,"url":"http://patchwork.ozlabs.org/api/1.2/projects/18/?format=json","name":"U-Boot","link_name":"uboot","list_id":"u-boot.lists.denx.de","list_email":"u-boot@lists.denx.de","web_url":null,"scm_url":null,"webscm_url":null,"list_archive_url":"","list_archive_url_format":"","commit_url_format":""},"msgid":"<20260430084414.1354490-10-richard.genoud@bootlin.com>","list_archive_url":null,"date":"2026-04-30T08:44:02","name":"[09/20] ram: k3-ddrss: support j784s4/j721e/j721s2 DDR resume","commit_ref":null,"pull_url":null,"state":"new","archived":false,"hash":"94dcd6ac4eacfd2118b22b3fc8edcc3ea09bed94","submitter":{"id":88519,"url":"http://patchwork.ozlabs.org/api/1.2/people/88519/?format=json","name":"Richard Genoud (TI)","email":"richard.genoud@bootlin.com"},"delegate":{"id":3651,"url":"http://patchwork.ozlabs.org/api/1.2/users/3651/?format=json","username":"trini","first_name":"Tom","last_name":"Rini","email":"trini@ti.com"},"mbox":"http://patchwork.ozlabs.org/project/uboot/patch/20260430084414.1354490-10-richard.genoud@bootlin.com/mbox/","series":[{"id":502237,"url":"http://patchwork.ozlabs.org/api/1.2/series/502237/?format=json","web_url":"http://patchwork.ozlabs.org/project/uboot/list/?series=502237","date":"2026-04-30T08:43:53","name":"Introduce resume for J7xx SoCs","version":1,"mbox":"http://patchwork.ozlabs.org/series/502237/mbox/"}],"comments":"http://patchwork.ozlabs.org/api/patches/2230936/comments/","check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/2230936/checks/","tags":{},"related":[],"headers":{"Return-Path":"<u-boot-bounces@lists.denx.de>","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=bootlin.com header.i=@bootlin.com header.a=rsa-sha256\n header.s=dkim header.b=2L5zL6Sa;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de\n (client-ip=2a01:238:438b:c500:173d:9f52:ddab:ee01; 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a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=dkim;\n t=1777538689; h=from:subject:date:message-id:to:cc:mime-version:\n content-transfer-encoding:in-reply-to:references;\n bh=nkatxH/e+mjbFAfJ+Z3uovrnjpAIjVpCSOYU+20PJLg=;\n b=2L5zL6SaT03KlWD65f9vUNxN+ajbcKKvy1l47q/9f2RBHqQ50fDsHzl/JSOrLNUIGdkkAH\n yWlbGl+ClZMM2Q03RBfHkYn4543SA7HKeodEbfu5G0PH+w1C0ck0yrPtAK24EicqLRfPU3\n NHCGC84kRaaBDbgrsMe2icAU2SDqzzlKobPxU6MaNfrhP2HT3hljThuS2/Dgw0Lmc097up\n ix+GOA3fYgKFVqe0vfJIh6FU4jKDs5EDFZ+SXMaFv2sSOvis9cOXeXvblzTK/eeptayJ+w\n M2NSlG7bkVvM3t5+6q5rgf8IZ6/kuykB+slqXNMXwcdVARq9EGA3+y29M849Ug==","From":"\"Richard Genoud (TI)\" <richard.genoud@bootlin.com>","To":"Tom Rini <trini@konsulko.com>, Manorit Chawdhry <m-chawdhry@ti.com>,\n Apurva Nandan <a-nandan@ti.com>, \"Andrew F . Davis\" <afd@ti.com>,\n Vignesh Raghavendra <vigneshr@ti.com>, Bryan Brattlof <bb@ti.com>,\n Vaishnav Achath <vaishnav.a@ti.com>, Jayesh Choudhary <j-choudhary@ti.com>,\n Simon Glass <sjg@chromium.org>, Alper Nebi Yasak <alpernebiyasak@gmail.com>","Cc":"Markus Schneider-Pargmann <msp@baylibre.com>,\n Udit Kumar <u-kumar1@ti.com>,\n Abhash Kumar <a-kumar2@ti.com>,\n Thomas Richard <thomas.richard@bootlin.com>,\n Gregory CLEMENT <gregory.clement@bootlin.com>,\n Thomas Petazzoni <thomas.petazzoni@bootlin.com>,\n Richard Genoud <richard.genoud@bootlin.com>, u-boot@lists.denx.de","Subject":"[PATCH 09/20] ram: k3-ddrss: support j784s4/j721e/j721s2 DDR resume","Date":"Thu, 30 Apr 2026 10:44:02 +0200","Message-ID":"<20260430084414.1354490-10-richard.genoud@bootlin.com>","X-Mailer":"git-send-email 2.47.3","In-Reply-To":"<20260430084414.1354490-1-richard.genoud@bootlin.com>","References":"<20260430084414.1354490-1-richard.genoud@bootlin.com>","MIME-Version":"1.0","Content-Transfer-Encoding":"8bit","X-Last-TLS-Session-Version":"TLSv1.3","X-BeenThere":"u-boot@lists.denx.de","X-Mailman-Version":"2.1.39","Precedence":"list","List-Id":"U-Boot discussion <u-boot.lists.denx.de>","List-Unsubscribe":"<https://lists.denx.de/options/u-boot>,\n <mailto:u-boot-request@lists.denx.de?subject=unsubscribe>","List-Archive":"<https://lists.denx.de/pipermail/u-boot/>","List-Post":"<mailto:u-boot@lists.denx.de>","List-Help":"<mailto:u-boot-request@lists.denx.de?subject=help>","List-Subscribe":"<https://lists.denx.de/listinfo/u-boot>,\n <mailto:u-boot-request@lists.denx.de?subject=subscribe>","Errors-To":"u-boot-bounces@lists.denx.de","Sender":"\"U-Boot\" <u-boot-bounces@lists.denx.de>","X-Virus-Scanned":"clamav-milter 0.103.8 at phobos.denx.de","X-Virus-Status":"Clean"},"content":"j78s4/j721e/j7200/J721s2 can't use the standard resume sequence.\nTypical DDR resume sequence is:\n- exit DDR from retention\n- de-assert the DDR_RET pin\n- restore DDR max frequency\n- exit DDR from low power\n\nWe have to separate each action in order to de-assert the DDR_RET pins\nat the right time, because the DDR_RET pins are all tied together in\nhardware.\n\nAt resume, only the initialization of the DDR is done by the driver, the\nrest is handled in boart_init_f().\nSo, introduce lpm_init_only flag to only initialize the DDR when resume\nis detected for those boards.\n\nSigned-off-by: Richard Genoud (TI) <richard.genoud@bootlin.com>\n---\n drivers/ram/k3-ddrss/k3-ddrss.c | 8 ++++++++\n 1 file changed, 8 insertions(+)","diff":"diff --git a/drivers/ram/k3-ddrss/k3-ddrss.c b/drivers/ram/k3-ddrss/k3-ddrss.c\nindex 7b23123ab00d..5db421353e1f 100644\n--- a/drivers/ram/k3-ddrss/k3-ddrss.c\n+++ b/drivers/ram/k3-ddrss/k3-ddrss.c\n@@ -122,6 +122,7 @@ enum intrlv_size {\n \n struct k3_ddrss_data {\n \tu32 flags;\n+\tbool lpm_init_only;\n \tbool (*is_lpm_resume)(void);\n \tvoid (*ddrss_deassert_retention)(void);\n };\n@@ -1157,6 +1158,9 @@ static int k3_ddrss_probe(struct udevice *dev)\n \tk3_lpddr4_init(ddrss);\n \tk3_lpddr4_hardware_reg_init(ddrss);\n \n+\tif (is_lpm_resume && ddrss_data->lpm_init_only)\n+\t\treturn k3_ddrss_init_freq(ddrss);\n+\n \tif (is_lpm_resume)\n \t\tk3_ddrss_self_refresh_exit(ddrss->ddrss_ctl_cfg);\n \n@@ -1294,6 +1298,8 @@ static struct ram_ops k3_ddrss_ops = {\n \n static const struct k3_ddrss_data k3_data = {\n \t.flags = SINGLE_DDR_SUBSYSTEM,\n+\t.lpm_init_only = true,\n+\t.is_lpm_resume = j7xx_board_is_resuming,\n };\n \n static const struct k3_ddrss_data am62xx_data = {\n@@ -1304,6 +1310,8 @@ static const struct k3_ddrss_data am62xx_data = {\n \n static const struct k3_ddrss_data j721s2_data = {\n \t.flags = MULTI_DDR_SUBSYSTEM,\n+\t.lpm_init_only = true,\n+\t.is_lpm_resume = j7xx_board_is_resuming,\n };\n \n static const struct k3_ddrss_data j722s_data = {\n","prefixes":["09/20"]}