{"id":2230202,"url":"http://patchwork.ozlabs.org/api/1.2/patches/2230202/?format=json","web_url":"http://patchwork.ozlabs.org/project/linux-pci/patch/20260429122617.7324-12-ilpo.jarvinen@linux.intel.com/","project":{"id":28,"url":"http://patchwork.ozlabs.org/api/1.2/projects/28/?format=json","name":"Linux PCI development","link_name":"linux-pci","list_id":"linux-pci.vger.kernel.org","list_email":"linux-pci@vger.kernel.org","web_url":null,"scm_url":null,"webscm_url":null,"list_archive_url":"","list_archive_url_format":"","commit_url_format":""},"msgid":"<20260429122617.7324-12-ilpo.jarvinen@linux.intel.com>","list_archive_url":null,"date":"2026-04-29T12:26:17","name":"[11/11] PCI: Return valid alignment for assigned resources","commit_ref":null,"pull_url":null,"state":"new","archived":false,"hash":"167f42c22f4d944917b0de1f27858879da05772b","submitter":{"id":83553,"url":"http://patchwork.ozlabs.org/api/1.2/people/83553/?format=json","name":"Ilpo Järvinen","email":"ilpo.jarvinen@linux.intel.com"},"delegate":null,"mbox":"http://patchwork.ozlabs.org/project/linux-pci/patch/20260429122617.7324-12-ilpo.jarvinen@linux.intel.com/mbox/","series":[{"id":502050,"url":"http://patchwork.ozlabs.org/api/1.2/series/502050/?format=json","web_url":"http://patchwork.ozlabs.org/project/linux-pci/list/?series=502050","date":"2026-04-29T12:26:06","name":"PCI: pci_resource_alignment() improvement + cleanups","version":1,"mbox":"http://patchwork.ozlabs.org/series/502050/mbox/"}],"comments":"http://patchwork.ozlabs.org/api/patches/2230202/comments/","check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/2230202/checks/","tags":{},"related":[],"headers":{"Return-Path":"\n ","X-Original-To":["incoming@patchwork.ozlabs.org","linux-pci@vger.kernel.org"],"Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=intel.com header.i=@intel.com header.a=rsa-sha256\n header.s=Intel header.b=RQwnT1Ii;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org\n (client-ip=2600:3c0a:e001:db::12fc:5321; helo=sea.lore.kernel.org;\n envelope-from=linux-pci+bounces-53396-incoming=patchwork.ozlabs.org@vger.kernel.org;\n receiver=patchwork.ozlabs.org)","smtp.subspace.kernel.org;\n\tdkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com\n header.b=\"RQwnT1Ii\"","smtp.subspace.kernel.org;\n arc=none smtp.client-ip=198.175.65.12","smtp.subspace.kernel.org;\n dmarc=pass (p=none dis=none) header.from=linux.intel.com","smtp.subspace.kernel.org;\n spf=pass smtp.mailfrom=linux.intel.com"],"Received":["from sea.lore.kernel.org (sea.lore.kernel.org\n [IPv6:2600:3c0a:e001:db::12fc:5321])\n\t(using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)\n\t key-exchange x25519)\n\t(No client certificate requested)\n\tby legolas.ozlabs.org (Postfix) with ESMTPS id 4g5Gsc1ZBMz1yHZ\n\tfor ; Wed, 29 Apr 2026 22:32:36 +1000 (AEST)","from smtp.subspace.kernel.org (conduit.subspace.kernel.org\n [100.90.174.1])\n\tby sea.lore.kernel.org (Postfix) with ESMTP id 6F9FB302A06D\n\tfor ; Wed, 29 Apr 2026 12:28:38 +0000 (UTC)","from localhost.localdomain (localhost.localdomain [127.0.0.1])\n\tby smtp.subspace.kernel.org (Postfix) with ESMTP id 962A439BFF4;\n\tWed, 29 Apr 2026 12:28:37 +0000 (UTC)","from mgamail.intel.com (mgamail.intel.com [198.175.65.12])\n\t(using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits))\n\t(No client certificate requested)\n\tby smtp.subspace.kernel.org (Postfix) with ESMTPS id 1CE453BED01;\n\tWed, 29 Apr 2026 12:28:36 +0000 (UTC)","from orviesa002.jf.intel.com ([10.64.159.142])\n by orvoesa104.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384;\n 29 Apr 2026 05:28:36 -0700","from ijarvine-mobl1.ger.corp.intel.com (HELO localhost)\n ([10.245.245.212])\n by orviesa002-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384;\n 29 Apr 2026 05:28:33 -0700"],"ARC-Seal":"i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116;\n\tt=1777465717; cv=none;\n b=A/N/sq5xZ7AEME/V1lD0JQD9uUoSvBtngD7kq7u2T+QW07u9zhKR1J8aeV8PDdTg3IaoLhgLn3sxb+W9tw3Cmkvu+SP1UKf1FCqwU265lFAqqZ78+XMjRy9+9FYQWMOqVdHxtd/SEtZT22Ea+8mVar139qj8wWgijqeM3O0xE6E=","ARC-Message-Signature":"i=1; a=rsa-sha256; d=subspace.kernel.org;\n\ts=arc-20240116; t=1777465717; c=relaxed/simple;\n\tbh=GKXpXP0HLpIzXt9FVzTWoltHAc5rYgaa1I20ERAvp2k=;\n\th=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References:\n\t MIME-Version:Content-Type;\n b=TlsKtLAHMYs+IYrvCpeXr7JvGF5YUt9BPj9FJRnEKQdEsIm/I2wFpyCcRopwfZw/rwlVBOtNZyD4HSv1V5wMqsnvI5ipT0WaM6VwdlfEglXj790bGU3kLOE+Wg0DJUtWC52rw3Gx7xEW4UYlCICmKOqG1X8jycJUCyP6WB/zKwg=","ARC-Authentication-Results":"i=1; smtp.subspace.kernel.org;\n dmarc=pass (p=none dis=none) header.from=linux.intel.com;\n spf=pass smtp.mailfrom=linux.intel.com;\n dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com\n header.b=RQwnT1Ii; arc=none smtp.client-ip=198.175.65.12","DKIM-Signature":"v=1; a=rsa-sha256; c=relaxed/simple;\n d=intel.com; i=@intel.com; q=dns/txt; s=Intel;\n t=1777465716; x=1809001716;\n h=from:to:cc:subject:date:message-id:in-reply-to:\n references:mime-version:content-transfer-encoding;\n bh=GKXpXP0HLpIzXt9FVzTWoltHAc5rYgaa1I20ERAvp2k=;\n b=RQwnT1IiuxjXRVa0LpywopLXr7yCJ13GRzCCn4qK0VZjXqKoQxsLEU6y\n YHaXf8ifk4LQ/eiHdExerva5y3LRMgGTg+EvAxoMVo/HjrFpjiz1hDUJZ\n tYEiotvcCQ5CaJ5funWzO5ysV3TmTZlUtNUQN6FjY01pvu3lIhwHuQrcX\n OdO4uiNnu53bVPqyZK1rDvtrsAvOPQuUjXqkI+lv60VIOrPcVJwQrTAhV\n S63JNkD7iKS05zizvd73Po0iHHsW3zon1Uq/TgH/oF8PNsRI7CFRnHaYy\n zsPzHmPtubd0SMsaathTmF0alGELtsVqaG/D02YADn0Z4cer8GQe2DwXI\n A==;","X-CSE-ConnectionGUID":["zlIUYeOETpKXizbNKS+LYQ==","wGp35jvkToyaC0AQ8zhvVw=="],"X-CSE-MsgGUID":["R/l30yNDSfaBB/5q4eR3qw==","vJjmMR20RrCYutR71IFsrQ=="],"X-IronPort-AV":["E=McAfee;i=\"6800,10657,11770\"; a=\"89853556\"","E=Sophos;i=\"6.23,206,1770624000\";\n d=\"scan'208\";a=\"89853556\"","E=Sophos;i=\"6.23,206,1770624000\";\n d=\"scan'208\";a=\"264639579\""],"X-ExtLoop1":"1","From":"=?utf-8?q?Ilpo_J=C3=A4rvinen?= ","To":"linux-pci@vger.kernel.org,\n\tBjorn Helgaas ,\n\tShawn Jin ,\n\tlinuxppc-dev@lists.ozlabs.org,\n\tMadhavan Srinivasan ,\n\tMichael Ellerman ,\n\tNicholas Piggin ,\n\tlinux-kernel@vger.kernel.org","Cc":"=?utf-8?q?Ilpo_J=C3=A4rvinen?= ","Subject":"[PATCH 11/11] PCI: Return valid alignment for assigned resources","Date":"Wed, 29 Apr 2026 15:26:17 +0300","Message-Id":"<20260429122617.7324-12-ilpo.jarvinen@linux.intel.com>","X-Mailer":"git-send-email 2.39.5","In-Reply-To":"<20260429122617.7324-1-ilpo.jarvinen@linux.intel.com>","References":"<20260429122617.7324-1-ilpo.jarvinen@linux.intel.com>","Precedence":"bulk","X-Mailing-List":"linux-pci@vger.kernel.org","List-Id":"","List-Subscribe":"","List-Unsubscribe":"","MIME-Version":"1.0","Content-Type":"text/plain; charset=UTF-8","Content-Transfer-Encoding":"8bit"},"content":"When a resource is assigned, IORESOURCE_STARTALIGN flag is cleared,\nresulting in pci_resource_alignment() returning 0 in some situations\n(at least for bridge windows).\n\nAdd heuristic to pci_resource_alignment() which mimics start and size\nalignment by taking minimum of those for an assigned resource. It may\noverestimate alignment when start has large alignment but the exact\nalignment information is not available and regenerating it by sizing\nthe bridge again is costly.\n\nSigned-off-by: Ilpo Järvinen \n---\n drivers/pci/setup-res.c | 13 +++++++++++++\n 1 file changed, 13 insertions(+)","diff":"diff --git a/drivers/pci/setup-res.c b/drivers/pci/setup-res.c\nindex c15bce20815d..03098f159ec9 100644\n--- a/drivers/pci/setup-res.c\n+++ b/drivers/pci/setup-res.c\n@@ -13,6 +13,7 @@\n *\t Resource sorting\n */\n \n+#include \n #include \n #include \n #include \n@@ -265,6 +266,18 @@ resource_size_t pci_resource_alignment(const struct pci_dev *dev,\n \t (res->flags & (IORESOURCE_IO|IORESOURCE_MEM)))\n \t\tmin_align = pci_min_window_alignment(dev->bus, res->flags);\n \n+\tif (resource_assigned(res)) {\n+\t\tresource_size_t start_align = 1, size_align;\n+\n+\t\tsize_align = roundup_pow_of_two(resource_size(res));\n+\t\tif (res->start)\n+\t\t\tstart_align <<= __ffs(res->start);\n+\t\telse\n+\t\t\tstart_align = size_align;\n+\n+\t\treturn max(min(start_align, size_align), min_align);\n+\t}\n+\n \treturn max(resource_alignment(res), min_align);\n }\n \n","prefixes":["11/11"]}