{"id":2230197,"url":"http://patchwork.ozlabs.org/api/1.2/patches/2230197/?format=json","web_url":"http://patchwork.ozlabs.org/project/linuxppc-dev/patch/20260429122617.7324-11-ilpo.jarvinen@linux.intel.com/","project":{"id":2,"url":"http://patchwork.ozlabs.org/api/1.2/projects/2/?format=json","name":"Linux PPC development","link_name":"linuxppc-dev","list_id":"linuxppc-dev.lists.ozlabs.org","list_email":"linuxppc-dev@lists.ozlabs.org","web_url":"https://github.com/linuxppc/wiki/wiki","scm_url":"https://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux.git","webscm_url":"https://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux.git/","list_archive_url":"https://lore.kernel.org/linuxppc-dev/","list_archive_url_format":"https://lore.kernel.org/linuxppc-dev/{}/","commit_url_format":"https://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux.git/commit/?id={}"},"msgid":"<20260429122617.7324-11-ilpo.jarvinen@linux.intel.com>","list_archive_url":"https://lore.kernel.org/linuxppc-dev/20260429122617.7324-11-ilpo.jarvinen@linux.intel.com/","date":"2026-04-29T12:26:16","name":"[10/11] PCI: Lower bound bridge window alignment","commit_ref":null,"pull_url":null,"state":"handled-elsewhere","archived":false,"hash":"e7192c6229f6722ee93ebabd0b10773e40d715d9","submitter":{"id":83553,"url":"http://patchwork.ozlabs.org/api/1.2/people/83553/?format=json","name":"Ilpo Järvinen","email":"ilpo.jarvinen@linux.intel.com"},"delegate":null,"mbox":"http://patchwork.ozlabs.org/project/linuxppc-dev/patch/20260429122617.7324-11-ilpo.jarvinen@linux.intel.com/mbox/","series":[{"id":502049,"url":"http://patchwork.ozlabs.org/api/1.2/series/502049/?format=json","web_url":"http://patchwork.ozlabs.org/project/linuxppc-dev/list/?series=502049","date":"2026-04-29T12:26:06","name":"PCI: pci_resource_alignment() improvement + cleanups","version":1,"mbox":"http://patchwork.ozlabs.org/series/502049/mbox/"}],"comments":"http://patchwork.ozlabs.org/api/patches/2230197/comments/","check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/2230197/checks/","tags":{},"related":[],"headers":{"Return-Path":"\n ","X-Original-To":["incoming@patchwork.ozlabs.org","linuxppc-dev@lists.ozlabs.org"],"Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=intel.com header.i=@intel.com header.a=rsa-sha256\n header.s=Intel header.b=dlIlnp1P;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=lists.ozlabs.org\n (client-ip=2404:9400:21b9:f100::1; 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a=\"89853543\"","E=Sophos;i=\"6.23,206,1770624000\";\n d=\"scan'208\";a=\"89853543\"","E=Sophos;i=\"6.23,206,1770624000\";\n d=\"scan'208\";a=\"264639555\""],"X-ExtLoop1":"1","From":"=?utf-8?q?Ilpo_J=C3=A4rvinen?= ","To":"linux-pci@vger.kernel.org,\n\tBjorn Helgaas ,\n\tShawn Jin ,\n\tlinuxppc-dev@lists.ozlabs.org,\n\tMadhavan Srinivasan ,\n\tMichael Ellerman ,\n\tNicholas Piggin ,\n\tlinux-kernel@vger.kernel.org","Cc":"=?utf-8?q?Ilpo_J=C3=A4rvinen?= ","Subject":"[PATCH 10/11] PCI: Lower bound bridge window alignment","Date":"Wed, 29 Apr 2026 15:26:16 +0300","Message-Id":"<20260429122617.7324-11-ilpo.jarvinen@linux.intel.com>","X-Mailer":"git-send-email 2.39.5","In-Reply-To":"<20260429122617.7324-1-ilpo.jarvinen@linux.intel.com>","References":"<20260429122617.7324-1-ilpo.jarvinen@linux.intel.com>","X-Mailing-List":"linuxppc-dev@lists.ozlabs.org","List-Id":"","List-Help":"","List-Owner":"","List-Post":"","List-Archive":",\n ","List-Subscribe":",\n ,\n ","List-Unsubscribe":"","Precedence":"list","MIME-Version":"1.0","Content-Type":"text/plain; charset=UTF-8","Content-Transfer-Encoding":"8bit","X-Spam-Status":"No, score=-2.3 required=3.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED,\n\tDKIM_VALID,RCVD_IN_DNSWL_MED,SPF_HELO_NONE,SPF_PASS autolearn=disabled\n\tversion=4.0.1 OzLabs 8","X-Spam-Checker-Version":"SpamAssassin 4.0.1 (2024-03-25) on lists.ozlabs.org"},"content":"pci_resource_alignment() does not consider bridge windows special,\nyet their alignment is subject to different requirements from BAR\nalignment.\n\nAdd lower bound to bridge window alignment to help callers out to\nalways have large enough alignment.\n\nSigned-off-by: Ilpo Järvinen \n---\n drivers/pci/setup-res.c | 12 +++++++++++-\n 1 file changed, 11 insertions(+), 1 deletion(-)","diff":"diff --git a/drivers/pci/setup-res.c b/drivers/pci/setup-res.c\nindex 18e8775ea848..c15bce20815d 100644\n--- a/drivers/pci/setup-res.c\n+++ b/drivers/pci/setup-res.c\n@@ -19,7 +19,10 @@\n #include \n #include \n #include \n+#include \n #include \n+#include \n+\n #include \"pci.h\"\n \n static void pci_std_update_resource(struct pci_dev *dev, int resno)\n@@ -250,12 +253,19 @@ resource_size_t pci_resource_alignment(const struct pci_dev *dev,\n \t\t\t\t const struct resource *res)\n {\n \tint resno = pci_resource_num(dev, res);\n+\tresource_size_t min_align = 0;\n \n \tif (pci_resource_is_iov(resno))\n \t\treturn pci_sriov_resource_alignment(dev, resno);\n+\n \tif (dev->class >> 8 == PCI_CLASS_BRIDGE_CARDBUS)\n \t\treturn pci_cardbus_resource_alignment(res);\n-\treturn resource_alignment(res);\n+\n+\tif (pci_resource_is_bridge_win(resno) &&\n+\t (res->flags & (IORESOURCE_IO|IORESOURCE_MEM)))\n+\t\tmin_align = pci_min_window_alignment(dev->bus, res->flags);\n+\n+\treturn max(resource_alignment(res), min_align);\n }\n \n /*\n","prefixes":["10/11"]}