{"id":2226261,"url":"http://patchwork.ozlabs.org/api/1.2/patches/2226261/?format=json","web_url":"http://patchwork.ozlabs.org/project/gcc/patch/bmm.hhubd62wbc.gcc.gcc-TEST.pinskia.20.1.7@forge-stage.sourceware.org/","project":{"id":17,"url":"http://patchwork.ozlabs.org/api/1.2/projects/17/?format=json","name":"GNU Compiler Collection","link_name":"gcc","list_id":"gcc-patches.gcc.gnu.org","list_email":"gcc-patches@gcc.gnu.org","web_url":null,"scm_url":null,"webscm_url":null,"list_archive_url":"","list_archive_url_format":"","commit_url_format":""},"msgid":"<bmm.hhubd62wbc.gcc.gcc-TEST.pinskia.20.1.7@forge-stage.sourceware.org>","list_archive_url":null,"date":"2026-04-22T10:29:52","name":"[v1,07/11] Add a few more testcases","commit_ref":null,"pull_url":null,"state":"new","archived":false,"hash":"67db01b7ad0f5a7518fe7adf246473b6c96d8626","submitter":{"id":93219,"url":"http://patchwork.ozlabs.org/api/1.2/people/93219/?format=json","name":"Andrew Pinski via Sourceware Forge","email":"forge-bot+pinskia@forge-stage.sourceware.org"},"delegate":null,"mbox":"http://patchwork.ozlabs.org/project/gcc/patch/bmm.hhubd62wbc.gcc.gcc-TEST.pinskia.20.1.7@forge-stage.sourceware.org/mbox/","series":[{"id":500972,"url":"http://patchwork.ozlabs.org/api/1.2/series/500972/?format=json","web_url":"http://patchwork.ozlabs.org/project/gcc/list/?series=500972","date":"2026-04-22T10:29:49","name":"WIP: v2hiv4qi","version":1,"mbox":"http://patchwork.ozlabs.org/series/500972/mbox/"}],"comments":"http://patchwork.ozlabs.org/api/patches/2226261/comments/","check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/2226261/checks/","tags":{},"related":[],"headers":{"Return-Path":"<gcc-patches-bounces~incoming=patchwork.ozlabs.org@gcc.gnu.org>","X-Original-To":["incoming@patchwork.ozlabs.org","gcc-patches@gcc.gnu.org"],"Delivered-To":["patchwork-incoming@legolas.ozlabs.org","gcc-patches@gcc.gnu.org"],"Authentication-Results":["legolas.ozlabs.org;\n spf=pass (sender SPF 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b=QRqCsxRh5GOJyLlTHddIxFrjKCB7kvEla9PGl5FGY3RkFJ/7X+poLmB7i6Wi8lef3MKfnsF+3EyFj6CH2mxqBhjWbPdwaUWbGgAzU3t4mrBmsga4hjkB6xX6hpYrXN0I0NBtAqCh+yKXv/TAHVWtkGy6a5g6bf7BCsjTy/yll8Y=","ARC-Message-Signature":"i=1; a=rsa-sha256; d=sourceware.org; s=key;\n t=1776853869; c=relaxed/simple;\n bh=new5W0GITM5GX/OzGggInYZUhpxbj7P3e2FaVqUqY+Q=;\n h=From:Date:Subject:To:Message-ID;\n b=MYg2ELcN3rrqt6/9kbnNtDKHLPomA93/6J7gSAjhIsSRDJurFIQZcuRrRSXqoneMH3jHWonB0d0rdvOyRpjqUjdEQOayOGp8iQWBdBoAYzqcN/6Yg/+G1L7yMwMAjxVPh7iK9GjFNeHo5E2DSbVBm+B05GgHsqfpAQUoY2KbR1o=","ARC-Authentication-Results":"i=1; server2.sourceware.org","From":"Andrew Pinski via Sourceware Forge\n <forge-bot+pinskia@forge-stage.sourceware.org>","Date":"Wed, 22 Apr 2026 10:29:52 +0000","Subject":"[PATCH v1 07/11] Add a few more testcases","To":"gcc-patches mailing list <gcc-patches@gcc.gnu.org>","Message-ID":"\n <bmm.hhubd62wbc.gcc.gcc-TEST.pinskia.20.1.7@forge-stage.sourceware.org>","X-Mailer":"batrachomyomachia","X-Pull-Request-Organization":"gcc","X-Pull-Request-Repository":"gcc-TEST","X-Pull-Request":"https://forge.sourceware.org/gcc/gcc-TEST/pulls/20","References":"\n <bmm.hhubd62wbc.gcc.gcc-TEST.pinskia.20.1.0@forge-stage.sourceware.org>","In-Reply-To":"\n <bmm.hhubd62wbc.gcc.gcc-TEST.pinskia.20.1.0@forge-stage.sourceware.org>","X-Patch-URL":"\n https://forge.sourceware.org/pinskia/gcc-TEST/commit/9a441019e567920cd36e57824676a6b61a6918cd","X-BeenThere":"gcc-patches@gcc.gnu.org","X-Mailman-Version":"2.1.30","Precedence":"list","List-Id":"Gcc-patches mailing list <gcc-patches.gcc.gnu.org>","List-Unsubscribe":"<https://gcc.gnu.org/mailman/options/gcc-patches>,\n <mailto:gcc-patches-request@gcc.gnu.org?subject=unsubscribe>","List-Archive":"<https://gcc.gnu.org/pipermail/gcc-patches/>","List-Post":"<mailto:gcc-patches@gcc.gnu.org>","List-Help":"<mailto:gcc-patches-request@gcc.gnu.org?subject=help>","List-Subscribe":"<https://gcc.gnu.org/mailman/listinfo/gcc-patches>,\n <mailto:gcc-patches-request@gcc.gnu.org?subject=subscribe>","Reply-To":"gcc-patches mailing list <gcc-patches@gcc.gnu.org>,\n pinskia@gcc.gnu.org","Errors-To":"gcc-patches-bounces~incoming=patchwork.ozlabs.org@gcc.gnu.org"},"content":"From: Andrew Pinski <quic_apinski@quicinc.com>\n\ngcc/testsuite/ChangeLog:\n\n\t* gcc.target/aarch64/v2hiv8qi_7.c: New test.\n\t* gcc.target/aarch64/v2hiv8qi_8.c: New test.\n\t* gcc.target/aarch64/v2hiv8qi_9.c: New test.\n\ngcc/testsuite/ChangeLog:\n\n\t* gcc.target/aarch64/v2hiv8qi_7.c: New test.\n\t* gcc.target/aarch64/v2hiv8qi_8.c: New test.\n\t* gcc.target/aarch64/v2hiv8qi_9.c: New test.\n\nSigned-off-by: Andrew Pinski <quic_apinski@quicinc.com>\n---\n gcc/testsuite/gcc.target/aarch64/v2hiv8qi_7.c |  97 +++++++++++\n gcc/testsuite/gcc.target/aarch64/v2hiv8qi_8.c | 144 +++++++++++++++++\n gcc/testsuite/gcc.target/aarch64/v2hiv8qi_9.c | 150 ++++++++++++++++++\n 3 files changed, 391 insertions(+)\n create mode 100644 gcc/testsuite/gcc.target/aarch64/v2hiv8qi_7.c\n create mode 100644 gcc/testsuite/gcc.target/aarch64/v2hiv8qi_8.c\n create mode 100644 gcc/testsuite/gcc.target/aarch64/v2hiv8qi_9.c","diff":"diff --git a/gcc/testsuite/gcc.target/aarch64/v2hiv8qi_7.c b/gcc/testsuite/gcc.target/aarch64/v2hiv8qi_7.c\nnew file mode 100644\nindex 000000000000..0e3735221a04\n--- /dev/null\n+++ b/gcc/testsuite/gcc.target/aarch64/v2hiv8qi_7.c\n@@ -0,0 +1,97 @@\n+/* { dg-do compile } */\n+/* { dg-options \"-O2 -fno-vect-cost-model\" } */\n+/* { dg-final { check-function-bodies \"**\" \"\" \"\" { target aarch64_little_endian } } } */\n+\n+/* Emulate V2HI with V4HI and V4QI with V8QI,\n+   testing shift SLP and pattern. */\n+\n+/*\n+** v2hi_lshift:\n+**\tldr\ts([0-9]+), \\[x0\\]\n+**\tshl\tv([0-9]+).4h, v\\1.4h, 1\n+**\tstr\ts\\2, \\[x0\\]\n+**\tret\n+*/\n+\n+void v2hi_lshift(signed short *t)\n+{\n+  t[0] <<= 1;\n+  t[1] <<= 1;\n+}\n+\n+/*\n+** v2hi_ashiftrt:\n+**\tldr\ts([0-9]+), \\[x0\\]\n+**\tsshr\tv([0-9]+).4h, v\\1.4h, 1\n+**\tstr\ts\\2, \\[x0\\]\n+**\tret\n+*/\n+\n+void v2hi_ashiftrt(signed short *t)\n+{\n+  t[0] >>= 1;\n+  t[1] >>= 1;\n+}\n+\n+/*\n+** v2hi_lshiftrt:\n+**\tldr\ts([0-9]+), \\[x0\\]\n+**\tushr\tv([0-9]+).4h, v\\1.4h, 1\n+**\tstr\ts\\2, \\[x0\\]\n+**\tret\n+*/\n+\n+void v2hi_lshiftrt(unsigned short *t)\n+{\n+  t[0] >>= 1;\n+  t[1] >>= 1;\n+}\n+\n+\n+/*\n+** v4qi_lshift:\n+**\tldr\ts([0-9]+), \\[x0\\]\n+**\tshl\tv([0-9]+).8b, v\\1.8b, 1\n+**\tstr\ts\\2, \\[x0\\]\n+**\tret\n+*/\n+\n+void v4qi_lshift(signed char *t)\n+{\n+  t[0] <<= 1;\n+  t[1] <<= 1;\n+  t[2] <<= 1;\n+  t[3] <<= 1;\n+}\n+\n+/*\n+** v4qi_ashiftrt:\n+**\tldr\ts([0-9]+), \\[x0\\]\n+**\tsshr\tv([0-9]+).8b, v\\1.8b, 1\n+**\tstr\ts\\2, \\[x0\\]\n+**\tret\n+*/\n+\n+void v4qi_ashiftrt(signed char *t)\n+{\n+  t[0] >>= 1;\n+  t[1] >>= 1;\n+  t[2] >>= 1;\n+  t[3] >>= 1;\n+}\n+\n+/*\n+** v4qi_lshiftrt:\n+**\tldr\ts([0-9]+), \\[x0\\]\n+**\tushr\tv([0-9]+).8b, v\\1.8b, 1\n+**\tstr\ts\\2, \\[x0\\]\n+**\tret\n+*/\n+\n+void v4qi_lshiftrt(unsigned char *t)\n+{\n+  t[0] >>= 1;\n+  t[1] >>= 1;\n+  t[2] >>= 1;\n+  t[3] >>= 1;\n+}\n\\ No newline at end of file\ndiff --git a/gcc/testsuite/gcc.target/aarch64/v2hiv8qi_8.c b/gcc/testsuite/gcc.target/aarch64/v2hiv8qi_8.c\nnew file mode 100644\nindex 000000000000..12e275184271\n--- /dev/null\n+++ b/gcc/testsuite/gcc.target/aarch64/v2hiv8qi_8.c\n@@ -0,0 +1,144 @@\n+/* { dg-do compile } */\n+/* { dg-options \"-O2 -fno-vect-cost-model\" } */\n+/* { dg-final { check-function-bodies \"**\" \"\" \"\" { target aarch64_little_endian } } } */\n+\n+/* Emulate V2HI with V4HI and V4QI with V8QI,\n+   testing min/max SLP and pattern. */\n+\n+#define min(a,b) ((a)>(b) ? (b) : (a))\n+#define max(a,b) ((a)<(b) ? (b) : (a))\n+\n+/*\n+** v2hi_smin:\n+**\tmovi\tv[0-9]+.4h, 0x2\n+**\tldr\ts[0-9]+, \\[x0\\]\n+**\tsmin\tv([0-9]+).4h, v[0-9]+.4h, v[0-9]+.4h\n+**\tstr\ts\\1, \\[x0\\]\n+**\tret\n+*/\n+\n+void v2hi_smin(signed short *t)\n+{\n+  t[0] = min(t[0], 2);\n+  t[1] = min(t[1], 2);\n+}\n+\n+\n+/*\n+** v2hi_umin:\n+**\tmovi\tv[0-9]+.4h, 0x2\n+**\tldr\ts[0-9]+, \\[x0\\]\n+**\tumin\tv([0-9]+).4h, v[0-9]+.4h, v[0-9]+.4h\n+**\tstr\ts\\1, \\[x0\\]\n+**\tret\n+*/\n+\n+void v2hi_umin(unsigned short *t)\n+{\n+  t[0] = min(t[0], 2);\n+  t[1] = min(t[1], 2);\n+}\n+\n+\n+/*\n+** v2hi_smax:\n+**\tmovi\tv[0-9]+.4h, 0x2\n+**\tldr\ts[0-9]+, \\[x0\\]\n+**\tsmax\tv([0-9]+).4h, v[0-9]+.4h, v[0-9]+.4h\n+**\tstr\ts\\1, \\[x0\\]\n+**\tret\n+*/\n+\n+void v2hi_smax(signed short *t)\n+{\n+  t[0] = max(t[0], 2);\n+  t[1] = max(t[1], 2);\n+}\n+\n+\n+/*\n+** v2hi_umax:\n+**\tmovi\tv[0-9]+.4h, 0x2\n+**\tldr\ts[0-9]+, \\[x0\\]\n+**\tumax\tv([0-9]+).4h, v[0-9]+.4h, v[0-9]+.4h\n+**\tstr\ts\\1, \\[x0\\]\n+**\tret\n+*/\n+\n+void v2hi_umax(unsigned short *t)\n+{\n+  t[0] = max(t[0], 2);\n+  t[1] = max(t[1], 2);\n+}\n+\n+\n+/*\n+** v4qi_smin:\n+**\tmovi\tv[0-9]+.8b, 0x2\n+**\tldr\ts[0-9]+, \\[x0\\]\n+**\tsmin\tv([0-9]+).8b, v[0-9]+.8b, v[0-9]+.8b\n+**\tstr\ts\\1, \\[x0\\]\n+**\tret\n+*/\n+\n+void v4qi_smin(signed char *t)\n+{\n+  t[0] = min(t[0], 2);\n+  t[1] = min(t[1], 2);\n+  t[2] = min(t[2], 2);\n+  t[3] = min(t[3], 2);\n+}\n+\n+\n+/*\n+** v4qi_umin:\n+**\tmovi\tv[0-9]+.8b, 0x2\n+**\tldr\ts[0-9]+, \\[x0\\]\n+**\tumin\tv([0-9]+).8b, v[0-9]+.8b, v[0-9]+.8b\n+**\tstr\ts\\1, \\[x0\\]\n+**\tret\n+*/\n+\n+void v4qi_umin(unsigned char *t)\n+{\n+  t[0] = min(t[0], 2);\n+  t[1] = min(t[1], 2);\n+  t[2] = min(t[2], 2);\n+  t[3] = min(t[3], 2);\n+}\n+\n+\n+/*\n+** v4qi_smax:\n+**\tmovi\tv[0-9]+.8b, 0x2\n+**\tldr\ts[0-9]+, \\[x0\\]\n+**\tsmax\tv([0-9]+).8b, v[0-9]+.8b, v[0-9]+.8b\n+**\tstr\ts\\1, \\[x0\\]\n+**\tret\n+*/\n+\n+void v4qi_smax(signed char *t)\n+{\n+  t[0] = max(t[0], 2);\n+  t[1] = max(t[1], 2);\n+  t[2] = max(t[2], 2);\n+  t[3] = max(t[3], 2);\n+}\n+\n+\n+/*\n+** v4qi_umax:\n+**\tmovi\tv[0-9]+.8b, 0x2\n+**\tldr\ts[0-9]+, \\[x0\\]\n+**\tumax\tv([0-9]+).8b, v[0-9]+.8b, v[0-9]+.8b\n+**\tstr\ts\\1, \\[x0\\]\n+**\tret\n+*/\n+\n+void v4qi_umax(unsigned char *t)\n+{\n+  t[0] = max(t[0], 2);\n+  t[1] = max(t[1], 2);\n+  t[2] = max(t[2], 2);\n+  t[3] = max(t[3], 2);\n+}\n\\ No newline at end of file\ndiff --git a/gcc/testsuite/gcc.target/aarch64/v2hiv8qi_9.c b/gcc/testsuite/gcc.target/aarch64/v2hiv8qi_9.c\nnew file mode 100644\nindex 000000000000..0631d2f15ba4\n--- /dev/null\n+++ b/gcc/testsuite/gcc.target/aarch64/v2hiv8qi_9.c\n@@ -0,0 +1,150 @@\n+/* { dg-do compile } */\n+/* { dg-options \"-O2 -fno-vect-cost-model\" } */\n+/* { dg-final { check-function-bodies \"**\" \"\" \"\" { target aarch64_little_endian } } } */\n+\n+/* Emulate v4qi with V4HI and V4QI with V8QI,\n+   testing min/max SLP reduction and pattern. */\n+\n+#define min(a,b) ((a)>(b) ? (b) : (a))\n+#define max(a,b) ((a)<(b) ? (b) : (a))\n+\n+\n+/*\n+** v2hi_sminv:\n+**\tldr\ts([0-9]+), \\[x0\\]\n+**\tuzp1\tv([0-9]+).2s, v\\1.2s, v\\1.2s\n+**\tsminv\th([0-9]+), v\\2.4h\n+**\tumov\tx0, v\\3.d\\[0\\]\n+**\tret\n+*/\n+\n+signed short v2hi_sminv(signed short *t)\n+{\n+  signed short tt = t[0];\n+  tt = min(t[0], tt);\n+  tt = min(t[1], tt);\n+  return tt;\n+}\n+/*\n+** v2hi_uminv:\n+**\tldr\ts([0-9]+), \\[x0\\]\n+**\tuzp1\tv([0-9]+).2s, v\\1.2s, v\\1.2s\n+**\tuminv\th([0-9]+), v\\2.4h\n+**\tumov\tx0, v\\3.d\\[0\\]\n+**\tret\n+*/\n+\n+unsigned short v2hi_uminv(unsigned short *t)\n+{\n+  unsigned short tt = t[0];\n+  tt = min(t[0], tt);\n+  tt = min(t[1], tt);\n+  return tt;\n+}\n+\n+/*\n+** v2hi_smaxv:\n+**\tldr\ts([0-9]+), \\[x0\\]\n+**\tuzp1\tv([0-9]+).2s, v\\1.2s, v\\1.2s\n+**\tsmaxv\th([0-9]+), v\\2.4h\n+**\tumov\tx0, v\\3.d\\[0\\]\n+**\tret\n+*/\n+\n+signed short v2hi_smaxv(signed short *t)\n+{\n+  signed short tt = t[0];\n+  tt = max(t[0], tt);\n+  tt = max(t[1], tt);\n+  return tt;\n+}\n+/*  Note uzp1/fmov is not needed here for v2hi_umaxv as\n+    the ldr is already zero extended.\n+** v2hi_umaxv:\n+**\tldr\ts([0-9]+), \\[x0\\]\n+**\tumaxv\th([0-9]+), v\\1.4h\n+**\tumov\tx0, v\\2.d\\[0\\]\n+**\tret\n+*/\n+\n+unsigned short v2hi_umaxv(unsigned short *t)\n+{\n+  unsigned short tt = t[0];\n+  tt = max(t[0], tt);\n+  tt = max(t[1], tt);\n+  return tt;\n+}\n+\n+/*\n+** v4qi_sminv:\n+**\tldr\ts([0-9]+), \\[x0\\]\n+**\tuzp1\tv([0-9]+).2s, v\\1.2s, v\\1.2s\n+**\tsminv\tb([0-9]+), v\\2.8b\n+**\tumov\tx0, v\\3.d\\[0\\]\n+**\tret\n+*/\n+\n+signed char v4qi_sminv(signed char *t)\n+{\n+  signed char tt = t[0];\n+  tt = min(t[0], tt);\n+  tt = min(t[1], tt);\n+  tt = min(t[2], tt);\n+  tt = min(t[3], tt);\n+  return tt;\n+}\n+/*\n+** v4qi_uminv:\n+**\tldr\ts([0-9]+), \\[x0\\]\n+**\tuzp1\tv([0-9]+).2s, v\\1.2s, v\\1.2s\n+**\tuminv\tb([0-9]+), v\\2.8b\n+**\tumov\tx0, v\\3.d\\[0\\]\n+**\tret\n+*/\n+\n+unsigned char v4qi_uminv(unsigned char *t)\n+{\n+  unsigned char tt = t[0];\n+  tt = min(t[0], tt);\n+  tt = min(t[1], tt);\n+  tt = min(t[2], tt);\n+  tt = min(t[3], tt);\n+  return tt;\n+}\n+\n+/*\n+** v4qi_smaxv:\n+**\tldr\ts([0-9]+), \\[x0\\]\n+**\tuzp1\tv([0-9]+).2s, v\\1.2s, v\\1.2s\n+**\tsmaxv\tb([0-9]+), v\\2.8b\n+**\tumov\tx0, v\\3.d\\[0\\]\n+**\tret\n+*/\n+\n+signed char v4qi_smaxv(signed char *t)\n+{\n+  signed char tt = t[0];\n+  tt = max(t[0], tt);\n+  tt = max(t[1], tt);\n+  tt = max(t[2], tt);\n+  tt = max(t[3], tt);\n+  return tt;\n+}\n+/*  Note uzp1/fmov is not needed here for v4qi_umaxv as\n+    the ldr is already zero extended.\n+** v4qi_umaxv:\n+**\tldr\ts([0-9]+), \\[x0\\]\n+**\tumaxv\tb([0-9]+), v\\1.8b\n+**\tumov\tx0, v\\2.d\\[0\\]\n+**\tret\n+*/\n+\n+unsigned char v4qi_umaxv(unsigned char *t)\n+{\n+  unsigned char tt = t[0];\n+  tt = max(t[0], tt);\n+  tt = max(t[1], tt);\n+  tt = max(t[2], tt);\n+  tt = max(t[3], tt);\n+  return tt;\n+}\n\\ No newline at end of file\n","prefixes":["v1","07/11"]}