{"id":2226126,"url":"http://patchwork.ozlabs.org/api/1.2/patches/2226126/?format=json","web_url":"http://patchwork.ozlabs.org/project/linux-pci/patch/20260422093549.407022-7-sherry.sun@nxp.com/","project":{"id":28,"url":"http://patchwork.ozlabs.org/api/1.2/projects/28/?format=json","name":"Linux PCI development","link_name":"linux-pci","list_id":"linux-pci.vger.kernel.org","list_email":"linux-pci@vger.kernel.org","web_url":null,"scm_url":null,"webscm_url":null,"list_archive_url":"","list_archive_url_format":"","commit_url_format":""},"msgid":"<20260422093549.407022-7-sherry.sun@nxp.com>","list_archive_url":null,"date":"2026-04-22T09:35:43","name":"[V14,06/12] arm: dts: imx6sx: Add Root Port node and PERST property","commit_ref":null,"pull_url":null,"state":"new","archived":false,"hash":"1cfc0566d7798f9ef7040934b1aef468b23e8712","submitter":{"id":77063,"url":"http://patchwork.ozlabs.org/api/1.2/people/77063/?format=json","name":"Sherry Sun","email":"sherry.sun@nxp.com"},"delegate":null,"mbox":"http://patchwork.ozlabs.org/project/linux-pci/patch/20260422093549.407022-7-sherry.sun@nxp.com/mbox/","series":[{"id":500954,"url":"http://patchwork.ozlabs.org/api/1.2/series/500954/?format=json","web_url":"http://patchwork.ozlabs.org/project/linux-pci/list/?series=500954","date":"2026-04-22T09:35:40","name":"pci-imx6: Add support for parsing the reset property in new Root Port binding","version":14,"mbox":"http://patchwork.ozlabs.org/series/500954/mbox/"}],"comments":"http://patchwork.ozlabs.org/api/patches/2226126/comments/","check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/2226126/checks/","tags":{},"related":[],"headers":{"Return-Path":"\n ","X-Original-To":["incoming@patchwork.ozlabs.org","linux-pci@vger.kernel.org"],"Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=nxp.com header.i=@nxp.com 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","To":"robh@kernel.org,\n\tkrzk+dt@kernel.org,\n\tconor+dt@kernel.org,\n\tFrank.Li@nxp.com,\n\ts.hauer@pengutronix.de,\n\tkernel@pengutronix.de,\n\tfestevam@gmail.com,\n\tlpieralisi@kernel.org,\n\tkwilczynski@kernel.org,\n\tmani@kernel.org,\n\tbhelgaas@google.com,\n\thongxing.zhu@nxp.com,\n\tl.stach@pengutronix.de","Cc":"imx@lists.linux.dev,\n\tlinux-pci@vger.kernel.org,\n\tlinux-arm-kernel@lists.infradead.org,\n\tdevicetree@vger.kernel.org,\n\tlinux-kernel@vger.kernel.org","Subject":"[PATCH V14 06/12] arm: dts: imx6sx: Add Root Port node and PERST\n property","Date":"Wed, 22 Apr 2026 17:35:43 +0800","Message-Id":"<20260422093549.407022-7-sherry.sun@nxp.com>","X-Mailer":"git-send-email 2.37.1","In-Reply-To":"<20260422093549.407022-1-sherry.sun@nxp.com>","References":"<20260422093549.407022-1-sherry.sun@nxp.com>","Content-Transfer-Encoding":"8bit","Content-Type":"text/plain","X-ClientProxiedBy":"SG2PR01CA0140.apcprd01.prod.exchangelabs.com\n (2603:1096:4:8f::20) To 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qT4O8pnvlTl0XNOmpxWWtvpeJF8qmWKkeSTewBW9ab4jsEzHwXzBGw/IFggZ5Th8xwL3mG8wy3yASSEfAKP01oYqJfc8mw9M+DSi0UhCVVUi4Wi9dAmQSWxHa9s1+QxNznDV9WXVS3Lv9V/QfGJ+flxXv5S7A7qJO2IafgQf+EiNYTpJLwDkhRZ7vGjzW4OqeiWPWhkcFXGXm78udZdv3QsXOILQQ2f+22bhMcnjdwyK/ywoww9BeQ0m19I6ObjVHyfLKTy1J56cj6rIBvIKNG42Y15So4MIdaVoPOOSX4DBJJV70vJ4UbC9aHSsaSr6WtNIPk7pWlTOOTdrlIA5OzCtJ1LXl1VTi/37xuNUvNiDBcAeXSR8BV1R7zqTpHd8xneKuPSQZS7nBV6SrpDi7mA5Caa14T5U/wZHLslb55pnvtfFSWoZjk2C1SkdK6LVony5MKO5FGnHmWRqZeej3u2DhFEUCUZ8lwsH4Iat95IL7FfbS63adgMlc3d7Vu2NXePSNmADZKJwGAB4cv/wxFzNuJYiG5N10p8CDggmhQ9cgkEIfj6EhosVopDsne02fMfrOJn41V4+arqfMPL8diQip68IhPuBKG8oGq1n3WCxSboJqR1WesSUwLrGXUE4xG9NOGtuZ4K+KVr3Uey1FK5y9+bWlY9RwkcLtnAOVZta+OnIJiOLCxWP86MEX63AgpCzofnSATPYSMMVspxXFAw+deaYEklKvGR4ByasjxxIGd+CKGG4hhUBfLoE3PYb/bmTugvXXg/T9z3rj8rfSCQL+wiBByigcjmDqkloLk9C2HNO2MrT29IRUn8Cik1+5AcUfgEfxA6SU/aJ9mjBGNdnh/243Ni/S1ZWBk/4vlicQ3T8m+DkWAOYJ2S9FiWCRPjrh8mTY6sgGSW+ubUFz8+kfGiKkV+rvssuzBOKW14emYL5jvAmvx38K+Tu2bzLUK0KxqoX1e+gBQzRCd1bu4K96CgQSR5YnOdOB3G2EWMO0ASw9jzi0eGVRzNxS3PtW1fydw8q2oard2Cj0GddxXnvXeoixYx5jYQc5mp744bWETLS23nntl9NnLlMWHb/CyA8GpKMe6tRZ31u1PLV/x8KJtfx3fy3RPYwqMmukdYHy12x+9C3p+2PbHddAEIiBSGiGh3jBGzS39o8RINaVCoQjnDCVcqZnBtxABwsux7E3dptSMtHm5Nfqf0nYrbElGkfgIz2d4RPlSV5oEptRPndQEvpuNOZLGj0oOysad8Q06EfQzZi4Mps4N+kMG5oAO36Kllq+fL2lLhkZG3eUdziyn5xXne6FIxMRcliaFGcfx3wOu74c2ISDb9rod2nawyOFyhu2ROBsDy71Q8c7ZGh3BaVz8VjXqMrs1G3hguPvixKUxhzRH+VrdUCjGcrei2zxdaI6PGeFE6xMgHdUCGRdzWQ8YK0SPUFWhXplnA78w0NpY9puf4yCmdnTHBuumnZv1Up8muMN8Kmtgo4JW+11+ycI7jFxhqikoJTDSpPAl2SXQy+EghtqWyqGgsBCQR1O/QgICDmBQkVko22wuYgT3S1MvH9pZcdzG76VrGnNqAZZNfBe3Sxn/ujm244IKcqgvuA/eW4kMmpJqKhl5dg80h2vyO95/mgsJ7RuSDvRfD5HnO7zrlg1SK30qL0RyL5qiwngEn7CmKEeH9R5jXKxrWO4EegkM/lOCrLe9qz8NszbTWprbEMSOtmqWAnrr5mrL9jBrOf1lg8k2ecPA==","X-OriginatorOrg":"nxp.com","X-MS-Exchange-CrossTenant-Network-Message-Id":"\n 7962a439-66a8-4c78-f641-08dea0526417","X-MS-Exchange-CrossTenant-AuthSource":"VI0PR04MB12114.eurprd04.prod.outlook.com","X-MS-Exchange-CrossTenant-AuthAs":"Internal","X-MS-Exchange-CrossTenant-OriginalArrivalTime":"22 Apr 2026 09:34:46.2522\n (UTC)","X-MS-Exchange-CrossTenant-FromEntityHeader":"Hosted","X-MS-Exchange-CrossTenant-Id":"686ea1d3-bc2b-4c6f-a92c-d99c5c301635","X-MS-Exchange-CrossTenant-MailboxType":"HOSTED","X-MS-Exchange-CrossTenant-UserPrincipalName":"\n oUzYmH5vtDCrXMhVG0cRWCpK/cqW0YoVP9D+UjRyOHxRpq54mdp88ZPKeLGa1TmltF/C3WrPDsGdvHrWJhNpAQ==","X-MS-Exchange-Transport-CrossTenantHeadersStamped":"PA2PR04MB10129"},"content":"Since describing the PCIe PERST# property under Host Bridge node is now\ndeprecated, it is recommended to add it to the Root Port node, so\ncreating the Root Port node and add the reset-gpios property in Root\nPort.\n\nSigned-off-by: Sherry Sun \n---\n arch/arm/boot/dts/nxp/imx/imx6sx-sdb.dtsi | 5 +++++\n arch/arm/boot/dts/nxp/imx/imx6sx.dtsi | 11 +++++++++++\n 2 files changed, 16 insertions(+)","diff":"diff --git a/arch/arm/boot/dts/nxp/imx/imx6sx-sdb.dtsi b/arch/arm/boot/dts/nxp/imx/imx6sx-sdb.dtsi\nindex 3e238d8118fa..338de4d144b2 100644\n--- a/arch/arm/boot/dts/nxp/imx/imx6sx-sdb.dtsi\n+++ b/arch/arm/boot/dts/nxp/imx/imx6sx-sdb.dtsi\n@@ -282,11 +282,16 @@ codec: wm8962@1a {\n &pcie {\n \tpinctrl-names = \"default\";\n \tpinctrl-0 = <&pinctrl_pcie>;\n+\t/* This property is deprecated, use reset-gpios from the Root Port node. */\n \treset-gpio = <&gpio2 0 GPIO_ACTIVE_LOW>;\n \tvpcie-supply = <®_pcie_gpio>;\n \tstatus = \"okay\";\n };\n \n+&pcie_port0 {\n+\treset-gpios = <&gpio2 0 GPIO_ACTIVE_LOW>;\n+};\n+\n &lcdif1 {\n \tpinctrl-names = \"default\";\n \tpinctrl-0 = <&pinctrl_lcd>;\ndiff --git a/arch/arm/boot/dts/nxp/imx/imx6sx.dtsi b/arch/arm/boot/dts/nxp/imx/imx6sx.dtsi\nindex aefae5a3a6be..5484c398aa37 100644\n--- a/arch/arm/boot/dts/nxp/imx/imx6sx.dtsi\n+++ b/arch/arm/boot/dts/nxp/imx/imx6sx.dtsi\n@@ -1470,6 +1470,17 @@ pcie: pcie@8ffc000 {\n \t\t\tpower-domains = <&pd_disp>, <&pd_pci>;\n \t\t\tpower-domain-names = \"pcie\", \"pcie_phy\";\n \t\t\tstatus = \"disabled\";\n+\n+\t\t\tpcie_port0: pcie@0 {\n+\t\t\t\tcompatible = \"pciclass,0604\";\n+\t\t\t\tdevice_type = \"pci\";\n+\t\t\t\treg = <0x0 0x0 0x0 0x0 0x0>;\n+\t\t\t\tbus-range = <0x01 0xff>;\n+\n+\t\t\t\t#address-cells = <3>;\n+\t\t\t\t#size-cells = <2>;\n+\t\t\t\tranges;\n+\t\t\t};\n \t\t};\n \t};\n };\n","prefixes":["V14","06/12"]}