{"id":2224654,"url":"http://patchwork.ozlabs.org/api/1.2/patches/2224654/?format=json","web_url":"http://patchwork.ozlabs.org/project/qemu-devel/patch/20260417173105.1648172-10-peter.maydell@linaro.org/","project":{"id":14,"url":"http://patchwork.ozlabs.org/api/1.2/projects/14/?format=json","name":"QEMU Development","link_name":"qemu-devel","list_id":"qemu-devel.nongnu.org","list_email":"qemu-devel@nongnu.org","web_url":"","scm_url":"","webscm_url":"","list_archive_url":"","list_archive_url_format":"","commit_url_format":""},"msgid":"<20260417173105.1648172-10-peter.maydell@linaro.org>","list_archive_url":null,"date":"2026-04-17T17:30:57","name":"[09/17] target: Rename cpu_get_phys_page_{,attrs_}debug","commit_ref":null,"pull_url":null,"state":"new","archived":false,"hash":"fdae978c4f192e3e40bb18ee1eaba8788a7e28c5","submitter":{"id":5111,"url":"http://patchwork.ozlabs.org/api/1.2/people/5111/?format=json","name":"Peter Maydell","email":"peter.maydell@linaro.org"},"delegate":null,"mbox":"http://patchwork.ozlabs.org/project/qemu-devel/patch/20260417173105.1648172-10-peter.maydell@linaro.org/mbox/","series":[{"id":500380,"url":"http://patchwork.ozlabs.org/api/1.2/series/500380/?format=json","web_url":"http://patchwork.ozlabs.org/project/qemu-devel/list/?series=500380","date":"2026-04-17T17:30:51","name":"Handle sub-page granularity in cpu_memory_rw_debug()","version":1,"mbox":"http://patchwork.ozlabs.org/series/500380/mbox/"}],"comments":"http://patchwork.ozlabs.org/api/patches/2224654/comments/","check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/2224654/checks/","tags":{},"related":[],"headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=linaro.org header.i=@linaro.org header.a=rsa-sha256\n header.s=google header.b=Rj6BN3E5;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org\n (client-ip=209.51.188.17; helo=lists1p.gnu.org;\n envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org;\n receiver=patchwork.ozlabs.org)"],"Received":["from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17])\n\t(using TLSv1.2 with cipher ECDHE-ECDSA-AES256-GCM-SHA384 (256/256 bits))\n\t(No client certificate requested)\n\tby legolas.ozlabs.org (Postfix) with ESMTPS id 4fy29G6l8yz1yD3\n\tfor ; Sat, 18 Apr 2026 03:36:02 +1000 (AEST)","from localhost ([::1] helo=lists1p.gnu.org)\n\tby lists1p.gnu.org with esmtp (Exim 4.90_1)\n\t(envelope-from )\n\tid 1wDn36-0007OM-IV; Fri, 17 Apr 2026 13:32:12 -0400","from eggs.gnu.org ([2001:470:142:3::10])\n by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256)\n (Exim 4.90_1) (envelope-from )\n id 1wDn2X-0006pa-HE\n for qemu-devel@nongnu.org; Fri, 17 Apr 2026 13:31:42 -0400","from mail-wm1-x32f.google.com ([2a00:1450:4864:20::32f])\n by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128)\n (Exim 4.90_1) (envelope-from )\n id 1wDn2Q-00026k-KO\n for qemu-devel@nongnu.org; Fri, 17 Apr 2026 13:31:35 -0400","by mail-wm1-x32f.google.com with SMTP id\n 5b1f17b1804b1-488ab2db91aso11368585e9.3\n for ; Fri, 17 Apr 2026 10:31:28 -0700 (PDT)","from lanath.. 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Iglesias\" ,\n Jiaxun Yang , Nicholas Piggin ,\n Chinmay Rath , Glenn Miles ,\n Palmer Dabbelt ,\n Alistair Francis , Weiwei Li ,\n Daniel Henrique Barboza ,\n Liu Zhiwei ,\n Chao Liu , Ilya Leoshkevich ,\n David Hildenbrand ,\n Mark Cave-Ayland ,\n Artyom Tarasenko ","Subject":"[PATCH 09/17] target: Rename cpu_get_phys_page_{,attrs_}debug","Date":"Fri, 17 Apr 2026 18:30:57 +0100","Message-ID":"<20260417173105.1648172-10-peter.maydell@linaro.org>","X-Mailer":"git-send-email 2.43.0","In-Reply-To":"<20260417173105.1648172-1-peter.maydell@linaro.org>","References":"<20260417173105.1648172-1-peter.maydell@linaro.org>","MIME-Version":"1.0","Content-Transfer-Encoding":"8bit","Received-SPF":"pass client-ip=2a00:1450:4864:20::32f;\n envelope-from=peter.maydell@linaro.org; helo=mail-wm1-x32f.google.com","X-Spam_score_int":"-20","X-Spam_score":"-2.1","X-Spam_bar":"--","X-Spam_report":"(-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1,\n DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1,\n RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001,\n SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no","X-Spam_action":"no action","X-BeenThere":"qemu-devel@nongnu.org","X-Mailman-Version":"2.1.29","Precedence":"list","List-Id":"qemu development ","List-Unsubscribe":",\n ","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n ","Errors-To":"qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org","Sender":"qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org"},"content":"Rename cpu_phys_page_debug() and cpu_phys_page_attrs_debug() to\ncpu_phys_addr_debug() and cpu_phys_addr_attrs_debug().\n\nCommit created with:\n sed -i -e 's/cpu_get_phys_page_debug/cpu_get_phys_addr_debug/g;s/cpu_get_phys_page_attrs_debug/cpu_get_phys_addr_attrs_debug/g' $(git grep -l cpu_get_phys_page)\n\nSigned-off-by: Peter Maydell \n---\n hw/core/cpu-system.c | 6 +++---\n hw/i386/vapic.c | 4 ++--\n hw/xtensa/sim.c | 2 +-\n hw/xtensa/xtfpga.c | 2 +-\n include/hw/core/cpu.h | 8 ++++----\n monitor/hmp-cmds.c | 2 +-\n plugins/api.c | 2 +-\n system/physmem.c | 2 +-\n target/sparc/mmu_helper.c | 6 +++---\n target/xtensa/xtensa-semi.c | 2 +-\n 10 files changed, 18 insertions(+), 18 deletions(-)","diff":"diff --git a/hw/core/cpu-system.c b/hw/core/cpu-system.c\nindex 93dc861083..05c126ecb6 100644\n--- a/hw/core/cpu-system.c\n+++ b/hw/core/cpu-system.c\n@@ -55,7 +55,7 @@ bool cpu_get_memory_mapping(CPUState *cpu, MemoryMappingList *list,\n return false;\n }\n \n-hwaddr cpu_get_phys_page_attrs_debug(CPUState *cpu, vaddr addr,\n+hwaddr cpu_get_phys_addr_attrs_debug(CPUState *cpu, vaddr addr,\n MemTxAttrs *attrs)\n {\n hwaddr paddr;\n@@ -73,11 +73,11 @@ hwaddr cpu_get_phys_page_attrs_debug(CPUState *cpu, vaddr addr,\n return paddr;\n }\n \n-hwaddr cpu_get_phys_page_debug(CPUState *cpu, vaddr addr)\n+hwaddr cpu_get_phys_addr_debug(CPUState *cpu, vaddr addr)\n {\n MemTxAttrs attrs = {};\n \n- return cpu_get_phys_page_attrs_debug(cpu, addr, &attrs);\n+ return cpu_get_phys_addr_attrs_debug(cpu, addr, &attrs);\n }\n \n int cpu_asidx_from_attrs(CPUState *cpu, MemTxAttrs attrs)\ndiff --git a/hw/i386/vapic.c b/hw/i386/vapic.c\nindex 41e5ca26df..20183242a7 100644\n--- a/hw/i386/vapic.c\n+++ b/hw/i386/vapic.c\n@@ -173,7 +173,7 @@ static int find_real_tpr_addr(VAPICROMState *s, CPUX86State *env)\n * virtual address space for the APIC mapping.\n */\n for (addr = 0xfffff000; addr >= 0x80000000; addr -= TARGET_PAGE_SIZE) {\n- paddr = cpu_get_phys_page_debug(cs, addr);\n+ paddr = cpu_get_phys_addr_debug(cs, addr);\n if (paddr != APIC_DEFAULT_ADDRESS) {\n continue;\n }\n@@ -305,7 +305,7 @@ static int update_rom_mapping(VAPICROMState *s, CPUX86State *env, target_ulong i\n \n /* find out virtual address of the ROM */\n rom_state_vaddr = s->rom_state_paddr + (ip & 0xf0000000);\n- paddr = cpu_get_phys_page_debug(cs, rom_state_vaddr);\n+ paddr = cpu_get_phys_addr_debug(cs, rom_state_vaddr);\n if (paddr == -1) {\n return -1;\n }\ndiff --git a/hw/xtensa/sim.c b/hw/xtensa/sim.c\nindex 994460d041..32eb16442f 100644\n--- a/hw/xtensa/sim.c\n+++ b/hw/xtensa/sim.c\n@@ -41,7 +41,7 @@ static uint64_t translate_phys_addr(void *opaque, uint64_t addr)\n {\n XtensaCPU *cpu = opaque;\n \n- return cpu_get_phys_page_debug(CPU(cpu), addr);\n+ return cpu_get_phys_addr_debug(CPU(cpu), addr);\n }\n \n static void sim_reset(void *opaque)\ndiff --git a/hw/xtensa/xtfpga.c b/hw/xtensa/xtfpga.c\nindex ed24720f94..0c66dff557 100644\n--- a/hw/xtensa/xtfpga.c\n+++ b/hw/xtensa/xtfpga.c\n@@ -192,7 +192,7 @@ static uint64_t translate_phys_addr(void *opaque, uint64_t addr)\n {\n XtensaCPU *cpu = opaque;\n \n- return cpu_get_phys_page_debug(CPU(cpu), addr);\n+ return cpu_get_phys_addr_debug(CPU(cpu), addr);\n }\n \n static void xtfpga_reset(void *opaque)\ndiff --git a/include/hw/core/cpu.h b/include/hw/core/cpu.h\nindex 04e1f970ca..6dedad535c 100644\n--- a/include/hw/core/cpu.h\n+++ b/include/hw/core/cpu.h\n@@ -745,7 +745,7 @@ enum CPUDumpFlags {\n void cpu_dump_state(CPUState *cpu, FILE *f, int flags);\n \n /**\n- * cpu_get_phys_page_attrs_debug:\n+ * cpu_get_phys_addr_attrs_debug:\n * @cpu: The CPU to obtain the physical page address for.\n * @addr: The virtual address.\n * @attrs: Updated on return with the memory transaction attributes to use\n@@ -757,11 +757,11 @@ void cpu_dump_state(CPUState *cpu, FILE *f, int flags);\n *\n * Returns: Corresponding physical page address or -1 if no page found.\n */\n-hwaddr cpu_get_phys_page_attrs_debug(CPUState *cpu, vaddr addr,\n+hwaddr cpu_get_phys_addr_attrs_debug(CPUState *cpu, vaddr addr,\n MemTxAttrs *attrs);\n \n /**\n- * cpu_get_phys_page_debug:\n+ * cpu_get_phys_addr_debug:\n * @cpu: The CPU to obtain the physical page address for.\n * @addr: The virtual address.\n *\n@@ -770,7 +770,7 @@ hwaddr cpu_get_phys_page_attrs_debug(CPUState *cpu, vaddr addr,\n *\n * Returns: Corresponding physical page address or -1 if no page found.\n */\n-hwaddr cpu_get_phys_page_debug(CPUState *cpu, vaddr addr);\n+hwaddr cpu_get_phys_addr_debug(CPUState *cpu, vaddr addr);\n \n /** cpu_asidx_from_attrs:\n * @cpu: CPU\ndiff --git a/monitor/hmp-cmds.c b/monitor/hmp-cmds.c\nindex bc26b39d70..e6d8322bcc 100644\n--- a/monitor/hmp-cmds.c\n+++ b/monitor/hmp-cmds.c\n@@ -720,7 +720,7 @@ void hmp_gva2gpa(Monitor *mon, const QDict *qdict)\n return;\n }\n \n- gpa = cpu_get_phys_page_debug(cs, addr & TARGET_PAGE_MASK);\n+ gpa = cpu_get_phys_addr_debug(cs, addr & TARGET_PAGE_MASK);\n if (gpa == -1) {\n monitor_printf(mon, \"Unmapped\\n\");\n } else {\ndiff --git a/plugins/api.c b/plugins/api.c\nindex 0c348a789b..4b6fad4999 100644\n--- a/plugins/api.c\n+++ b/plugins/api.c\n@@ -619,7 +619,7 @@ bool qemu_plugin_translate_vaddr(uint64_t vaddr, uint64_t *hwaddr)\n #ifdef CONFIG_SOFTMMU\n g_assert(current_cpu);\n \n- uint64_t res = cpu_get_phys_page_debug(current_cpu, vaddr);\n+ uint64_t res = cpu_get_phys_addr_debug(current_cpu, vaddr);\n \n if (res == (uint64_t)-1) {\n return false;\ndiff --git a/system/physmem.c b/system/physmem.c\nindex 4e26f1a1d4..f2d9a4ff8f 100644\n--- a/system/physmem.c\n+++ b/system/physmem.c\n@@ -4047,7 +4047,7 @@ int cpu_memory_rw_debug(CPUState *cpu, vaddr addr,\n MemTxResult res;\n \n page = addr & TARGET_PAGE_MASK;\n- phys_addr = cpu_get_phys_page_attrs_debug(cpu, page, &attrs);\n+ phys_addr = cpu_get_phys_addr_attrs_debug(cpu, page, &attrs);\n asidx = cpu_asidx_from_attrs(cpu, attrs);\n /* if no physical page mapped, return an error */\n if (phys_addr == -1)\ndiff --git a/target/sparc/mmu_helper.c b/target/sparc/mmu_helper.c\nindex 34b212a7aa..e1abd520c4 100644\n--- a/target/sparc/mmu_helper.c\n+++ b/target/sparc/mmu_helper.c\n@@ -366,20 +366,20 @@ void dump_mmu(CPUSPARCState *env)\n for (n = 0, va = 0; n < 256; n++, va += 16 * 1024 * 1024) {\n pde = mmu_probe(env, va, 2);\n if (pde) {\n- pa = cpu_get_phys_page_debug(cs, va);\n+ pa = cpu_get_phys_addr_debug(cs, va);\n qemu_printf(\"VA: \" TARGET_FMT_lx \", PA: \" HWADDR_FMT_plx\n \" PDE: \" TARGET_FMT_lx \"\\n\", va, pa, pde);\n for (m = 0, va1 = va; m < 64; m++, va1 += 256 * 1024) {\n pde = mmu_probe(env, va1, 1);\n if (pde) {\n- pa = cpu_get_phys_page_debug(cs, va1);\n+ pa = cpu_get_phys_addr_debug(cs, va1);\n qemu_printf(\" VA: \" TARGET_FMT_lx \", PA: \"\n HWADDR_FMT_plx \" PDE: \" TARGET_FMT_lx \"\\n\",\n va1, pa, pde);\n for (o = 0, va2 = va1; o < 64; o++, va2 += 4 * 1024) {\n pde = mmu_probe(env, va2, 0);\n if (pde) {\n- pa = cpu_get_phys_page_debug(cs, va2);\n+ pa = cpu_get_phys_addr_debug(cs, va2);\n qemu_printf(\" VA: \" TARGET_FMT_lx \", PA: \"\n HWADDR_FMT_plx \" PTE: \"\n TARGET_FMT_lx \"\\n\",\ndiff --git a/target/xtensa/xtensa-semi.c b/target/xtensa/xtensa-semi.c\nindex 28dfb29cbd..9a6a9c8b4e 100644\n--- a/target/xtensa/xtensa-semi.c\n+++ b/target/xtensa/xtensa-semi.c\n@@ -215,7 +215,7 @@ void HELPER(simcall)(CPUXtensaState *env)\n uint32_t len_done = 0;\n \n while (len > 0) {\n- hwaddr paddr = cpu_get_phys_page_debug(cs, vaddr);\n+ hwaddr paddr = cpu_get_phys_addr_debug(cs, vaddr);\n uint32_t page_left =\n TARGET_PAGE_SIZE - (vaddr & (TARGET_PAGE_SIZE - 1));\n uint32_t io_sz = page_left < len ? page_left : len;\n","prefixes":["09/17"]}