{"id":2224621,"url":"http://patchwork.ozlabs.org/api/1.2/patches/2224621/?format=json","web_url":"http://patchwork.ozlabs.org/project/qemu-devel/patch/20260417173105.1648172-7-peter.maydell@linaro.org/","project":{"id":14,"url":"http://patchwork.ozlabs.org/api/1.2/projects/14/?format=json","name":"QEMU Development","link_name":"qemu-devel","list_id":"qemu-devel.nongnu.org","list_email":"qemu-devel@nongnu.org","web_url":"","scm_url":"","webscm_url":"","list_archive_url":"","list_archive_url_format":"","commit_url_format":""},"msgid":"<20260417173105.1648172-7-peter.maydell@linaro.org>","list_archive_url":null,"date":"2026-04-17T17:30:54","name":"[06/17] target/s390x: Make get_phys_page_debug handle non-page-aligned addrs","commit_ref":null,"pull_url":null,"state":"new","archived":false,"hash":"de28768c57781409a5404facf7114b897ef49aea","submitter":{"id":5111,"url":"http://patchwork.ozlabs.org/api/1.2/people/5111/?format=json","name":"Peter Maydell","email":"peter.maydell@linaro.org"},"delegate":null,"mbox":"http://patchwork.ozlabs.org/project/qemu-devel/patch/20260417173105.1648172-7-peter.maydell@linaro.org/mbox/","series":[{"id":500380,"url":"http://patchwork.ozlabs.org/api/1.2/series/500380/?format=json","web_url":"http://patchwork.ozlabs.org/project/qemu-devel/list/?series=500380","date":"2026-04-17T17:30:51","name":"Handle sub-page granularity in cpu_memory_rw_debug()","version":1,"mbox":"http://patchwork.ozlabs.org/series/500380/mbox/"}],"comments":"http://patchwork.ozlabs.org/api/patches/2224621/comments/","check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/2224621/checks/","tags":{},"related":[],"headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=linaro.org header.i=@linaro.org header.a=rsa-sha256\n header.s=google header.b=ohf+deQW;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org\n (client-ip=209.51.188.17; helo=lists1p.gnu.org;\n envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org;\n receiver=patchwork.ozlabs.org)"],"Received":["from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17])\n\t(using TLSv1.2 with cipher ECDHE-ECDSA-AES256-GCM-SHA384 (256/256 bits))\n\t(No client certificate requested)\n\tby legolas.ozlabs.org (Postfix) with ESMTPS id 4fy25P22CGz1yDF\n\tfor ; Sat, 18 Apr 2026 03:32:41 +1000 (AEST)","from localhost ([::1] helo=lists1p.gnu.org)\n\tby lists1p.gnu.org with esmtp (Exim 4.90_1)\n\t(envelope-from )\n\tid 1wDn2z-0007Fz-7B; Fri, 17 Apr 2026 13:32:05 -0400","from eggs.gnu.org ([2001:470:142:3::10])\n by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256)\n (Exim 4.90_1) (envelope-from )\n id 1wDn2P-0006kj-6l\n for qemu-devel@nongnu.org; Fri, 17 Apr 2026 13:31:31 -0400","from mail-wm1-x333.google.com ([2a00:1450:4864:20::333])\n by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128)\n (Exim 4.90_1) (envelope-from )\n id 1wDn2K-000259-Py\n for qemu-devel@nongnu.org; Fri, 17 Apr 2026 13:31:27 -0400","by mail-wm1-x333.google.com with SMTP id\n 5b1f17b1804b1-482f454be5bso20229515e9.0\n for ; Fri, 17 Apr 2026 10:31:22 -0700 (PDT)","from lanath.. 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Iglesias\" ,\n Jiaxun Yang , Nicholas Piggin ,\n Chinmay Rath , Glenn Miles ,\n Palmer Dabbelt ,\n Alistair Francis , Weiwei Li ,\n Daniel Henrique Barboza ,\n Liu Zhiwei ,\n Chao Liu , Ilya Leoshkevich ,\n David Hildenbrand ,\n Mark Cave-Ayland ,\n Artyom Tarasenko ","Subject":"[PATCH 06/17] target/s390x: Make get_phys_page_debug handle\n non-page-aligned addrs","Date":"Fri, 17 Apr 2026 18:30:54 +0100","Message-ID":"<20260417173105.1648172-7-peter.maydell@linaro.org>","X-Mailer":"git-send-email 2.43.0","In-Reply-To":"<20260417173105.1648172-1-peter.maydell@linaro.org>","References":"<20260417173105.1648172-1-peter.maydell@linaro.org>","MIME-Version":"1.0","Content-Transfer-Encoding":"8bit","Received-SPF":"pass client-ip=2a00:1450:4864:20::333;\n envelope-from=peter.maydell@linaro.org; helo=mail-wm1-x333.google.com","X-Spam_score_int":"-20","X-Spam_score":"-2.1","X-Spam_bar":"--","X-Spam_report":"(-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1,\n DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1,\n RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001,\n SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no","X-Spam_action":"no action","X-BeenThere":"qemu-devel@nongnu.org","X-Mailman-Version":"2.1.29","Precedence":"list","List-Id":"qemu development ","List-Unsubscribe":",\n ","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n ","Errors-To":"qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org","Sender":"qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org"},"content":"Currently our implementations of SysemuCPUOps::get_phys_page_debug\nand SysemuCPUOps::get_phys_page_attrs_debug are a mix of \"accepts a\nnon-page-aligned virtual address and returns the corresponding\nnon-page-aligned physical address\" and \"only returns a page-aligned\nphysical address\". This is awkward for callsites, which in practice\nall want the physical address for an arbitrary virtual address and\nhave to work around the possibility of getting a page-aligned\naddress, and it doesn't account for protection being possibly on a\nsub-page-sized granularity. We want to standardize on the\nimplementation having to handle non-page-aligned addresses.\n\ns390x already has an implementation of \"give me the actual physical\naddress, not rounded down\", in s390_get_phys_addr_debug(), so we can\nuse this for the SysemuCPUOps::get_phys_page_debug method, and merge\nthe s390_cpu_get_phys_page_debug() function into\ns390_get_phys_addr_debug() which is now its only caller.\n\nThis leaves the function implementing the method with a name\nthat doesn't match the method name, but we will fix that shortly\nby renaming the method to *_addr_* for all targets.\n\nSigned-off-by: Peter Maydell \n---\n target/s390x/cpu-system.c | 2 +-\n target/s390x/helper.c | 20 +++++---------------\n target/s390x/s390x-internal.h | 1 -\n 3 files changed, 6 insertions(+), 17 deletions(-)","diff":"diff --git a/target/s390x/cpu-system.c b/target/s390x/cpu-system.c\nindex 881171d71a..c133b0c262 100644\n--- a/target/s390x/cpu-system.c\n+++ b/target/s390x/cpu-system.c\n@@ -176,7 +176,7 @@ void s390_cpu_finalize(Object *obj)\n \n static const struct SysemuCPUOps s390_sysemu_ops = {\n .has_work = s390_cpu_has_work,\n- .get_phys_page_debug = s390_cpu_get_phys_page_debug,\n+ .get_phys_page_debug = s390_cpu_get_phys_addr_debug,\n .get_crash_info = s390_cpu_get_crash_info,\n .write_elf64_note = s390_cpu_write_elf64_note,\n .legacy_vmsd = &vmstate_s390_cpu,\ndiff --git a/target/s390x/helper.c b/target/s390x/helper.c\nindex 667d4a0da7..1a2658eaf9 100644\n--- a/target/s390x/helper.c\n+++ b/target/s390x/helper.c\n@@ -39,7 +39,7 @@ void s390x_cpu_timer(void *opaque)\n cpu_inject_cpu_timer((S390CPU *) opaque);\n }\n \n-hwaddr s390_cpu_get_phys_page_debug(CPUState *cs, vaddr vaddr)\n+hwaddr s390_cpu_get_phys_addr_debug(CPUState *cs, vaddr addr)\n {\n S390CPU *cpu = S390_CPU(cs);\n CPUS390XState *env = &cpu->env;\n@@ -47,10 +47,11 @@ hwaddr s390_cpu_get_phys_page_debug(CPUState *cs, vaddr vaddr)\n int prot;\n uint64_t asc = env->psw.mask & PSW_MASK_ASC;\n uint64_t tec;\n+ vaddr page = addr & TARGET_PAGE_MASK;\n \n /* 31-Bit mode */\n if (!(env->psw.mask & PSW_MASK_64)) {\n- vaddr &= 0x7fffffff;\n+ page &= 0x7fffffff;\n }\n \n /* We want to read the code (e.g., see what we are single-stepping).*/\n@@ -62,24 +63,13 @@ hwaddr s390_cpu_get_phys_page_debug(CPUState *cs, vaddr vaddr)\n * We want to read code even if IEP is active. Use MMU_DATA_LOAD instead\n * of MMU_INST_FETCH.\n */\n- if (mmu_translate(env, vaddr, MMU_DATA_LOAD, asc, &raddr, &prot, &tec)) {\n+ if (mmu_translate(env, page, MMU_DATA_LOAD, asc, &raddr, &prot, &tec)) {\n return -1;\n }\n+ raddr += (addr & ~TARGET_PAGE_MASK);\n return raddr;\n }\n \n-hwaddr s390_cpu_get_phys_addr_debug(CPUState *cs, vaddr v_addr)\n-{\n- hwaddr phys_addr;\n- vaddr page;\n-\n- page = v_addr & TARGET_PAGE_MASK;\n- phys_addr = cpu_get_phys_page_debug(cs, page);\n- phys_addr += (v_addr & ~TARGET_PAGE_MASK);\n-\n- return phys_addr;\n-}\n-\n static inline bool is_special_wait_psw(uint64_t psw_addr)\n {\n /* signal quiesce */\ndiff --git a/target/s390x/s390x-internal.h b/target/s390x/s390x-internal.h\nindex 40850bcdc4..e7e4f2b45d 100644\n--- a/target/s390x/s390x-internal.h\n+++ b/target/s390x/s390x-internal.h\n@@ -321,7 +321,6 @@ void do_restart_interrupt(CPUS390XState *env);\n void s390x_tod_timer(void *opaque);\n void s390x_cpu_timer(void *opaque);\n void s390_handle_wait(S390CPU *cpu);\n-hwaddr s390_cpu_get_phys_page_debug(CPUState *cpu, vaddr addr);\n hwaddr s390_cpu_get_phys_addr_debug(CPUState *cpu, vaddr addr);\n LowCore *cpu_map_lowcore(CPUS390XState *env);\n void cpu_unmap_lowcore(CPUS390XState *env, LowCore *lowcore);\n","prefixes":["06/17"]}