{"id":2224549,"url":"http://patchwork.ozlabs.org/api/1.2/patches/2224549/?format=json","web_url":"http://patchwork.ozlabs.org/project/qemu-devel/patch/9fada6c8ab0e3397a4b81576edad8f428e4cfdea.1776438369.git.chao.liu.zevorn@gmail.com/","project":{"id":14,"url":"http://patchwork.ozlabs.org/api/1.2/projects/14/?format=json","name":"QEMU Development","link_name":"qemu-devel","list_id":"qemu-devel.nongnu.org","list_email":"qemu-devel@nongnu.org","web_url":"","scm_url":"","webscm_url":"","list_archive_url":"","list_archive_url_format":"","commit_url_format":""},"msgid":"<9fada6c8ab0e3397a4b81576edad8f428e4cfdea.1776438369.git.chao.liu.zevorn@gmail.com>","list_archive_url":null,"date":"2026-04-17T15:11:28","name":"[v6,4/5] tests/qtest: add test for K230 watchdog","commit_ref":null,"pull_url":null,"state":"new","archived":false,"hash":"98ecd0ef17fe9046c0763fcbaa9e87f3ac9220ae","submitter":{"id":92265,"url":"http://patchwork.ozlabs.org/api/1.2/people/92265/?format=json","name":"Chao Liu","email":"chao.liu.zevorn@gmail.com"},"delegate":null,"mbox":"http://patchwork.ozlabs.org/project/qemu-devel/patch/9fada6c8ab0e3397a4b81576edad8f428e4cfdea.1776438369.git.chao.liu.zevorn@gmail.com/mbox/","series":[{"id":500360,"url":"http://patchwork.ozlabs.org/api/1.2/series/500360/?format=json","web_url":"http://patchwork.ozlabs.org/project/qemu-devel/list/?series=500360","date":"2026-04-17T15:11:28","name":"Add support for K230 board","version":6,"mbox":"http://patchwork.ozlabs.org/series/500360/mbox/"}],"comments":"http://patchwork.ozlabs.org/api/patches/2224549/comments/","check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/2224549/checks/","tags":{},"related":[],"headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=gmail.com header.i=@gmail.com header.a=rsa-sha256\n header.s=20251104 header.b=P+Jzw9/O;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org\n (client-ip=209.51.188.17; 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helo=mail-vs1-xe43.google.com","X-Spam_score_int":"-20","X-Spam_score":"-2.1","X-Spam_bar":"--","X-Spam_report":"(-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1,\n DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FROM=0.001,\n RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001,\n SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no","X-Spam_action":"no action","X-BeenThere":"qemu-devel@nongnu.org","X-Mailman-Version":"2.1.29","Precedence":"list","List-Id":"qemu development ","List-Unsubscribe":",\n ","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n ","Errors-To":"qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org","Sender":"qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org"},"content":"From: Chao Liu \n\nTesting the Basic Functions of K230 WDT:\n1. Reset Function\n2. Timeout Check\n3. Interrupt Function\n\nSigned-off-by: Mig Yang \nReviewed-by: Daniel Henrique Barboza \nAcked-by: Fabiano Rosas \n---\n MAINTAINERS | 1 +\n tests/qtest/k230-wdt-test.c | 199 ++++++++++++++++++++++++++++++++++++\n tests/qtest/meson.build | 3 +-\n 3 files changed, 202 insertions(+), 1 deletion(-)\n create mode 100644 tests/qtest/k230-wdt-test.c","diff":"diff --git a/MAINTAINERS b/MAINTAINERS\nindex a2eecca155..b5b4acf6bd 100644\n--- a/MAINTAINERS\n+++ b/MAINTAINERS\n@@ -1780,6 +1780,7 @@ F: hw/riscv/k230.c\n F: hw/watchdog/k230_wdt.c\n F: include/hw/riscv/k230.h\n F: include/hw/watchdog/k230_wdt.h\n+F: tests/qtest/k230-wdt-test.c\n \n RX Machines\n -----------\ndiff --git a/tests/qtest/k230-wdt-test.c b/tests/qtest/k230-wdt-test.c\nnew file mode 100644\nindex 0000000000..2550cebd10\n--- /dev/null\n+++ b/tests/qtest/k230-wdt-test.c\n@@ -0,0 +1,199 @@\n+/*\n+ * QTest testcase for K230 Watchdog\n+ *\n+ * Copyright (c) 2025 Mig Yang \n+ * SPDX-License-Identifier: GPL-2.0-or-later\n+ *\n+ * Provides a board compatible with the kendryte K230 SDK\n+ *\n+ * Documentation: K230_Technical_Reference_Manual_V0.3.1_20241118.pdf\n+ *\n+ * For more information, see \n+ *\n+ * This program is free software; you can redistribute it and/or modify it\n+ * under the terms and conditions of the GNU General Public License,\n+ * version 2 or later, as published by the Free Software Foundation.\n+ *\n+ * This program is distributed in the hope it will be useful, but WITHOUT\n+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or\n+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for\n+ * more details.\n+ *\n+ * You should have received a copy of the GNU General Public License along with\n+ * this program. If not, see .\n+ */\n+\n+#include \"qemu/osdep.h\"\n+#include \"qemu/timer.h\"\n+#include \"qemu/bitops.h\"\n+#include \"libqtest.h\"\n+#include \"hw/watchdog/k230_wdt.h\"\n+\n+/* K230 WDT0 base address */\n+#define K230_WDT0_BASE 0x91106000\n+#define K230_WDT1_BASE 0x91106800\n+\n+/* Test WDT0 by default */\n+#define WDT_BASE K230_WDT0_BASE\n+\n+static void test_register_read_write(void)\n+{\n+ QTestState *qts = qtest_init(\"-machine k230\");\n+\n+ /* Test Control Register (CR) read/write */\n+ qtest_writel(qts, WDT_BASE + K230_WDT_CR, 0xFFFFFFFF);\n+ g_assert_cmphex(qtest_readl(qts, WDT_BASE + K230_WDT_CR), ==,\n+ (K230_WDT_CR_RPL_MASK << K230_WDT_CR_RPL_SHIFT) |\n+ K230_WDT_CR_RMOD | K230_WDT_CR_WDT_EN);\n+\n+ /* Test Timeout Range Register (TORR) read/write */\n+ qtest_writel(qts, WDT_BASE + K230_WDT_TORR, 0xFFFFFFFF);\n+ g_assert_cmphex(qtest_readl(qts, WDT_BASE + K230_WDT_TORR), ==,\n+ K230_WDT_TORR_TOP_MASK);\n+\n+ /* Test Protection Level Register read/write */\n+ qtest_writel(qts, WDT_BASE + K230_WDT_PROT_LEVEL, 0xFFFFFFFF);\n+ g_assert_cmphex(qtest_readl(qts, WDT_BASE + K230_WDT_PROT_LEVEL), ==, 0x7);\n+\n+ qtest_quit(qts);\n+}\n+\n+static void test_counter_restart(void)\n+{\n+ QTestState *qts = qtest_init(\"-machine k230\");\n+\n+ /* Enable watchdog and set timeout */\n+ qtest_writel(qts, WDT_BASE + K230_WDT_CR, K230_WDT_CR_WDT_EN);\n+ qtest_writel(qts, WDT_BASE + K230_WDT_TORR, 0x5); /* TOP = 5 */\n+\n+ /* Read current counter value */\n+ uint32_t initial_count = qtest_readl(qts, WDT_BASE + K230_WDT_CCVR);\n+ g_assert_cmpuint(initial_count, >, 0);\n+\n+ /* Restart counter with magic value */\n+ qtest_writel(qts, WDT_BASE + K230_WDT_CRR, K230_WDT_CRR_RESTART);\n+\n+ /* Wait for time */\n+ qtest_clock_step(qts, NANOSECONDS_PER_SECOND * 2);\n+\n+ /* Counter should be reset to timeout value */\n+ uint32_t new_count = qtest_readl(qts, WDT_BASE + K230_WDT_CCVR);\n+ g_assert_cmpuint(new_count, >, 0);\n+ g_assert_cmpuint(new_count, !=, initial_count);\n+\n+ qtest_quit(qts);\n+}\n+\n+static void test_interrupt_mode(void)\n+{\n+ QTestState *qts = qtest_init(\"-machine k230 --trace k230_*,file=k230.log\");\n+\n+ /* Set interrupt mode and enable watchdog */\n+ qtest_writel(qts, WDT_BASE + K230_WDT_CR,\n+ K230_WDT_CR_RMOD | K230_WDT_CR_WDT_EN);\n+ qtest_writel(qts, WDT_BASE + K230_WDT_TORR, 0x1); /* Short timeout */\n+\n+ /* Wait for timeout to trigger interrupt */\n+ qtest_clock_step(qts, NANOSECONDS_PER_SECOND * 10);\n+\n+ /* Check interrupt status */\n+ uint32_t stat = qtest_readl(qts, WDT_BASE + K230_WDT_STAT);\n+ g_assert_cmphex(stat & K230_WDT_STAT_INT, ==, K230_WDT_STAT_INT);\n+\n+ /* Clear interrupt */\n+ qtest_writel(qts, WDT_BASE + K230_WDT_EOI, 0x1);\n+ stat = qtest_readl(qts, WDT_BASE + K230_WDT_STAT);\n+ g_assert_cmphex(stat & K230_WDT_STAT_INT, ==, 0);\n+\n+ qtest_quit(qts);\n+}\n+\n+static void test_reset_mode(void)\n+{\n+ QTestState *qts = qtest_init(\"-machine k230 -no-reboot\");\n+\n+ /* Set reset mode and enable watchdog */\n+ qtest_writel(qts, WDT_BASE + K230_WDT_CR, K230_WDT_CR_WDT_EN);\n+ qtest_writel(qts, WDT_BASE + K230_WDT_TORR, 0x1); /* Short timeout */\n+\n+ /* Wait for timeout to trigger reset */\n+ qtest_clock_step(qts, NANOSECONDS_PER_SECOND * 2);\n+\n+ /* In reset mode, the system should reset */\n+ /* This test verifies that reset mode is properly configured */\n+\n+ qtest_quit(qts);\n+}\n+\n+static void test_timeout_calculation(void)\n+{\n+ QTestState *qts = qtest_init(\"-machine k230\");\n+\n+ /* Test different timeout values */\n+ for (uint32_t top = 0; top <= 15; top++) {\n+ qtest_writel(qts, WDT_BASE + K230_WDT_TORR, top);\n+ qtest_writel(qts, WDT_BASE + K230_WDT_CR, K230_WDT_CR_WDT_EN);\n+\n+ /* Read current counter value */\n+ uint32_t count = qtest_readl(qts, WDT_BASE + K230_WDT_CCVR);\n+ g_assert_cmpuint(count, >, 0);\n+\n+ /* Disable watchdog for next iteration */\n+ qtest_writel(qts, WDT_BASE + K230_WDT_CR, 0);\n+ }\n+\n+ qtest_quit(qts);\n+}\n+\n+static void test_wdt1_registers(void)\n+{\n+ QTestState *qts = qtest_init(\"-machine k230\");\n+\n+ /* Test WDT1 registers (second watchdog) */\n+ qtest_writel(qts, K230_WDT1_BASE + K230_WDT_CR, 0xFFFFFFFF);\n+ g_assert_cmphex(qtest_readl(qts, K230_WDT1_BASE + K230_WDT_CR), ==,\n+ (K230_WDT_CR_RPL_MASK << K230_WDT_CR_RPL_SHIFT) |\n+ K230_WDT_CR_RMOD | K230_WDT_CR_WDT_EN);\n+\n+ qtest_writel(qts, K230_WDT1_BASE + K230_WDT_TORR, 0xFFFFFFFF);\n+ g_assert_cmphex(qtest_readl(qts, K230_WDT1_BASE + K230_WDT_TORR), ==,\n+ K230_WDT_TORR_TOP_MASK);\n+\n+ qtest_quit(qts);\n+}\n+\n+static void test_enable_disable(void)\n+{\n+ QTestState *qts = qtest_init(\"-machine k230\");\n+\n+ /* Initially disabled */\n+ uint32_t cr = qtest_readl(qts, WDT_BASE + K230_WDT_CR);\n+ g_assert_cmphex(cr & K230_WDT_CR_WDT_EN, ==, 0);\n+\n+ /* Enable watchdog */\n+ qtest_writel(qts, WDT_BASE + K230_WDT_CR, K230_WDT_CR_WDT_EN);\n+ cr = qtest_readl(qts, WDT_BASE + K230_WDT_CR);\n+ g_assert_cmphex(cr & K230_WDT_CR_WDT_EN, ==, K230_WDT_CR_WDT_EN);\n+\n+ /* Disable watchdog */\n+ qtest_writel(qts, WDT_BASE + K230_WDT_CR, 0);\n+ cr = qtest_readl(qts, WDT_BASE + K230_WDT_CR);\n+ g_assert_cmphex(cr & K230_WDT_CR_WDT_EN, ==, 0);\n+\n+ qtest_quit(qts);\n+}\n+\n+int main(int argc, char *argv[])\n+{\n+ g_test_init(&argc, &argv, NULL);\n+\n+ qtest_add_func(\"/k230-wdt/register_read_write\", test_register_read_write);\n+ qtest_add_func(\"/k230-wdt/counter_restart\", test_counter_restart);\n+ qtest_add_func(\"/k230-wdt/interrupt_mode\", test_interrupt_mode);\n+ qtest_add_func(\"/k230-wdt/reset_mode\", test_reset_mode);\n+ qtest_add_func(\"/k230-wdt/timeout_calculation\", test_timeout_calculation);\n+ qtest_add_func(\"/k230-wdt/wdt1_registers\", test_wdt1_registers);\n+ qtest_add_func(\"/k230-wdt/enable_disable\", test_enable_disable);\n+\n+ return g_test_run();\n+}\ndiff --git a/tests/qtest/meson.build b/tests/qtest/meson.build\nindex be4fa627b5..b00e1e1f5d 100644\n--- a/tests/qtest/meson.build\n+++ b/tests/qtest/meson.build\n@@ -288,7 +288,8 @@ qtests_riscv64 = ['riscv-csr-test'] + \\\n (unpack_edk2_blobs ? ['bios-tables-test'] : []) + \\\n (config_all_devices.has_key('CONFIG_IOMMU_TESTDEV') and\n config_all_devices.has_key('CONFIG_RISCV_IOMMU') ?\n- ['iommu-riscv-test'] : [])\n+ ['iommu-riscv-test'] : []) + \\\n+ (config_all_devices.has_key('CONFIG_K230') ? ['k230-wdt-test'] : [])\n \n qos_test_ss = ss.source_set()\n qos_test_ss.add(\n","prefixes":["v6","4/5"]}