{"id":2224409,"url":"http://patchwork.ozlabs.org/api/1.2/patches/2224409/?format=json","web_url":"http://patchwork.ozlabs.org/project/qemu-devel/patch/20260417105618.3621-26-magnuskulke@linux.microsoft.com/","project":{"id":14,"url":"http://patchwork.ozlabs.org/api/1.2/projects/14/?format=json","name":"QEMU Development","link_name":"qemu-devel","list_id":"qemu-devel.nongnu.org","list_email":"qemu-devel@nongnu.org","web_url":"","scm_url":"","webscm_url":"","list_archive_url":"","list_archive_url_format":"","commit_url_format":""},"msgid":"<20260417105618.3621-26-magnuskulke@linux.microsoft.com>","list_archive_url":null,"date":"2026-04-17T10:56:09","name":"[25/34] target/i386/mshv: migrate STIMER state","commit_ref":null,"pull_url":null,"state":"new","archived":false,"hash":"8ccd69d6161f0cbb55c44b61baacb49e0c27f905","submitter":{"id":90753,"url":"http://patchwork.ozlabs.org/api/1.2/people/90753/?format=json","name":"Magnus Kulke","email":"magnuskulke@linux.microsoft.com"},"delegate":null,"mbox":"http://patchwork.ozlabs.org/project/qemu-devel/patch/20260417105618.3621-26-magnuskulke@linux.microsoft.com/mbox/","series":[{"id":500310,"url":"http://patchwork.ozlabs.org/api/1.2/series/500310/?format=json","web_url":"http://patchwork.ozlabs.org/project/qemu-devel/list/?series=500310","date":"2026-04-17T10:55:44","name":"Add migration support to the MSHV accelerator","version":1,"mbox":"http://patchwork.ozlabs.org/series/500310/mbox/"}],"comments":"http://patchwork.ozlabs.org/api/patches/2224409/comments/","check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/2224409/checks/","tags":{},"related":[],"headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (1024-bit key;\n unprotected) header.d=linux.microsoft.com header.i=@linux.microsoft.com\n header.a=rsa-sha256 header.s=default header.b=j+0dmkx8;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org\n (client-ip=209.51.188.17; helo=lists1p.gnu.org;\n envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org;\n receiver=patchwork.ozlabs.org)"],"Received":["from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17])\n\t(using TLSv1.2 with cipher ECDHE-ECDSA-AES256-GCM-SHA384 (256/256 bits))\n\t(No client certificate requested)\n\tby legolas.ozlabs.org (Postfix) with ESMTPS id 4fxsMw5KKkz1yHp\n\tfor ; Fri, 17 Apr 2026 20:59:40 +1000 (AEST)","from localhost ([::1] helo=lists1p.gnu.org)\n\tby lists1p.gnu.org with esmtp (Exim 4.90_1)\n\t(envelope-from )\n\tid 1wDgtr-0003fM-8L; Fri, 17 Apr 2026 06:58:15 -0400","from eggs.gnu.org ([2001:470:142:3::10])\n by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256)\n (Exim 4.90_1) (envelope-from )\n id 1wDgtl-0003Ct-8f\n for qemu-devel@nongnu.org; Fri, 17 Apr 2026 06:58:09 -0400","from linux.microsoft.com ([13.77.154.182])\n by eggs.gnu.org with esmtp (Exim 4.90_1)\n (envelope-from ) id 1wDgtj-0001re-Gx\n for qemu-devel@nongnu.org; Fri, 17 Apr 2026 06:58:09 -0400","from DESKTOP-TUU1E5L.fritz.box (p5086d620.dip0.t-ipconnect.de\n [80.134.214.32])\n by linux.microsoft.com (Postfix) with ESMTPSA id E1F5320B7007;\n Fri, 17 Apr 2026 03:57:53 -0700 (PDT)"],"DKIM-Filter":"OpenDKIM Filter v2.11.0 linux.microsoft.com E1F5320B7007","DKIM-Signature":"v=1; a=rsa-sha256; c=relaxed/relaxed; d=linux.microsoft.com;\n s=default; t=1776423476;\n bh=qy8N8vizhm7Q2Sughpi+d6J12wYekFd3ArpRfw0k1jA=;\n h=From:To:Cc:Subject:Date:In-Reply-To:References:From;\n b=j+0dmkx8id/czeralWXffCE32Wjlpru0MMsY0APqJEuc3eEUX+7OcnjVvrfbN/jph\n vug7c4JXO0cUX8wazQOlLGo2TGzHxiM0fBIsyEJWWPsCqtZKX2VKzHbeGjDt2Q9Kr3\n JpMMQOu9NO3u03Do4Ga5k4yQsXarBaBLihVzW7vs=","From":"Magnus Kulke ","To":"qemu-devel@nongnu.org","Cc":"kvm@vger.kernel.org, Magnus Kulke ,\n Wei Liu , \"Michael S. Tsirkin\" ,\n\t=?utf-8?q?C=C3=A9dric_Le_Goater?= ,\n Zhao Liu ,\n Richard Henderson ,\n Paolo Bonzini , Wei Liu ,\n Magnus Kulke ,\n Alex Williamson ,\n Marcel Apfelbaum , =?utf-8?q?Philippe_Mathieu-D?=\n\t=?utf-8?q?aud=C3=A9?= ,\n Marcelo Tosatti ","Subject":"[PATCH 25/34] target/i386/mshv: migrate STIMER state","Date":"Fri, 17 Apr 2026 12:56:09 +0200","Message-Id":"<20260417105618.3621-26-magnuskulke@linux.microsoft.com>","X-Mailer":"git-send-email 2.34.1","In-Reply-To":"<20260417105618.3621-1-magnuskulke@linux.microsoft.com>","References":"<20260417105618.3621-1-magnuskulke@linux.microsoft.com>","MIME-Version":"1.0","Content-Transfer-Encoding":"8bit","Received-SPF":"pass client-ip=13.77.154.182;\n envelope-from=magnuskulke@linux.microsoft.com; helo=linux.microsoft.com","X-Spam_score_int":"-42","X-Spam_score":"-4.3","X-Spam_bar":"----","X-Spam_report":"(-4.3 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1,\n DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, RCVD_IN_DNSWL_MED=-2.3,\n RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, RCVD_IN_VALIDITY_SAFE_BLOCKED=0.001,\n SPF_HELO_PASS=-0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no","X-Spam_action":"no action","X-BeenThere":"qemu-devel@nongnu.org","X-Mailman-Version":"2.1.29","Precedence":"list","List-Id":"qemu development ","List-Unsubscribe":",\n ","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n ","Errors-To":"qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org","Sender":"qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org"},"content":"This part of Synic state is retrieved via a mem-aligned page. We declare\nthe required space (size reference: rust-vmm/mshv) as a buffer on the VM\nstate struct for inclusion in a migration.\n\nOther than other SynIC features, STIMER doesn't depend on SCONTROL being\nset.\n\nSigned-off-by: Magnus Kulke \n---\n include/system/mshv_int.h | 2 ++\n target/i386/cpu.h | 5 ++++\n target/i386/machine.c | 20 +++++++++++++++\n target/i386/mshv/mshv-cpu.c | 12 +++++++++\n target/i386/mshv/synic.c | 51 +++++++++++++++++++++++++++++++++++++\n 5 files changed, 90 insertions(+)","diff":"diff --git a/include/system/mshv_int.h b/include/system/mshv_int.h\nindex 80df4030c5..7d685fc647 100644\n--- a/include/system/mshv_int.h\n+++ b/include/system/mshv_int.h\n@@ -125,5 +125,7 @@ int mshv_set_simp(int cpu_fd, const uint8_t *page);\n int mshv_get_siefp(int cpu_fd, uint8_t *page);\n int mshv_set_siefp(int cpu_fd, const uint8_t *page);\n bool mshv_synic_enabled(const CPUState *cpu);\n+int mshv_get_synthetic_timers(int cpu_fd, uint8_t *state);\n+int mshv_set_synthetic_timers(int cpu_fd, const uint8_t *state);\n \n #endif\ndiff --git a/target/i386/cpu.h b/target/i386/cpu.h\nindex d010d26146..4ad4a35ce9 100644\n--- a/target/i386/cpu.h\n+++ b/target/i386/cpu.h\n@@ -45,6 +45,10 @@\n #define ELF_MACHINE_UNAME \"i686\"\n #endif\n \n+#ifdef CONFIG_MSHV\n+#define MSHV_STIMERS_STATE_SIZE 200\n+#endif\n+\n enum {\n R_EAX = 0,\n R_ECX = 1,\n@@ -2295,6 +2299,7 @@ typedef struct CPUArchState {\n #if defined(CONFIG_MSHV)\n uint8_t hv_simp_page[HV_HYP_PAGE_SIZE];\n uint8_t hv_siefp_page[HV_HYP_PAGE_SIZE];\n+ uint8_t hv_synthetic_timers_state[MSHV_STIMERS_STATE_SIZE];\n #endif\n \n uint64_t mcg_cap;\ndiff --git a/target/i386/machine.c b/target/i386/machine.c\nindex f94cc544b3..38ccbbe19d 100644\n--- a/target/i386/machine.c\n+++ b/target/i386/machine.c\n@@ -10,6 +10,7 @@\n #include \"exec/watchpoint.h\"\n #include \"system/kvm.h\"\n #include \"system/kvm_xen.h\"\n+#include \"system/mshv.h\"\n #include \"system/tcg.h\"\n \n #include \"qemu/error-report.h\"\n@@ -953,6 +954,24 @@ static const VMStateDescription vmstate_msr_hyperv_reenlightenment = {\n };\n \n #ifdef CONFIG_MSHV\n+\n+static bool mshv_synthetic_timers_needed(void *opaque)\n+{\n+ /* Always migrate synthetic timers */\n+ return mshv_enabled();\n+}\n+\n+static const VMStateDescription vmstate_mshv_synthetic_timers = {\n+ .name = \"cpu/mshv_synthetic_timers\",\n+ .version_id = 1,\n+ .minimum_version_id = 1,\n+ .needed = mshv_synthetic_timers_needed,\n+ .fields = (const VMStateField[]) {\n+ VMSTATE_BUFFER(env.hv_synthetic_timers_state, X86CPU),\n+ VMSTATE_END_OF_LIST()\n+ }\n+};\n+\n static bool mshv_synic_vp_state_needed(void *opaque)\n {\n X86CPU *cpu = opaque;\n@@ -1942,6 +1961,7 @@ const VMStateDescription vmstate_x86_cpu = {\n #endif\n #ifdef CONFIG_MSHV\n &vmstate_mshv_synic_vp_state,\n+ &vmstate_mshv_synthetic_timers,\n #endif\n NULL\n }\ndiff --git a/target/i386/mshv/mshv-cpu.c b/target/i386/mshv/mshv-cpu.c\nindex 36549857ae..9ce66e9aa1 100644\n--- a/target/i386/mshv/mshv-cpu.c\n+++ b/target/i386/mshv/mshv-cpu.c\n@@ -135,6 +135,12 @@ static int get_synic_state(CPUState *cpu)\n int cpu_fd = mshv_vcpufd(cpu);\n int ret;\n \n+ ret = mshv_get_synthetic_timers(cpu_fd, env->hv_synthetic_timers_state);\n+ if (ret < 0) {\n+ error_report(\"failed to get synthetic timers\");\n+ return -1;\n+ }\n+\n /* SIMP/SIEFP can only be read when SynIC is enabled */\n if (!mshv_synic_enabled(cpu)) {\n return 0;\n@@ -1039,6 +1045,12 @@ static int set_synic_state(const CPUState *cpu)\n int cpu_fd = mshv_vcpufd(cpu);\n int ret;\n \n+ ret = mshv_set_synthetic_timers(cpu_fd, env->hv_synthetic_timers_state);\n+ if (ret < 0) {\n+ error_report(\"failed to set synthetic timers state\");\n+ return -1;\n+ }\n+\n /* SIMP/SIEFP can only be written when SynIC is enabled */\n if (!mshv_synic_enabled(cpu)) {\n return 0;\ndiff --git a/target/i386/mshv/synic.c b/target/i386/mshv/synic.c\nindex 8f9fee6ed7..4c629adc3a 100644\n--- a/target/i386/mshv/synic.c\n+++ b/target/i386/mshv/synic.c\n@@ -54,6 +54,57 @@ static int set_vp_state(int cpu_fd, const struct mshv_get_set_vp_state *state)\n return 0;\n }\n \n+int mshv_get_synthetic_timers(int cpu_fd, uint8_t *state)\n+{\n+ int ret;\n+ void *buffer;\n+ struct mshv_get_set_vp_state args = {0};\n+\n+ buffer = qemu_memalign(HV_HYP_PAGE_SIZE, HV_HYP_PAGE_SIZE);\n+ args.buf_ptr = (uint64_t)buffer;\n+ args.buf_sz = HV_HYP_PAGE_SIZE;\n+ args.type = MSHV_VP_STATE_SYNTHETIC_TIMERS;\n+\n+ ret = get_vp_state(cpu_fd, &args);\n+\n+ if (ret < 0) {\n+ qemu_vfree(buffer);\n+ error_report(\"failed to get synthetic timers\");\n+ return -1;\n+ }\n+\n+ memcpy(state, buffer, MSHV_STIMERS_STATE_SIZE);\n+ qemu_vfree(buffer);\n+\n+ return 0;\n+}\n+\n+int mshv_set_synthetic_timers(int cpu_fd, const uint8_t *state)\n+{\n+ int ret;\n+ void *buffer;\n+ struct mshv_get_set_vp_state args = {0};\n+\n+ buffer = qemu_memalign(HV_HYP_PAGE_SIZE, HV_HYP_PAGE_SIZE);\n+ memset(buffer, 0, HV_HYP_PAGE_SIZE);\n+ args.buf_ptr = (uint64_t)buffer;\n+ args.buf_sz = HV_HYP_PAGE_SIZE;\n+ args.type = MSHV_VP_STATE_SYNTHETIC_TIMERS;\n+\n+ assert(state);\n+ memcpy(buffer, state, MSHV_STIMERS_STATE_SIZE);\n+\n+ ret = set_vp_state(cpu_fd, &args);\n+ qemu_vfree(buffer);\n+\n+ if (ret < 0) {\n+ error_report(\"failed to set synthetic timers\");\n+ return -1;\n+ }\n+\n+ return 0;\n+}\n+\n int mshv_get_simp(int cpu_fd, uint8_t *page)\n {\n int ret;\n","prefixes":["25/34"]}