{"id":2224227,"url":"http://patchwork.ozlabs.org/api/1.2/patches/2224227/?format=json","web_url":"http://patchwork.ozlabs.org/project/glibc/patch/CAMe9rOpsk9qDF9jCSEneJQ=wLEaX3EGUJdYRGgBUfFfasUJt2A@mail.gmail.com/","project":{"id":41,"url":"http://patchwork.ozlabs.org/api/1.2/projects/41/?format=json","name":"GNU C Library","link_name":"glibc","list_id":"libc-alpha.sourceware.org","list_email":"libc-alpha@sourceware.org","web_url":"","scm_url":"","webscm_url":"","list_archive_url":"","list_archive_url_format":"","commit_url_format":""},"msgid":"<CAMe9rOpsk9qDF9jCSEneJQ=wLEaX3EGUJdYRGgBUfFfasUJt2A@mail.gmail.com>","list_archive_url":null,"date":"2026-04-17T05:57:20","name":"[v2,1/2] Check if linker supports -z separate-code","commit_ref":null,"pull_url":null,"state":"new","archived":false,"hash":"b455a410cce9733b9fcfa7d3fa445b2df49ec0ef","submitter":{"id":4387,"url":"http://patchwork.ozlabs.org/api/1.2/people/4387/?format=json","name":"H.J. Lu","email":"hjl.tools@gmail.com"},"delegate":null,"mbox":"http://patchwork.ozlabs.org/project/glibc/patch/CAMe9rOpsk9qDF9jCSEneJQ=wLEaX3EGUJdYRGgBUfFfasUJt2A@mail.gmail.com/mbox/","series":[{"id":500239,"url":"http://patchwork.ozlabs.org/api/1.2/series/500239/?format=json","web_url":"http://patchwork.ozlabs.org/project/glibc/list/?series=500239","date":"2026-04-17T05:57:20","name":"[v2,1/2] Check if linker supports -z separate-code","version":2,"mbox":"http://patchwork.ozlabs.org/series/500239/mbox/"}],"comments":"http://patchwork.ozlabs.org/api/patches/2224227/comments/","check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/2224227/checks/","tags":{},"related":[],"headers":{"Return-Path":"<libc-alpha-bounces~incoming=patchwork.ozlabs.org@sourceware.org>","X-Original-To":["incoming@patchwork.ozlabs.org","libc-alpha@sourceware.org"],"Delivered-To":["patchwork-incoming@legolas.ozlabs.org","libc-alpha@sourceware.org"],"Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=gmail.com header.i=@gmail.com header.a=rsa-sha256\n header.s=20251104 header.b=YseTugbr;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=sourceware.org\n (client-ip=2620:52:6:3111::32; helo=vm01.sourceware.org;\n envelope-from=libc-alpha-bounces~incoming=patchwork.ozlabs.org@sourceware.org;\n receiver=patchwork.ozlabs.org)","sourceware.org;\n\tdkim=pass (2048-bit key,\n unprotected) header.d=gmail.com header.i=@gmail.com header.a=rsa-sha256\n header.s=20251104 header.b=YseTugbr","sourceware.org;\n dmarc=pass (p=none dis=none) header.from=gmail.com","sourceware.org; spf=pass smtp.mailfrom=gmail.com","server2.sourceware.org;\n arc=pass smtp.remote-ip=2607:f8b0:4864:20::1033"],"Received":["from vm01.sourceware.org (vm01.sourceware.org\n [IPv6:2620:52:6:3111::32])\n\t(using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)\n\t key-exchange x25519 server-signature ECDSA (secp384r1) server-digest SHA384)\n\t(No client certificate requested)\n\tby legolas.ozlabs.org (Postfix) with ESMTPS id 4fxkhH4KSzz1yDF\n\tfor <incoming@patchwork.ozlabs.org>; Fri, 17 Apr 2026 15:58:23 +1000 (AEST)","from vm01.sourceware.org (localhost [127.0.0.1])\n\tby sourceware.org (Postfix) with ESMTP id 892654BAD169\n\tfor <incoming@patchwork.ozlabs.org>; Fri, 17 Apr 2026 05:58:21 +0000 (GMT)","from mail-pj1-x1033.google.com (mail-pj1-x1033.google.com\n [IPv6:2607:f8b0:4864:20::1033])\n by sourceware.org (Postfix) with ESMTPS id 9F18C4BAD142\n for <libc-alpha@sourceware.org>; Fri, 17 Apr 2026 05:58:00 +0000 (GMT)","by mail-pj1-x1033.google.com with SMTP id\n 98e67ed59e1d1-35da2d35eccso241838a91.0\n for <libc-alpha@sourceware.org>; Thu, 16 Apr 2026 22:58:00 -0700 (PDT)"],"DKIM-Filter":["OpenDKIM Filter v2.11.0 sourceware.org 892654BAD169","OpenDKIM Filter v2.11.0 sourceware.org 9F18C4BAD142"],"DMARC-Filter":"OpenDMARC Filter v1.4.2 sourceware.org 9F18C4BAD142","ARC-Filter":"OpenARC Filter v1.0.0 sourceware.org 9F18C4BAD142","ARC-Seal":["i=2; a=rsa-sha256; d=sourceware.org; s=key; t=1776405480; cv=pass;\n b=we3I93yvpN81tGQxyp9k7IuIc84zsJOgLkrzCKD2XMQT/arLwrCQqqB3AI8zKZakvrxxS7GXjp5tOvPfHsgYFaCQb1OA2yF1M3inrcBUcy2WzfgW81FkfmYwXP4RqgpFPgzwPgnl8j7pdPJiPj7O71pbAwNEU/6CRNZaz41yYgs=","i=1; a=rsa-sha256; t=1776405479; cv=none;\n d=google.com; s=arc-20240605;\n b=WYFMvQ9zBE9lwa7kcfW20CFJxyckba1jgaRrQN9yoMHZiFHGOCmcQnIO+MgyoWuR43\n kBto7gTWXS7q9PBGHsQotBHNFj5Np2RtJGQ57Z8ug9WotEiWSL7hDsHJ8wFihQKCV+to\n a6h15kfgYOukDH1QI4lSckuCh85C8Z6LvV6iUDiKJJH1QLftefOPNIzGNmsefN63+8lZ\n ZfnMUq2It2hrHPqrTVUj0ywt+LqMFbSqXRP+uNoNZsQSCJrkNXzHO7DP0gcjsp7i6IUW\n WsnhYVg63l65OE5BkT3WACnDn7Y1HZyUbpbi1u97zxe5MQ54WfdHS4xy1qxFS1+sgbcv\n T9aQ=="],"ARC-Message-Signature":["i=2; a=rsa-sha256; d=sourceware.org; s=key;\n t=1776405480; c=relaxed/simple;\n bh=gGRZgzJpX/aNlo7/COUSXl0gcwaZsm/CIIsL5uo3PNo=;\n h=DKIM-Signature:MIME-Version:From:Date:Message-ID:Subject:To;\n b=je6WtI+Mbf6fk+vo5/YHS8XCEHz3XHQeMH9yi+f+Txj0sdsvZ0oE6oQMOoFsF37vTAWspAmHNRXGuqrO59/shIcf92bI289/5hvW9reor1SSNYhR4u74DZlI94JRf/mejIlBylbRN2zxyNkEWy4JKR6LZtlA07YvxyuXaIR5yko=","i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com;\n s=arc-20240605;\n h=to:subject:message-id:date:from:in-reply-to:references:mime-version\n :dkim-signature;\n bh=1+SHVo2vq1dPcrQj6EOCj4+06pdk9+QPvVBQsbWKcL8=;\n fh=/eXwpVNxBegZfrfOyFtz/n2HvoReWcLst0S3pIk5NP0=;\n b=Sb9XAYRcy2hcH0ysQX/219UFgDWg3tAnmhjB4h34E3r48xmBQUf9p5Of5NofUmNr8s\n niiBos2wXM0U9Lqq0yfRo/Y1fsLnyPAAe+Cq0NpGvikUdVnAvbjgb6kNaRcSgCO+m++9\n hHQ2hkXvE7+u3eew/uhfd7pFMYCPo6NfaPsvAZQzy0Tl44Mj5+aqFIBTBAViXB3rBJk4\n 1mb7MdmQPeesEFkDGSWkcaqQ3deRp7zKGuoJ4puAnTVqRHMit+sLq2cVqEdQsbyCgW/Y\n eOq9me3XUxl9k+oGlHQ39Me4PZE14PHV5i1UrktRc01eXy7mdH4ma3rxuQN1u5dwZipc\n 6FXg==; darn=sourceware.org"],"ARC-Authentication-Results":["i=2; server2.sourceware.org","i=1; mx.google.com; arc=none"],"DKIM-Signature":"v=1; a=rsa-sha256; c=relaxed/relaxed;\n d=gmail.com; s=20251104; t=1776405479; x=1777010279; darn=sourceware.org;\n h=to:subject:message-id:date:from:in-reply-to:references:mime-version\n :from:to:cc:subject:date:message-id:reply-to;\n bh=1+SHVo2vq1dPcrQj6EOCj4+06pdk9+QPvVBQsbWKcL8=;\n b=YseTugbrnOQUCKWZ6rKMVSa5MQX9aFc4jN/kZl05i2EdmErQGN/G7yTZiSUrH+kVkV\n cWpt1JaoP94K5prk9jgikQw4vW5zb+O3/kjUKXLMZYT2NIBoaiM9SfLzl7ZVmiazMkFP\n dZDiVarNX+Q3qaIXCnPAn8/BDQVD5HSYYzimf4glDE03tehN/xHnzxXi9+k0ITX/4rmX\n 7ieHDQfegCgaSFcpzdF449eCEQindNM0wi2Z4H0jsbeevl904XSOVmPSGPtkm96a+sPT\n 7hAnnqM5h+Go8I3RhH6PLbwirdq1cMlSyAkflMZKXO6vX9aJQTPWtgdaAuu3lwKlj4ha\n WavQ==","X-Google-DKIM-Signature":"v=1; a=rsa-sha256; c=relaxed/relaxed;\n d=1e100.net; s=20251104; t=1776405479; x=1777010279;\n h=to:subject:message-id:date:from:in-reply-to:references:mime-version\n :x-gm-gg:x-gm-message-state:from:to:cc:subject:date:message-id\n :reply-to;\n bh=1+SHVo2vq1dPcrQj6EOCj4+06pdk9+QPvVBQsbWKcL8=;\n b=lZ8cdHr3k/nQYyR8ZCymBX8aOlD+CASyI8ctMbzW2sTDbzm1MMQzGSYko3j2I+Trl1\n CEoVeYdyvg6XoZogZLp3xZziMiFP7yyHOrKGGbMRxO6JiZoGZw1apGS5UYPELpCP6+qi\n 2jBBgDDQKz7C1rEpai4Ne1qBW+iynrwwlawvfsVGBc/BTMRbKqVcjKTyX2rqZmb64xJr\n I/j1gXR/RYmem2jZIlWPOWXilBCzPIjIjoXhVZc/kBPMgw4yfNOoYSwGRkVAbQ5XHRkX\n SFxdpSzh+I3RZKU6H+I3VtC3+rbwL4ff/rwQaJT1W50rsUiF4kQTwA1VSU9O5sjqKVZP\n VOpw==","X-Gm-Message-State":"AOJu0YwdCLIdFMiEJ2/dW4uFwQ2Q5ZG3lB/tvPYdzWuIrCYBEd4eL5Sh\n gSwE9Otxm1xhqwGLHKmxoHSwNuAkaVB1Dvoh4jKWaXHgFU6i51V1+WTDw/CORcNSsBjcJuJ+3ZU\n +NBcuNqnNmbLqgnvH0MDqjlKbg0f/nMZ52ThdwfA=","X-Gm-Gg":"AeBDievXwJFGl3SHP7+lMdam+FMvC2K81YCJsbNs4d0Mn73l7/iIaZgaU094T2n8b5B\n V12gzbmEylhlIqCviXGhGOhPn4PTbZiDSHZPzcH/49edDiFQMAdsg9YYrJCSE/baHS6PkkZ+szz\n CihtrIsnKT3e4Mpx8Brp+TgbMY7hiaInXC+UbvWt7pR4AymkE3UK88HB9yExtLPIoXdNX6NFjmy\n qiV0KC3XoyjuiVge4VemLkWeSoMHIJpoDkZfjbb2Si0i2HhP03uELkr0FmeRRafmCPc6sad2lDy\n b9gUg89vJrwivs8jllM=","X-Received":"by 2002:a17:90b:518c:b0:35b:e52a:6fe5 with SMTP id\n 98e67ed59e1d1-361403cbdecmr1473030a91.5.1776405479246; Thu, 16 Apr 2026\n 22:57:59 -0700 (PDT)","MIME-Version":"1.0","References":"\n <CAMe9rOp4UzKvTHeUOCL95sngmcAfRKnaL2B=zFgetMfG=AG0Kw@mail.gmail.com>","In-Reply-To":"\n <CAMe9rOp4UzKvTHeUOCL95sngmcAfRKnaL2B=zFgetMfG=AG0Kw@mail.gmail.com>","From":"\"H.J. Lu\" <hjl.tools@gmail.com>","Date":"Fri, 17 Apr 2026 13:57:20 +0800","X-Gm-Features":"AQROBzDWdqHGg-M4kS1XNQYWUn_uwsptQA0MqyoJaeG-NK2dFINJXSJUrAdxWUY","Message-ID":"\n <CAMe9rOpsk9qDF9jCSEneJQ=wLEaX3EGUJdYRGgBUfFfasUJt2A@mail.gmail.com>","Subject":"[PATCH v2 1/2] Check if linker supports -z separate-code","To":"GNU C Library <libc-alpha@sourceware.org>, WANG Rui <wangrui@loongson.cn>","Content-Type":"multipart/mixed; boundary=\"000000000000921f9d064fa1a19b\"","X-BeenThere":"libc-alpha@sourceware.org","X-Mailman-Version":"2.1.30","Precedence":"list","List-Id":"Libc-alpha mailing list <libc-alpha.sourceware.org>","List-Unsubscribe":"<https://sourceware.org/mailman/options/libc-alpha>,\n <mailto:libc-alpha-request@sourceware.org?subject=unsubscribe>","List-Archive":"<https://sourceware.org/pipermail/libc-alpha/>","List-Post":"<mailto:libc-alpha@sourceware.org>","List-Help":"<mailto:libc-alpha-request@sourceware.org?subject=help>","List-Subscribe":"<https://sourceware.org/mailman/listinfo/libc-alpha>,\n <mailto:libc-alpha-request@sourceware.org?subject=subscribe>","Errors-To":"libc-alpha-bounces~incoming=patchwork.ozlabs.org@sourceware.org"},"content":"On Fri, Apr 17, 2026 at 12:09 PM H.J. Lu <hjl.tools@gmail.com> wrote:\n>\n> Set have-separate-code to yes if linker supports -z separate-code.\n>\n\nUnchanged from v1.","diff":"From c9b366a4b5afa30e0f4dd5022ab74cbc47207ae7 Mon Sep 17 00:00:00 2001\nFrom: \"H.J. Lu\" <hjl.tools@gmail.com>\nDate: Tue, 14 Apr 2026 11:06:31 +0800\nSubject: [PATCH v2] x86: Zero ZMM16-31 when zeroing all call used registers\n\nWhen zeroing all call used registers with AVX512F enabled, zero ZMM16-31\nexplicitly since vzeroall doesn't touch ZMM16-31.  Also add a test for\nzeroing all call used registers with both AVX512F and APX enabled.\n\ngcc/\n\n\tPR target/124876\n\t* config/i386/i386.cc (ix86_zero_call_used_regs): Zero ZMM16-31\n\tif needed.\n\ngcc/testsuite/\n\n\tPR target/124876\n\t* gcc.target/i386/zero-scratch-regs-23.c: Scan vpxord on ZMM16-31.\n\t* gcc.target/i386/zero-scratch-regs-33.c: New test.\n\nSigned-off-by: H.J. Lu <hjl.tools@gmail.com>\n---\n gcc/config/i386/i386.cc                       | 11 ++++\n .../gcc.target/i386/zero-scratch-regs-23.c    | 16 +++++\n .../gcc.target/i386/zero-scratch-regs-33.c    | 60 +++++++++++++++++++\n 3 files changed, 87 insertions(+)\n create mode 100644 gcc/testsuite/gcc.target/i386/zero-scratch-regs-33.c\n\ndiff --git a/gcc/config/i386/i386.cc b/gcc/config/i386/i386.cc\nindex dd017bc7ac3..c93ea383668 100644\n--- a/gcc/config/i386/i386.cc\n+++ b/gcc/config/i386/i386.cc\n@@ -4078,6 +4078,17 @@ ix86_zero_call_used_regs (HARD_REG_SET need_zeroed_hardregs)\n     {\n       emit_insn (zero_all_vec_insn);\n       all_sse_zeroed = true;\n+      if (TARGET_64BIT && TARGET_AVX512F)\n+\t{\n+\t  rtx zero = CONST0_RTX (V4SFmode);\n+\t  for (unsigned int regno = XMM16_REG;\n+\t       regno <= XMM31_REG;\n+\t       regno++)\n+\t    {\n+\t      rtx reg = gen_rtx_REG (V4SFmode, regno);\n+\t      emit_move_insn (reg, zero);\n+\t    }\n+\t}\n     }\n \n   /* mm/st registers are shared registers set, we should follow the following\ndiff --git a/gcc/testsuite/gcc.target/i386/zero-scratch-regs-23.c b/gcc/testsuite/gcc.target/i386/zero-scratch-regs-23.c\nindex a3285bed8a0..397893faa6c 100644\n--- a/gcc/testsuite/gcc.target/i386/zero-scratch-regs-23.c\n+++ b/gcc/testsuite/gcc.target/i386/zero-scratch-regs-23.c\n@@ -7,6 +7,22 @@ foo (void)\n }\n \n /* { dg-final { scan-assembler \"vzeroall\" } } */\n+/* { dg-final { scan-assembler \"vpxord\\[ \\t\\]+%zmm16, %zmm16, %zmm16\" { target { ! ia32 } } } } */\n+/* { dg-final { scan-assembler \"vpxord\\[ \\t\\]+%zmm17, %zmm17, %zmm17\" { target { ! ia32 } } } } */\n+/* { dg-final { scan-assembler \"vpxord\\[ \\t\\]+%zmm18, %zmm18, %zmm18\" { target { ! ia32 } } } } */\n+/* { dg-final { scan-assembler \"vpxord\\[ \\t\\]+%zmm19, %zmm19, %zmm19\" { target { ! ia32 } } } } */\n+/* { dg-final { scan-assembler \"vpxord\\[ \\t\\]+%zmm20, %zmm20, %zmm20\" { target { ! ia32 } } } } */\n+/* { dg-final { scan-assembler \"vpxord\\[ \\t\\]+%zmm21, %zmm21, %zmm21\" { target { ! ia32 } } } } */\n+/* { dg-final { scan-assembler \"vpxord\\[ \\t\\]+%zmm22, %zmm22, %zmm22\" { target { ! ia32 } } } } */\n+/* { dg-final { scan-assembler \"vpxord\\[ \\t\\]+%zmm23, %zmm23, %zmm23\" { target { ! ia32 } } } } */\n+/* { dg-final { scan-assembler \"vpxord\\[ \\t\\]+%zmm24, %zmm24, %zmm24\" { target { ! ia32 } } } } */\n+/* { dg-final { scan-assembler \"vpxord\\[ \\t\\]+%zmm25, %zmm25, %zmm25\" { target { ! ia32 } } } } */\n+/* { dg-final { scan-assembler \"vpxord\\[ \\t\\]+%zmm26, %zmm26, %zmm26\" { target { ! ia32 } } } } */\n+/* { dg-final { scan-assembler \"vpxord\\[ \\t\\]+%zmm27, %zmm27, %zmm27\" { target { ! ia32 } } } } */\n+/* { dg-final { scan-assembler \"vpxord\\[ \\t\\]+%zmm28, %zmm28, %zmm28\" { target { ! ia32 } } } } */\n+/* { dg-final { scan-assembler \"vpxord\\[ \\t\\]+%zmm29, %zmm29, %zmm29\" { target { ! ia32 } } } } */\n+/* { dg-final { scan-assembler \"vpxord\\[ \\t\\]+%zmm30, %zmm30, %zmm30\" { target { ! ia32 } } } } */\n+/* { dg-final { scan-assembler \"vpxord\\[ \\t\\]+%zmm31, %zmm31, %zmm31\" { target { ! ia32 } } } } */\n /* { dg-final { scan-assembler-times \"fldz\" 8 } } */\n /* { dg-final { scan-assembler-times \"fstp\\[ \\t\\]+%st\\\\(0\\\\)\" 8 } } */\n /* { dg-final { scan-assembler-not \"%xmm\" } } */\ndiff --git a/gcc/testsuite/gcc.target/i386/zero-scratch-regs-33.c b/gcc/testsuite/gcc.target/i386/zero-scratch-regs-33.c\nnew file mode 100644\nindex 00000000000..f40fe2a5377\n--- /dev/null\n+++ b/gcc/testsuite/gcc.target/i386/zero-scratch-regs-33.c\n@@ -0,0 +1,60 @@\n+/* { dg-do compile { target { *-*-linux* && { ! ia32 } } } } */\n+/* { dg-options \"-O2 -fzero-call-used-regs=all -march=corei7 -mavx512f -mapxf\" } */\n+\n+void\n+foo (void)\n+{\n+}\n+\n+/* { dg-final { scan-assembler \"vzeroall\" } } */\n+/* { dg-final { scan-assembler \"vpxord\\[ \\t\\]+%zmm16, %zmm16, %zmm16\" } } */\n+/* { dg-final { scan-assembler \"vpxord\\[ \\t\\]+%zmm17, %zmm17, %zmm17\" } } */\n+/* { dg-final { scan-assembler \"vpxord\\[ \\t\\]+%zmm18, %zmm18, %zmm18\" } } */\n+/* { dg-final { scan-assembler \"vpxord\\[ \\t\\]+%zmm19, %zmm19, %zmm19\" } } */\n+/* { dg-final { scan-assembler \"vpxord\\[ \\t\\]+%zmm20, %zmm20, %zmm20\" } } */\n+/* { dg-final { scan-assembler \"vpxord\\[ \\t\\]+%zmm21, %zmm21, %zmm21\" } } */\n+/* { dg-final { scan-assembler \"vpxord\\[ \\t\\]+%zmm22, %zmm22, %zmm22\" } } */\n+/* { dg-final { scan-assembler \"vpxord\\[ \\t\\]+%zmm23, %zmm23, %zmm23\" } } */\n+/* { dg-final { scan-assembler \"vpxord\\[ \\t\\]+%zmm24, %zmm24, %zmm24\" } } */\n+/* { dg-final { scan-assembler \"vpxord\\[ \\t\\]+%zmm25, %zmm25, %zmm25\" } } */\n+/* { dg-final { scan-assembler \"vpxord\\[ \\t\\]+%zmm26, %zmm26, %zmm26\" } } */\n+/* { dg-final { scan-assembler \"vpxord\\[ \\t\\]+%zmm27, %zmm27, %zmm27\" } } */\n+/* { dg-final { scan-assembler \"vpxord\\[ \\t\\]+%zmm28, %zmm28, %zmm28\" } } */\n+/* { dg-final { scan-assembler \"vpxord\\[ \\t\\]+%zmm29, %zmm29, %zmm29\" } } */\n+/* { dg-final { scan-assembler \"vpxord\\[ \\t\\]+%zmm30, %zmm30, %zmm30\" } } */\n+/* { dg-final { scan-assembler \"vpxord\\[ \\t\\]+%zmm31, %zmm31, %zmm31\" } } */\n+/* { dg-final { scan-assembler-times \"fldz\" 8 } } */\n+/* { dg-final { scan-assembler-times \"fstp\\[ \\t\\]+%st\\\\(0\\\\)\" 8 } } */\n+/* { dg-final { scan-assembler \"xorl\\[ \\t\\]+%eax, %eax\" } } */\n+/* { dg-final { scan-assembler \"xorl\\[ \\t\\]+%edx, %edx\" } } */\n+/* { dg-final { scan-assembler \"xorl\\[ \\t\\]+%ecx, %ecx\" } } */\n+/* { dg-final { scan-assembler \"xorl\\[ \\t\\]+%esi, %esi\" } } */\n+/* { dg-final { scan-assembler \"xorl\\[ \\t\\]+%edi, %edi\" } } */\n+/* { dg-final { scan-assembler \"xorl\\[ \\t\\]+%r8d, %r8d\" } } */\n+/* { dg-final { scan-assembler \"xorl\\[ \\t\\]+%r9d, %r9d\" } } */\n+/* { dg-final { scan-assembler \"xorl\\[ \\t\\]+%r10d, %r10d\" } } */\n+/* { dg-final { scan-assembler \"xorl\\[ \\t\\]+%r11d, %r11d\" } } */\n+/* { dg-final { scan-assembler \"kxorw\\[ \\t\\]+%k0, %k0, %k0\" } } */\n+/* { dg-final { scan-assembler \"kxorw\\[ \\t\\]+%k1, %k1, %k1\" } } */\n+/* { dg-final { scan-assembler \"kxorw\\[ \\t\\]+%k2, %k2, %k2\" } } */\n+/* { dg-final { scan-assembler \"kxorw\\[ \\t\\]+%k3, %k3, %k3\" } } */\n+/* { dg-final { scan-assembler \"kxorw\\[ \\t\\]+%k4, %k4, %k4\" } } */\n+/* { dg-final { scan-assembler \"kxorw\\[ \\t\\]+%k5, %k5, %k5\" } } */\n+/* { dg-final { scan-assembler \"kxorw\\[ \\t\\]+%k6, %k6, %k6\" } } */\n+/* { dg-final { scan-assembler \"kxorw\\[ \\t\\]+%k7, %k7, %k7\" } } */\n+/* { dg-final { scan-assembler \"xorl\\[ \\t\\]+%r16d, %r16d\" } } */\n+/* { dg-final { scan-assembler \"xorl\\[ \\t\\]+%r17d, %r17d\" } } */\n+/* { dg-final { scan-assembler \"xorl\\[ \\t\\]+%r18d, %r18d\" } } */\n+/* { dg-final { scan-assembler \"xorl\\[ \\t\\]+%r19d, %r19d\" } } */\n+/* { dg-final { scan-assembler \"xorl\\[ \\t\\]+%r20d, %r20d\" } } */\n+/* { dg-final { scan-assembler \"xorl\\[ \\t\\]+%r21d, %r21d\" } } */\n+/* { dg-final { scan-assembler \"xorl\\[ \\t\\]+%r22d, %r22d\" } } */\n+/* { dg-final { scan-assembler \"xorl\\[ \\t\\]+%r23d, %r23d\" } } */\n+/* { dg-final { scan-assembler \"xorl\\[ \\t\\]+%r24d, %r24d\" } } */\n+/* { dg-final { scan-assembler \"xorl\\[ \\t\\]+%r25d, %r25d\" } } */\n+/* { dg-final { scan-assembler \"xorl\\[ \\t\\]+%r26d, %r26d\" } } */\n+/* { dg-final { scan-assembler \"xorl\\[ \\t\\]+%r27d, %r27d\" } } */\n+/* { dg-final { scan-assembler \"xorl\\[ \\t\\]+%r28d, %r28d\" } } */\n+/* { dg-final { scan-assembler \"xorl\\[ \\t\\]+%r29d, %r29d\" } } */\n+/* { dg-final { scan-assembler \"xorl\\[ \\t\\]+%r30d, %r30d\" } } */\n+/* { dg-final { scan-assembler \"xorl\\[ \\t\\]+%r31d, %r31d\" } } */\n-- \n2.53.0\n\n","prefixes":["v2","1/2"]}