{"id":2223516,"url":"http://patchwork.ozlabs.org/api/1.2/patches/2223516/?format=json","web_url":"http://patchwork.ozlabs.org/project/gcc/patch/20260415124947.1625613-1-vijay@linux.ibm.com/","project":{"id":17,"url":"http://patchwork.ozlabs.org/api/1.2/projects/17/?format=json","name":"GNU Compiler Collection","link_name":"gcc","list_id":"gcc-patches.gcc.gnu.org","list_email":"gcc-patches@gcc.gnu.org","web_url":null,"scm_url":null,"webscm_url":null,"list_archive_url":"","list_archive_url_format":"","commit_url_format":""},"msgid":"<20260415124947.1625613-1-vijay@linux.ibm.com>","list_archive_url":null,"date":"2026-04-15T12:49:47","name":"[v2] rs6000: Optimize TLS access with combine patterns [PR27479]","commit_ref":null,"pull_url":null,"state":"new","archived":false,"hash":"7e251200dc185c5dd10c944c720f22c50d4c9de6","submitter":{"id":91942,"url":"http://patchwork.ozlabs.org/api/1.2/people/91942/?format=json","name":"Vijay shankar telidevulapalli","email":"vijay@linux.ibm.com"},"delegate":null,"mbox":"http://patchwork.ozlabs.org/project/gcc/patch/20260415124947.1625613-1-vijay@linux.ibm.com/mbox/","series":[{"id":499986,"url":"http://patchwork.ozlabs.org/api/1.2/series/499986/?format=json","web_url":"http://patchwork.ozlabs.org/project/gcc/list/?series=499986","date":"2026-04-15T12:49:47","name":"[v2] rs6000: Optimize TLS access with combine patterns [PR27479]","version":2,"mbox":"http://patchwork.ozlabs.org/series/499986/mbox/"}],"comments":"http://patchwork.ozlabs.org/api/patches/2223516/comments/","check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/2223516/checks/","tags":{},"related":[],"headers":{"Return-Path":"<gcc-patches-bounces~incoming=patchwork.ozlabs.org@gcc.gnu.org>","X-Original-To":["incoming@patchwork.ozlabs.org","gcc-patches@gcc.gnu.org"],"Delivered-To":["patchwork-incoming@legolas.ozlabs.org","gcc-patches@gcc.gnu.org"],"Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass 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meissner@linux.ibm.com, jskumari@linux.ibm.com, avinashd@linux.ibm.com","Cc":"jeevitha@linux.ibm.com, kishan@linux.ibm.com,\n Vijay Shankar <vijay@linux.ibm.com>","Subject":"[PATCH v2] rs6000: Optimize TLS access with combine patterns\n [PR27479]","Date":"Wed, 15 Apr 2026 07:49:47 -0500","Message-ID":"<20260415124947.1625613-1-vijay@linux.ibm.com>","X-Mailer":"git-send-email 2.47.3","MIME-Version":"1.0","Content-Transfer-Encoding":"8bit","X-TM-AS-GCONF":"00","X-Proofpoint-Spam-Details-Enc":"AW1haW4tMjYwNDE1MDExOSBTYWx0ZWRfX8msqRuPMbQbE\n o2V+50FrXbN7o0kQ3jA92kQ0FWDagjIq3ca8eHRp3rxMNCPxeQWAUU9vphLphb4qF7Kfkb+1FTZ\n FtdijG/VpmK53NjnlGUm1iOwxYb4+zU7lbImyYfv54KWOUoUHcDjpKxqZ2g0fhyvknXE2amrmEy\n N8AWUBZtkfUSdSuXpdtjOoHiQKALqX9h1V0I8W7j8u0mtPGV4nGn3BERBQw04ENJfcs6a9LLgS4\n i1086Rg1BwHjsYRCY/Yk3dZdW7MHd1Hq8UZhcDDyqRKYNXm46RF1HOB230tFe1s5rC+2czGuFGw\n 6sdH6Y5Mdv6hUU46Q3sRj8OvDEIWHr8rXvZrKbaXg/B6O1LA0ooZgDuGchh1g7WRA39Z1/sKoxx\n aEg3HOADODgCmoceo36Bk4QTxXU+6N1PJnSex91ifA83nxz9X5MHXsHx7lF03u1tBD0OmDV/WM1\n qBImdnZ2lYTap56eyuQ==","X-Authority-Analysis":"v=2.4 cv=eJ4jSnp1 c=1 sm=1 tr=0 ts=69df8973 cx=c_pps\n a=GFwsV6G8L6GxiO2Y/PsHdQ==:117 a=GFwsV6G8L6GxiO2Y/PsHdQ==:17\n a=A5OVakUREuEA:10 a=VkNPw1HP01LnGYTKEx00:22 a=RnoormkPH1_aCDwRdu11:22\n a=uAbxVGIbfxUO_5tXvNgY:22 a=VnNF1IyMAAAA:8 a=LKoQtQ5gpN11kE8HiTYA:9","X-Proofpoint-GUID":"YnlRNkf3NcNBvhGrKNnUc3Pps6QvRqny","X-Proofpoint-ORIG-GUID":"YnlRNkf3NcNBvhGrKNnUc3Pps6QvRqny","X-Proofpoint-Virus-Version":"vendor=baseguard\n engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.51,FMLib:17.12.100.49\n definitions=2026-04-15_01,2026-04-13_04,2025-10-01_01","X-Proofpoint-Spam-Details":"rule=outbound_notspam policy=outbound score=0\n malwarescore=0 lowpriorityscore=0 adultscore=0 priorityscore=1501\n clxscore=1015 bulkscore=0 suspectscore=0 spamscore=0 impostorscore=0\n phishscore=0 classifier=typeunknown authscore=0 authtc= authcc=\n route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2604070000\n definitions=main-2604150119","X-BeenThere":"gcc-patches@gcc.gnu.org","X-Mailman-Version":"2.1.30","Precedence":"list","List-Id":"Gcc-patches mailing list <gcc-patches.gcc.gnu.org>","List-Unsubscribe":"<https://gcc.gnu.org/mailman/options/gcc-patches>,\n <mailto:gcc-patches-request@gcc.gnu.org?subject=unsubscribe>","List-Archive":"<https://gcc.gnu.org/pipermail/gcc-patches/>","List-Post":"<mailto:gcc-patches@gcc.gnu.org>","List-Help":"<mailto:gcc-patches-request@gcc.gnu.org?subject=help>","List-Subscribe":"<https://gcc.gnu.org/mailman/listinfo/gcc-patches>,\n <mailto:gcc-patches-request@gcc.gnu.org?subject=subscribe>","Errors-To":"gcc-patches-bounces~incoming=patchwork.ozlabs.org@gcc.gnu.org"},"content":"Changes from v1:\n\t* update tprel_ld_QI_signed to use define_insn_and_split\n\t* renamed PR27479.c to pr27479.c and removed dead code\n\nReduce TLS variable access from 3 to 2 instructions by adding\ncombine patterns that merge address calculation with load.\n\nBefore:\n    addis 9,13,x@tprel@ha\n    addi 9,9,x@tprel@l\n    lwz 3,0(9)\n\nAfter:\n    addis 9,13,x@tprel@ha\n    lwz 3,x@tprel@l(9)\n\nBootstrapped and tested on powerpc64le-linux-gnu with no regressions.\n\n2026-04-15  Vijay Shankar  <vijay@linux.ibm.com>\n\ngcc/ChangeLog:\n\tPR target/27479\n\t* config/rs6000/rs6000.md (*tprel_ld_<az>_<HSI:mode>): New pattern.\n\t(*tprel_ld_QI_signed): New pattern.\n\t(*tprel_ld_QI): New pattern.\n\t(*tprel_ld_DI): New pattern.\n\t(*tprel_ld_<SFDF:mode>): New pattern.\n\ngcc/testsuite/ChangeLog:\n\tPR target/27479\n\t* gcc.target/powerpc/pr27479.c: New Test.\n---\n gcc/config/rs6000/rs6000.md                | 71 ++++++++++++++++\n gcc/testsuite/gcc.target/powerpc/pr27479.c | 95 ++++++++++++++++++++++\n 2 files changed, 166 insertions(+)\n create mode 100644 gcc/testsuite/gcc.target/powerpc/pr27479.c","diff":"diff --git a/gcc/config/rs6000/rs6000.md b/gcc/config/rs6000/rs6000.md\nindex 308955155..0064a1871 100644\n--- a/gcc/config/rs6000/rs6000.md\n+++ b/gcc/config/rs6000/rs6000.md\n@@ -10567,6 +10567,77 @@\n   \"la %0,%1@got@tlsgd@pcrel\"\n   [(set_attr \"prefixed\" \"yes\")])\n \n+;;combine patterns for tls access\n+(define_insn \"*tprel_ld_<az>_<HSI:mode>\"\n+  [(set (match_operand:DI 0 \"gpc_reg_operand\" \"=r\")\n+\t(any_extend:DI\n+\t  (mem:HSI\n+\t    (unspec:P\n+\t      [(match_operand:P 1 \"gpc_reg_operand\" \"b\")\n+\t       (match_operand:P 2 \"rs6000_tls_symbol_ref\" \"\")]\n+\t      UNSPEC_TLSTPRELLO))))]\n+  \"HAVE_AS_TLS\"\n+  \"l<HSI:wd><az> %0,%2@tprel@l(%1)\"\n+  [(set_attr \"type\" \"load\")])\n+\n+;; Two instructions needed: lbz (zero-extend load byte) + extsb (sign-extend)\n+;; because there is no sign-extended load byte instruction, only zero-extended.\n+(define_insn_and_split \"*tprel_ld_QI_signed\"\n+  [(set (match_operand:DI 0 \"gpc_reg_operand\" \"=r\")\n+\t(sign_extend:DI\n+\t  (mem:QI\n+\t    (unspec:P\n+\t      [(match_operand:P 1 \"gpc_reg_operand\" \"b\")\n+\t       (match_operand:P 2 \"rs6000_tls_symbol_ref\" \"\")]\n+\t      UNSPEC_TLSTPRELLO))))]\n+  \"HAVE_AS_TLS\"\n+  \"#\"\n+  \"&& reload_completed\"\n+  [(set (match_dup 0)\n+\t(zero_extend:DI\n+\t  (mem:QI\n+\t    (unspec:P\n+\t      [(match_dup 1)\n+\t       (match_dup 2)]\n+\t      UNSPEC_TLSTPRELLO))))\n+   (set (match_dup 0)\n+\t(sign_extend:DI\n+\t  (subreg:QI (match_dup 0) 0)))])\n+\n+(define_insn \"*tprel_ld_QI\"\n+  [(set (match_operand:DI 0 \"gpc_reg_operand\" \"=r\")\n+\t(zero_extend:DI\n+\t  (mem:QI\n+\t    (unspec:P\n+\t      [(match_operand:P 1 \"gpc_reg_operand\" \"b\")\n+\t       (match_operand:P 2 \"rs6000_tls_symbol_ref\" \"\")]\n+\t      UNSPEC_TLSTPRELLO))))]\n+  \"HAVE_AS_TLS\"\n+  \"lbz %0,%2@tprel@l(%1)\"\n+  [(set_attr \"type\" \"load\")])\n+\n+(define_insn \"*tprel_ld_DI\"\n+  [(set (match_operand:DI 0 \"gpc_reg_operand\" \"=r\")\n+\t(mem:DI\n+\t  (unspec:P\n+\t    [(match_operand:P 1 \"gpc_reg_operand\" \"b\")\n+\t     (match_operand:P 2 \"rs6000_tls_symbol_ref\" \"\")]\n+\t    UNSPEC_TLSTPRELLO)))]\n+  \"HAVE_AS_TLS\"\n+  \"ld %0,%2@tprel@l(%1)\"\n+  [(set_attr \"type\" \"load\")])\n+\n+(define_insn \"*tprel_ld_<SFDF:mode>\"\n+  [(set (match_operand:SFDF 0 \"gpc_reg_operand\" \"=f\")\n+\t(mem:SFDF\n+\t  (unspec:P\n+\t    [(match_operand:P 1 \"gpc_reg_operand\" \"b\")\n+\t     (match_operand:P 2 \"rs6000_tls_symbol_ref\" \"\")]\n+\t    UNSPEC_TLSTPRELLO)))]\n+  \"HAVE_AS_TLS\"\n+  \"lf<SFDF:sd> %0,%2@tprel@l(%1)\"\n+  [(set_attr \"type\" \"fpload\")])\n+\n (define_insn_and_split \"*tls_gd<bits>\"\n   [(set (match_operand:P 0 \"gpc_reg_operand\" \"=b\")\n \t(unspec:P [(match_operand:P 1 \"rs6000_tls_symbol_ref\" \"\")\ndiff --git a/gcc/testsuite/gcc.target/powerpc/pr27479.c b/gcc/testsuite/gcc.target/powerpc/pr27479.c\nnew file mode 100644\nindex 000000000..3f43643b3\n--- /dev/null\n+++ b/gcc/testsuite/gcc.target/powerpc/pr27479.c\n@@ -0,0 +1,95 @@\n+/* { dg-do compile } */\n+/* { dg-options \"-O2 -mdejagnu-cpu=power9\" } */\n+\n+/* verify TLS access for PR27479*/\n+\n+/* TLS variables of many types.  */\n+__thread unsigned char t_uc;\n+__thread signed char t_sc;\n+__thread unsigned short t_us;\n+__thread short t_ss;\n+__thread unsigned int t_ui;\n+__thread int t_si;\n+__thread unsigned long t_ul;\n+__thread long t_sl;\n+__thread _Bool t_bool;\n+__thread int *t_ptr;\n+\n+/* Floating-point.  */\n+__thread float t_f;\n+__thread double t_d;\n+\n+unsigned long\n+foo_uc (void)\n+{\n+  return t_uc;\n+}\n+\n+long\n+foo_sc (void)\n+{\n+  return t_sc;\n+}\n+\n+unsigned long\n+foo_us (void)\n+{\n+  return t_us;\n+}\n+\n+long\n+foo_ss (void)\n+{\n+  return t_ss;\n+}\n+\n+unsigned long\n+foo_ui (void)\n+{\n+  return t_ui;\n+}\n+\n+long\n+foo_si (void)\n+{\n+  return t_si;\n+}\n+\n+unsigned long\n+foo_ul (void)\n+{\n+  return t_ul;\n+}\n+\n+long\n+foo_sl (void)\n+{\n+  return t_sl;\n+}\n+\n+unsigned long\n+foo_bool (void)\n+{\n+  return t_bool;\n+}\n+\n+int *\n+foo_ptr (void)\n+{\n+  return t_ptr;\n+}\n+\n+/* Floating-point accessors.  */\n+float\n+foo_f (void)\n+{\n+  return t_f;\n+}\n+\n+double\n+foo_d (void)\n+{\n+  return t_d;\n+}\n+\n+/* { dg-final { scan-assembler-not {\\maddi\\M} } } */\n","prefixes":["v2"]}