{"id":2223465,"url":"http://patchwork.ozlabs.org/api/1.2/patches/2223465/?format=json","web_url":"http://patchwork.ozlabs.org/project/qemu-devel/patch/20260415105552.622421-19-skolothumtho@nvidia.com/","project":{"id":14,"url":"http://patchwork.ozlabs.org/api/1.2/projects/14/?format=json","name":"QEMU Development","link_name":"qemu-devel","list_id":"qemu-devel.nongnu.org","list_email":"qemu-devel@nongnu.org","web_url":"","scm_url":"","webscm_url":"","list_archive_url":"","list_archive_url_format":"","commit_url_format":""},"msgid":"<20260415105552.622421-19-skolothumtho@nvidia.com>","list_archive_url":null,"date":"2026-04-15T10:55:39","name":"[v4,18/31] system/physmem: Add address_space_is_ram() helper","commit_ref":null,"pull_url":null,"state":"new","archived":false,"hash":"c47a63c99138efc41eb4bdcf204d2858e34278dd","submitter":{"id":91580,"url":"http://patchwork.ozlabs.org/api/1.2/people/91580/?format=json","name":"Shameer Kolothum Thodi","email":"skolothumtho@nvidia.com"},"delegate":null,"mbox":"http://patchwork.ozlabs.org/project/qemu-devel/patch/20260415105552.622421-19-skolothumtho@nvidia.com/mbox/","series":[{"id":499965,"url":"http://patchwork.ozlabs.org/api/1.2/series/499965/?format=json","web_url":"http://patchwork.ozlabs.org/project/qemu-devel/list/?series=499965","date":"2026-04-15T10:55:21","name":"hw/arm/virt: Introduce Tegra241 CMDQV support for accelerated SMMUv3","version":4,"mbox":"http://patchwork.ozlabs.org/series/499965/mbox/"}],"comments":"http://patchwork.ozlabs.org/api/patches/2223465/comments/","check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/2223465/checks/","tags":{},"related":[],"headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=Nvidia.com header.i=@Nvidia.com header.a=rsa-sha256\n header.s=selector2 header.b=UXtcje6c;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org\n (client-ip=209.51.188.17; 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Ip=[216.228.117.160];\n Helo=[mail.nvidia.com]","X-MS-Exchange-CrossTenant-AuthSource":"\n CY4PEPF0000EE38.namprd03.prod.outlook.com","X-MS-Exchange-CrossTenant-AuthAs":"Anonymous","X-MS-Exchange-CrossTenant-FromEntityHeader":"HybridOnPrem","X-MS-Exchange-Transport-CrossTenantHeadersStamped":"DS5PPF7B9F1F8E0","X-Spam_score_int":"-25","X-Spam_score":"-2.6","X-Spam_bar":"--","X-Spam_report":"(-2.6 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.54,\n DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1,\n SPF_HELO_NONE=0.001, SPF_NONE=0.001 autolearn=ham autolearn_force=no","X-Spam_action":"no action","X-BeenThere":"qemu-devel@nongnu.org","X-Mailman-Version":"2.1.29","Precedence":"list","List-Id":"qemu development ","List-Unsubscribe":",\n ","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n ","Errors-To":"qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org","Sender":"qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org"},"content":"Introduce address_space_is_ram(), a helper to determine whether\na guest physical address resolves to a RAM-backed MemoryRegion within\nan AddressSpace.\n\nReviewed-by: Eric Auger \nSigned-off-by: Shameer Kolothum \n---\n include/system/memory.h | 10 ++++++++++\n system/physmem.c | 11 +++++++++++\n 2 files changed, 21 insertions(+)","diff":"diff --git a/include/system/memory.h b/include/system/memory.h\nindex d7b18b632d..7aed255e81 100644\n--- a/include/system/memory.h\n+++ b/include/system/memory.h\n@@ -2841,6 +2841,16 @@ bool address_space_access_valid(AddressSpace *as, hwaddr addr, hwaddr len,\n */\n bool address_space_is_io(AddressSpace *as, hwaddr addr);\n \n+/**\n+ * address_space_is_ram: check whether a guest physical address whithin\n+ * an address space is RAM.\n+ *\n+ * @as: #AddressSpace to be accessed\n+ * @addr: address within that address space\n+ */\n+\n+bool address_space_is_ram(AddressSpace *as, hwaddr addr);\n+\n /* address_space_map: map a physical memory region into a host virtual address\n *\n * May map a subset of the requested range, given by and returned in @plen.\ndiff --git a/system/physmem.c b/system/physmem.c\nindex 4e26f1a1d4..b67dde80fb 100644\n--- a/system/physmem.c\n+++ b/system/physmem.c\n@@ -3674,6 +3674,17 @@ bool address_space_is_io(AddressSpace *as, hwaddr addr)\n return !(memory_region_is_ram(mr) || memory_region_is_romd(mr));\n }\n \n+bool address_space_is_ram(AddressSpace *as, hwaddr addr)\n+{\n+ MemoryRegion *mr;\n+\n+ RCU_READ_LOCK_GUARD();\n+ mr = address_space_translate(as, addr, &addr, NULL, false,\n+ MEMTXATTRS_UNSPECIFIED);\n+\n+ return memory_region_is_ram(mr);\n+}\n+\n static hwaddr\n flatview_extend_translation(FlatView *fv, hwaddr addr,\n hwaddr target_len,\n","prefixes":["v4","18/31"]}