{"id":2223464,"url":"http://patchwork.ozlabs.org/api/1.2/patches/2223464/?format=json","web_url":"http://patchwork.ozlabs.org/project/qemu-devel/patch/20260415105552.622421-31-skolothumtho@nvidia.com/","project":{"id":14,"url":"http://patchwork.ozlabs.org/api/1.2/projects/14/?format=json","name":"QEMU Development","link_name":"qemu-devel","list_id":"qemu-devel.nongnu.org","list_email":"qemu-devel@nongnu.org","web_url":"","scm_url":"","webscm_url":"","list_archive_url":"","list_archive_url_format":"","commit_url_format":""},"msgid":"<20260415105552.622421-31-skolothumtho@nvidia.com>","list_archive_url":null,"date":"2026-04-15T10:55:51","name":"[v4,30/31] hw/arm/smmuv3-accel: Enforce viommu association when CMDQV is active","commit_ref":null,"pull_url":null,"state":"new","archived":false,"hash":"0f8a097b417b9b869d3ed9e5d5f87f38516dbdc6","submitter":{"id":91580,"url":"http://patchwork.ozlabs.org/api/1.2/people/91580/?format=json","name":"Shameer Kolothum Thodi","email":"skolothumtho@nvidia.com"},"delegate":null,"mbox":"http://patchwork.ozlabs.org/project/qemu-devel/patch/20260415105552.622421-31-skolothumtho@nvidia.com/mbox/","series":[{"id":499965,"url":"http://patchwork.ozlabs.org/api/1.2/series/499965/?format=json","web_url":"http://patchwork.ozlabs.org/project/qemu-devel/list/?series=499965","date":"2026-04-15T10:55:21","name":"hw/arm/virt: Introduce Tegra241 CMDQV support for accelerated SMMUv3","version":4,"mbox":"http://patchwork.ozlabs.org/series/499965/mbox/"}],"comments":"http://patchwork.ozlabs.org/api/patches/2223464/comments/","check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/2223464/checks/","tags":{},"related":[],"headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=Nvidia.com header.i=@Nvidia.com header.a=rsa-sha256\n header.s=selector2 header.b=VpyK852k;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org\n (client-ip=209.51.188.17; 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Ip=[216.228.117.160];\n Helo=[mail.nvidia.com]","X-MS-Exchange-CrossTenant-AuthSource":"\n CY4PEPF0000EE3D.namprd03.prod.outlook.com","X-MS-Exchange-CrossTenant-AuthAs":"Anonymous","X-MS-Exchange-CrossTenant-FromEntityHeader":"HybridOnPrem","X-MS-Exchange-Transport-CrossTenantHeadersStamped":"LV3PR12MB9266","X-Spam_score_int":"-15","X-Spam_score":"-1.6","X-Spam_bar":"-","X-Spam_report":"(-1.6 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.54,\n DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1,\n FORGED_SPF_HELO=1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_PASS=-0.001,\n SPF_NONE=0.001 autolearn=no autolearn_force=no","X-Spam_action":"no action","X-BeenThere":"qemu-devel@nongnu.org","X-Mailman-Version":"2.1.29","Precedence":"list","List-Id":"qemu development ","List-Unsubscribe":",\n ","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n ","Errors-To":"qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org","Sender":"qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org"},"content":"When CMDQV is active, the first cold-plugged VFIO device establishes the\nviommu to host SMMUv3 association. Block its hot-unplug to preserve this\nassociation and the guest's boot time CMDQV configuration.\n\nAlso abort at machine_done if cmdqv=on is requested but no cold-plugged\nVFIO device was present to initialize it.\n\nSigned-off-by: Shameer Kolothum \n---\n hw/arm/smmuv3-accel.h | 1 +\n hw/arm/smmuv3-accel.c | 12 ++++++++++++\n hw/arm/smmuv3.c | 6 ++++++\n 3 files changed, 19 insertions(+)","diff":"diff --git a/hw/arm/smmuv3-accel.h b/hw/arm/smmuv3-accel.h\nindex 3ed94ed05c..c4441d5b3f 100644\n--- a/hw/arm/smmuv3-accel.h\n+++ b/hw/arm/smmuv3-accel.h\n@@ -65,6 +65,7 @@ typedef struct SMMUv3AccelDevice {\n IOMMUFDVdev *vdev;\n QLIST_ENTRY(SMMUv3AccelDevice) next;\n SMMUv3AccelState *s_accel;\n+ Error *unplug_blocker; /* set when CMDQV is active to block hot-unplug */\n } SMMUv3AccelDevice;\n \n bool smmuv3_accel_init(SMMUv3State *s, Error **errp);\ndiff --git a/hw/arm/smmuv3-accel.c b/hw/arm/smmuv3-accel.c\nindex a58815ded2..f381702a08 100644\n--- a/hw/arm/smmuv3-accel.c\n+++ b/hw/arm/smmuv3-accel.c\n@@ -754,6 +754,18 @@ static bool smmuv3_accel_set_iommu_device(PCIBus *bus, void *opaque, int devfn,\n return false;\n }\n \n+ /*\n+ * CMDQV is active: block hot-unplug of the device that established the\n+ * viommu association. Removing it would cause the vIOMMU to host SMMUv3\n+ * association be changed via device hot-plug.\n+ */\n+ if (s->s_accel->cmdqv_ops) {\n+ PCIDevice *pdev = pci_find_device(bus, pci_bus_num(bus), devfn);\n+ error_setg(&accel_dev->unplug_blocker,\n+ \"CMDQV is active: removing the device that established the \"\n+ \"viommu association would break the guest CMDQV\");\n+ qdev_add_unplug_blocker(DEVICE(pdev), accel_dev->unplug_blocker);\n+ }\n done:\n accel_dev->idev = idev;\n accel_dev->s_accel = s->s_accel;\ndiff --git a/hw/arm/smmuv3.c b/hw/arm/smmuv3.c\nindex 1d6fdd776c..c9ff6298f5 100644\n--- a/hw/arm/smmuv3.c\n+++ b/hw/arm/smmuv3.c\n@@ -2020,6 +2020,12 @@ static void smmuv3_machine_done(Notifier *notifier, void *data)\n \"at least one cold-plugged VFIO device\");\n exit(1);\n }\n+\n+ if (s->cmdqv == ON_OFF_AUTO_ON && !accel->cmdqv) {\n+ error_report(\"arm-smmuv3 cmdqv=on requires at least one cold-plugged \"\n+ \"VFIO device\");\n+ exit(1);\n+ }\n }\n \n static void smmu_realize(DeviceState *d, Error **errp)\n","prefixes":["v4","30/31"]}