{"id":2223425,"url":"http://patchwork.ozlabs.org/api/1.2/patches/2223425/?format=json","web_url":"http://patchwork.ozlabs.org/project/linux-gpio/patch/20260415-gpio-fix-v1-1-b08a89b31e6f@aspeedtech.com/","project":{"id":42,"url":"http://patchwork.ozlabs.org/api/1.2/projects/42/?format=json","name":"Linux GPIO development","link_name":"linux-gpio","list_id":"linux-gpio.vger.kernel.org","list_email":"linux-gpio@vger.kernel.org","web_url":"","scm_url":"","webscm_url":"","list_archive_url":"","list_archive_url_format":"","commit_url_format":""},"msgid":"<20260415-gpio-fix-v1-1-b08a89b31e6f@aspeedtech.com>","list_archive_url":null,"date":"2026-04-15T10:24:42","name":"gpio: aspeed: fix AST2700 debounce selector bit definitions","commit_ref":null,"pull_url":null,"state":"new","archived":false,"hash":"fc9cc5b6f9287aecc7c2bd4a5d7e6968111b586b","submitter":{"id":80235,"url":"http://patchwork.ozlabs.org/api/1.2/people/80235/?format=json","name":"Billy Tsai","email":"billy_tsai@aspeedtech.com"},"delegate":null,"mbox":"http://patchwork.ozlabs.org/project/linux-gpio/patch/20260415-gpio-fix-v1-1-b08a89b31e6f@aspeedtech.com/mbox/","series":[{"id":499960,"url":"http://patchwork.ozlabs.org/api/1.2/series/499960/?format=json","web_url":"http://patchwork.ozlabs.org/project/linux-gpio/list/?series=499960","date":"2026-04-15T10:24:42","name":"gpio: aspeed: fix AST2700 debounce selector bit definitions","version":1,"mbox":"http://patchwork.ozlabs.org/series/499960/mbox/"}],"comments":"http://patchwork.ozlabs.org/api/patches/2223425/comments/","check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/2223425/checks/","tags":{},"related":[],"headers":{"Return-Path":"\n ","X-Original-To":["incoming@patchwork.ozlabs.org","linux-gpio@vger.kernel.org"],"Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org\n (client-ip=172.234.253.10; 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arc=none smtp.client-ip=211.20.114.72","From":"Billy Tsai ","Date":"Wed, 15 Apr 2026 18:24:42 +0800","Subject":"[PATCH] gpio: aspeed: fix AST2700 debounce selector bit\n definitions","Precedence":"bulk","X-Mailing-List":"linux-gpio@vger.kernel.org","List-Id":"","List-Subscribe":"","List-Unsubscribe":"","MIME-Version":"1.0","Content-Type":"text/plain; charset=\"utf-8\"","Content-Transfer-Encoding":"7bit","Message-ID":"<20260415-gpio-fix-v1-1-b08a89b31e6f@aspeedtech.com>","X-B4-Tracking":"v=1; b=H4sIAGln32kC/6tWKk4tykwtVrJSqFYqSi3LLM7MzwNyDHUUlJIzE\n vPSU3UzU4B8JSMDIzMDE0NT3fSCzHzdtMwKXUNzE1NTC+PU5DQDMyWg8oKiVKAw2Kjo2NpaADr\n KCulaAAAA","X-Change-ID":"20260415-gpio-fix-1745583ecf06","To":"Linus Walleij , Bartosz Golaszewski ,\n\tJoel Stanley , Andrew Jeffery ","CC":", ,\n\t, , Billy Tsai\n\t","X-Mailer":"b4 0.14.3","X-Developer-Signature":"v=1; a=ed25519-sha256; t=1776248686; l=1387;\n i=billy_tsai@aspeedtech.com; s=20251118; h=from:subject:message-id;\n bh=mm7hDoKN7iti+b5vLqDrPKkhJ+rkkywvY8n22UKL7Q4=;\n b=xltRCYSWnLbGHqjv3iCcpoxcxMICHhXNHsq8rZVGdgeOxVKQIMYm7j5TcRzziaAqE2G5qfqW0\n t13s1XuI2pMA6PQpU3uoagyImsMSbktSm1U/OoH2Ac9o2mabPBnwVlk","X-Developer-Key":"i=billy_tsai@aspeedtech.com; a=ed25519;\n pk=/A8qvgZ6CPfnwKgT6/+k+nvXOkN477MshEGJvVdzeeQ="},"content":"The AST2700 datasheet defines reg_debounce_sel1 as the low bit and\nreg_debounce_sel2 as the high bit. The current driver uses the AST2600\nmapping instead, where sel1 is the high bit and sel2 is the low bit.\n\nAs a result, the debounce selector bits are programmed in reverse on\nAST2700. Swap the G7 sel1/sel2 bit definitions so the driver matches the\nhardware definition.\n\nFixes: b2e861bd1eaf (\"gpio: aspeed: Support G7 Aspeed gpio controller\")\nSigned-off-by: Billy Tsai \n---\n drivers/gpio/gpio-aspeed.c | 4 ++--\n 1 file changed, 2 insertions(+), 2 deletions(-)\n\n\n---\nbase-commit: 6de23f81a5e08be8fbf5e8d7e9febc72a5b5f27f\nchange-id: 20260415-gpio-fix-1745583ecf06\n\nBest regards,","diff":"diff --git a/drivers/gpio/gpio-aspeed.c b/drivers/gpio/gpio-aspeed.c\nindex 9115e56a1626..98b5bfbc04a3 100644\n--- a/drivers/gpio/gpio-aspeed.c\n+++ b/drivers/gpio/gpio-aspeed.c\n@@ -42,8 +42,8 @@\n #define GPIO_G7_CTRL_IRQ_TYPE1 BIT(4)\n #define GPIO_G7_CTRL_IRQ_TYPE2 BIT(5)\n #define GPIO_G7_CTRL_RST_TOLERANCE BIT(6)\n-#define GPIO_G7_CTRL_DEBOUNCE_SEL1 BIT(7)\n-#define GPIO_G7_CTRL_DEBOUNCE_SEL2 BIT(8)\n+#define GPIO_G7_CTRL_DEBOUNCE_SEL2 BIT(7)\n+#define GPIO_G7_CTRL_DEBOUNCE_SEL1 BIT(8)\n #define GPIO_G7_CTRL_INPUT_MASK BIT(9)\n #define GPIO_G7_CTRL_IRQ_STS BIT(12)\n #define GPIO_G7_CTRL_IN_DATA BIT(13)\n","prefixes":[]}