{"id":2222720,"url":"http://patchwork.ozlabs.org/api/1.2/patches/2222720/?format=json","web_url":"http://patchwork.ozlabs.org/project/linux-gpio/patch/20260413135234.4067548-1-mail@tk154.de/","project":{"id":42,"url":"http://patchwork.ozlabs.org/api/1.2/projects/42/?format=json","name":"Linux GPIO development","link_name":"linux-gpio","list_id":"linux-gpio.vger.kernel.org","list_email":"linux-gpio@vger.kernel.org","web_url":"","scm_url":"","webscm_url":"","list_archive_url":"","list_archive_url_format":"","commit_url_format":""},"msgid":"<20260413135234.4067548-1-mail@tk154.de>","list_archive_url":null,"date":"2026-04-13T13:52:34","name":"pinctrl: qcom: ipq4019: mark gpio as a GPIO pin function","commit_ref":null,"pull_url":null,"state":"new","archived":false,"hash":"81574007fb4272d2f90f3224eb54199a62f5ef77","submitter":{"id":93135,"url":"http://patchwork.ozlabs.org/api/1.2/people/93135/?format=json","name":"Til Kaiser","email":"mail@tk154.de"},"delegate":null,"mbox":"http://patchwork.ozlabs.org/project/linux-gpio/patch/20260413135234.4067548-1-mail@tk154.de/mbox/","series":[{"id":499711,"url":"http://patchwork.ozlabs.org/api/1.2/series/499711/?format=json","web_url":"http://patchwork.ozlabs.org/project/linux-gpio/list/?series=499711","date":"2026-04-13T13:52:34","name":"pinctrl: qcom: ipq4019: mark gpio as a GPIO pin function","version":1,"mbox":"http://patchwork.ozlabs.org/series/499711/mbox/"}],"comments":"http://patchwork.ozlabs.org/api/patches/2222720/comments/","check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/2222720/checks/","tags":{},"related":[],"headers":{"Return-Path":"\n <linux-gpio+bounces-35094-incoming=patchwork.ozlabs.org@vger.kernel.org>","X-Original-To":["incoming@patchwork.ozlabs.org","linux-gpio@vger.kernel.org"],"Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=tk154.de header.i=@tk154.de header.a=rsa-sha256\n header.s=DKIM001 header.b=qAnkKP3I;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org\n (client-ip=2600:3c0a:e001:db::12fc:5321; helo=sea.lore.kernel.org;\n envelope-from=linux-gpio+bounces-35094-incoming=patchwork.ozlabs.org@vger.kernel.org;\n receiver=patchwork.ozlabs.org)","smtp.subspace.kernel.org;\n\tdkim=pass (2048-bit key) header.d=tk154.de header.i=@tk154.de\n header.b=\"qAnkKP3I\"","smtp.subspace.kernel.org;\n arc=none smtp.client-ip=85.220.129.31","smtp.subspace.kernel.org;\n dmarc=none (p=none dis=none) header.from=tk154.de","smtp.subspace.kernel.org;\n spf=pass smtp.mailfrom=tk154.de"],"Received":["from sea.lore.kernel.org (sea.lore.kernel.org\n [IPv6:2600:3c0a:e001:db::12fc:5321])\n\t(using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)\n\t key-exchange x25519)\n\t(No client certificate requested)\n\tby legolas.ozlabs.org (Postfix) with ESMTPS id 4fvTnR3YF9z1xtJ\n\tfor <incoming@patchwork.ozlabs.org>; Tue, 14 Apr 2026 00:10:03 +1000 (AEST)","from smtp.subspace.kernel.org (conduit.subspace.kernel.org\n [100.90.174.1])\n\tby sea.lore.kernel.org (Postfix) with ESMTP id 925443047044\n\tfor <incoming@patchwork.ozlabs.org>; Mon, 13 Apr 2026 14:02:37 +0000 (UTC)","from localhost.localdomain (localhost.localdomain [127.0.0.1])\n\tby smtp.subspace.kernel.org (Postfix) with ESMTP id 21DA73CEBB7;\n\tMon, 13 Apr 2026 14:02:36 +0000 (UTC)","from smtp6.goneo.de (smtp6.goneo.de [85.220.129.31])\n\t(using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits))\n\t(No client certificate requested)\n\tby smtp.subspace.kernel.org (Postfix) with ESMTPS id 4D1073CEBA9;\n\tMon, 13 Apr 2026 14:02:30 +0000 (UTC)","from hub2.goneo.de (hub2.goneo.de [IPv6:2001:1640:5::8:53])\n\t(using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)\n\t key-exchange X25519 server-signature RSA-PSS (4096 bits))\n\t(No client certificate requested)\n\tby smtp6.goneo.de (Postfix) with ESMTPS id 9614024095D;\n\tMon, 13 Apr 2026 15:53:18 +0200 (CEST)","from hub2.goneo.de (localhost [127.0.0.1])\n\t(using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)\n\t key-exchange X25519 server-signature RSA-PSS (4096 bits))\n\t(No client certificate requested)\n\tby hub2.goneo.de (Postfix) with ESMTPS id 5D5252400EE;\n\tMon, 13 Apr 2026 15:53:16 +0200 (CEST)","from Til-Notebook.meshlab (unknown [195.37.88.189])\n\t(using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)\n\t key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest\n SHA256)\n\t(No client certificate requested)\n\tby hub2.goneo.de (Postfix) with ESMTPSA id AEA5F240025;\n\tMon, 13 Apr 2026 15:53:14 +0200 (CEST)"],"ARC-Seal":"i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116;\n\tt=1776088955; cv=none;\n b=PAiwPzBwBcwo6MLrhtFbuPJk98HTAJZMIC7NImmNwQ3lLhzqwKCf/LI0yYbCIEdbWVNE/xdJPyW41f94z62qcDzr6dtOUDptiO0nvb04b1yRKmWUVkktceXK0PdWZsTpQfF/JCuGvtimChkWtRr3Obla3a8sgHpB/FE4Z9MDWbQ=","ARC-Message-Signature":"i=1; a=rsa-sha256; d=subspace.kernel.org;\n\ts=arc-20240116; t=1776088955; c=relaxed/simple;\n\tbh=U4yl6IJ0xPqDdadjbaM2BrsEcT2xQbYLoYAGSi4cbaQ=;\n\th=From:To:Cc:Subject:Date:Message-ID:MIME-Version;\n b=jMu0j7XbKTzMq2BEbdJo9cE17wvrBECW3cEp+cBPsVB6XcGdfv+UB4kmqZAp87F7/Fc12BnUS5rPhyf5sNZQZdARVcA9KKpgPBJ+bTJcCI4NuM+zZh/ft9pvMN4tk/KfhY74YhdqM5rxuqBcdEYD0C61Sln5P0Urm6rlZfGNsi4=","ARC-Authentication-Results":"i=1; smtp.subspace.kernel.org;\n dmarc=none (p=none dis=none) header.from=tk154.de;\n spf=pass smtp.mailfrom=tk154.de;\n dkim=pass (2048-bit key) header.d=tk154.de header.i=@tk154.de\n header.b=qAnkKP3I; arc=none smtp.client-ip=85.220.129.31","DKIM-Signature":"v=1; a=rsa-sha256; c=relaxed/relaxed; d=tk154.de; s=DKIM001;\n\tt=1776088396;\n\th=from:from:reply-to:subject:subject:date:date:message-id:message-id:\n\t to:to:cc:cc:mime-version:mime-version:\n\t content-transfer-encoding:content-transfer-encoding;\n\tbh=24AXtsu9nDzvup8XfLHaKXM36uG/XOpm7O1cB4AmO1g=;\n\tb=qAnkKP3IRcTWtr9pNvmdDatPzfnUHcitZyZaB4hwJZEStDgk8xGDNFIy5rIUENDe1mvI89\n\tGybCEPymUW/ILLXe4A1SHVBh6bOFj8TdJr0P2TMz4M+/89WQ3U/o+LD2G9TcrJnexnjn0R\n\tT/X3lHXgMPeVgflJrRvwuIq9rBTe8sQblXgWVqTLggRgq/XTqyCmD4KtN/rAbwl0KBR5UV\n\tAPhdyt4ti1WF8+ITH53yVX4RJpm9vfdzRCusUaqgU11/PDTOPmidBpzdD6gnc98LzTbD2i\n\tA2r8xfPUQVdJzwcE2o2udVl/DjHvtZz0mQCS4ZgZb8mLsLTEKMj/ANmjT5+vaQ==","From":"Til Kaiser <mail@tk154.de>","To":"andersson@kernel.org,\n\tlinusw@kernel.org","Cc":"linux-arm-msm@vger.kernel.org,\n\tlinux-gpio@vger.kernel.org,\n\tlinux-kernel@vger.kernel.org","Subject":"[PATCH] pinctrl: qcom: ipq4019: mark gpio as a GPIO pin function","Date":"Mon, 13 Apr 2026 15:52:34 +0200","Message-ID":"<20260413135234.4067548-1-mail@tk154.de>","X-Mailer":"git-send-email 2.53.0","Precedence":"bulk","X-Mailing-List":"linux-gpio@vger.kernel.org","List-Id":"<linux-gpio.vger.kernel.org>","List-Subscribe":"<mailto:linux-gpio+subscribe@vger.kernel.org>","List-Unsubscribe":"<mailto:linux-gpio+unsubscribe@vger.kernel.org>","MIME-Version":"1.0","Content-Transfer-Encoding":"8bit","X-Rspamd-UID":["d068c0","f61d5b"]},"content":"The qcom pinctrl core supports marking functions that represent GPIO mode\nvia PINCTRL_GPIO_PINFUNCTION(), so that strict pinmuxing does not reject\nGPIO requests for pins that are muxed to the GPIO function.\n\nipq4019 still describes its gpio function with QCA_PIN_FUNCTION(gpio),\nso it is not treated as a GPIO pin function. As a result, GPIO consumers\ncan still conflict with pinctrl states that select the \"gpio\" function.\n\nAdd a QCA_GPIO_PIN_FUNCTION() helper and use it for the ipq4019 gpio\nfunction, matching how the msm-based qcom drivers handle this.\n\nThis allows ipq4019 to keep the GPIO-related pin configuration in DTS\nwithout tripping over strict pinmux ownership checks.\n\nFixes: cc85cb96e2e4 (\"pinctrl: qcom: make the pinmuxing strict\")\nSigned-off-by: Til Kaiser <mail@tk154.de>\n---\n drivers/pinctrl/qcom/pinctrl-ipq4019.c | 2 +-\n drivers/pinctrl/qcom/pinctrl-msm.h     | 5 +++++\n 2 files changed, 6 insertions(+), 1 deletion(-)","diff":"diff --git a/drivers/pinctrl/qcom/pinctrl-ipq4019.c b/drivers/pinctrl/qcom/pinctrl-ipq4019.c\nindex 6ede3149b6e1..07df812fb728 100644\n--- a/drivers/pinctrl/qcom/pinctrl-ipq4019.c\n+++ b/drivers/pinctrl/qcom/pinctrl-ipq4019.c\n@@ -480,7 +480,7 @@ static const struct pinfunction ipq4019_functions[] = {\n \tQCA_PIN_FUNCTION(blsp_uart0),\n \tQCA_PIN_FUNCTION(blsp_uart1),\n \tQCA_PIN_FUNCTION(chip_rst),\n-\tQCA_PIN_FUNCTION(gpio),\n+\tQCA_GPIO_PIN_FUNCTION(gpio),\n \tQCA_PIN_FUNCTION(i2s_rx),\n \tQCA_PIN_FUNCTION(i2s_spdif_in),\n \tQCA_PIN_FUNCTION(i2s_spdif_out),\ndiff --git a/drivers/pinctrl/qcom/pinctrl-msm.h b/drivers/pinctrl/qcom/pinctrl-msm.h\nindex 4625fa5320a9..120217012a9f 100644\n--- a/drivers/pinctrl/qcom/pinctrl-msm.h\n+++ b/drivers/pinctrl/qcom/pinctrl-msm.h\n@@ -39,6 +39,11 @@ struct pinctrl_pin_desc;\n \t\t\t\t\tfname##_groups,\t\t\\\n \t\t\t\t\tARRAY_SIZE(fname##_groups))\n \n+#define QCA_GPIO_PIN_FUNCTION(fname)\t\t\t\t\\\n+\t[qca_mux_##fname] = PINCTRL_GPIO_PINFUNCTION(#fname,\t\\\n+\t\t\t\t\tfname##_groups,\t\t\\\n+\t\t\t\t\tARRAY_SIZE(fname##_groups))\n+\n /**\n  * struct msm_pingroup - Qualcomm pingroup definition\n  * @grp:                  Generic data of the pin group (name and pins)\n","prefixes":[]}