{"id":2222514,"url":"http://patchwork.ozlabs.org/api/1.2/patches/2222514/?format=json","web_url":"http://patchwork.ozlabs.org/project/qemu-ppc/patch/20260412134016.1640882-1-vivien.leger@gmail.com/","project":{"id":69,"url":"http://patchwork.ozlabs.org/api/1.2/projects/69/?format=json","name":"QEMU powerpc development","link_name":"qemu-ppc","list_id":"qemu-ppc.nongnu.org","list_email":"qemu-ppc@nongnu.org","web_url":"","scm_url":"","webscm_url":"","list_archive_url":"","list_archive_url_format":"","commit_url_format":""},"msgid":"<20260412134016.1640882-1-vivien.leger@gmail.com>","list_archive_url":null,"date":"2026-04-12T13:40:16","name":"hw/net/fsl_etsec: implement RCTRL[CFA] FCS stripping on receive","commit_ref":null,"pull_url":null,"state":"new","archived":false,"hash":"a625a42428635bbc4b98f25b076b89cf2e3685e0","submitter":{"id":93121,"url":"http://patchwork.ozlabs.org/api/1.2/people/93121/?format=json","name":"Vivien LEGER","email":"vivien.leger@gmail.com"},"delegate":null,"mbox":"http://patchwork.ozlabs.org/project/qemu-ppc/patch/20260412134016.1640882-1-vivien.leger@gmail.com/mbox/","series":[{"id":499610,"url":"http://patchwork.ozlabs.org/api/1.2/series/499610/?format=json","web_url":"http://patchwork.ozlabs.org/project/qemu-ppc/list/?series=499610","date":"2026-04-12T13:40:16","name":"hw/net/fsl_etsec: implement RCTRL[CFA] FCS stripping on receive","version":1,"mbox":"http://patchwork.ozlabs.org/series/499610/mbox/"}],"comments":"http://patchwork.ozlabs.org/api/patches/2222514/comments/","check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/2222514/checks/","tags":{},"related":[],"headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=gmail.com header.i=@gmail.com header.a=rsa-sha256\n header.s=20251104 header.b=N3jWnB5u;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org\n (client-ip=209.51.188.17; helo=lists1p.gnu.org;\n envelope-from=qemu-ppc-bounces+incoming=patchwork.ozlabs.org@nongnu.org;\n receiver=patchwork.ozlabs.org)"],"Received":["from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17])\n\t(using TLSv1.2 with cipher ECDHE-ECDSA-AES256-GCM-SHA384 (256/256 bits))\n\t(No client certificate requested)\n\tby legolas.ozlabs.org (Postfix) with ESMTPS id 4ftt336Cpgz1y2d\n\tfor ; Mon, 13 Apr 2026 00:19:43 +1000 (AEST)","from localhost ([::1] helo=lists1p.gnu.org)\n\tby lists1p.gnu.org with esmtp (Exim 4.90_1)\n\t(envelope-from )\n\tid 1wBvef-0005EO-8H; Sun, 12 Apr 2026 10:19:17 -0400","from eggs.gnu.org ([2001:470:142:3::10])\n by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256)\n (Exim 4.90_1) (envelope-from )\n id 1wBv34-0007bB-Br\n for qemu-ppc@nongnu.org; Sun, 12 Apr 2026 09:40:26 -0400","from mail-wr1-x430.google.com ([2a00:1450:4864:20::430])\n by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128)\n (Exim 4.90_1) (envelope-from )\n id 1wBv32-00051c-Qz\n for qemu-ppc@nongnu.org; Sun, 12 Apr 2026 09:40:26 -0400","by mail-wr1-x430.google.com with SMTP id\n ffacd0b85a97d-43d572f7437so2296559f8f.1\n for ; Sun, 12 Apr 2026 06:40:23 -0700 (PDT)","from vle-arch (88-184-113-142.subs.proxad.net. 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When CFA=1, FCS is copied to the application\nbuffer and bd->length includes it.\n\nPreviously QEMU always included FCS in bd->length regardless of CFA,\ncausing guests using the default RCTRL to receive 4 extra bytes per\nframe, breaking protocols that validate frame length (e.g. ARP).\n\nFix by subtracting 4 from bd->length when RCTRL[CFA]=0 (default).\n\nSigned-off-by: Vivien LEGER \n---\n hw/net/fsl_etsec/registers.h | 1 +\n hw/net/fsl_etsec/rings.c | 10 ++++++++++\n 2 files changed, 11 insertions(+)","diff":"diff --git a/hw/net/fsl_etsec/registers.h b/hw/net/fsl_etsec/registers.h\nindex f085537ecd..1766e39a1a 100644\n--- a/hw/net/fsl_etsec/registers.h\n+++ b/hw/net/fsl_etsec/registers.h\n@@ -103,6 +103,7 @@ extern const eTSEC_Register_Definition eTSEC_registers_def[];\n #define RCTRL_PRSDEP_MASK (0x3)\n #define RCTRL_PRSDEP_OFFSET (6)\n #define RCTRL_RSF (1 << 2)\n+#define RCTRL_CFA (1 << 11) /* Copy FCS to application */\n \n /* Index of each register */\n \ndiff --git a/hw/net/fsl_etsec/rings.c b/hw/net/fsl_etsec/rings.c\nindex 22660c32b8..38e27ad6d8 100644\n--- a/hw/net/fsl_etsec/rings.c\n+++ b/hw/net/fsl_etsec/rings.c\n@@ -442,6 +442,16 @@ static void fill_rx_bd(eTSEC *etsec,\n cpu_physical_memory_write(bufptr, padd, rem);\n }\n }\n+\n+ /* Strip FCS unless RCTRL[CFA] requests copy to application.\n+ * Per FSL eTSEC architecture (RCTRL field descriptions):\n+ * CFA=0 (reset default): FCS is checked and discarded by hardware,\n+ * bd->length should not include the 4-byte FCS.\n+ * CFA=1: FCS is copied to the application buffer, bd->length includes FCS.\n+ */\n+ if (!(etsec->regs[RCTRL].value & RCTRL_CFA) && bd->length >= 4) {\n+ bd->length -= 4;\n+ }\n }\n \n static void rx_init_frame(eTSEC *etsec, const uint8_t *buf, size_t size)\n","prefixes":[]}